5962R9950402VDA [TI]
工作温度范围为 -55°C 至 125°C 的航天级、四路、32V、1MHz、3mV 失调电压运算放大器 | NAD | 14 | -55 to 125;型号: | 5962R9950402VDA |
厂家: | TEXAS INSTRUMENTS |
描述: | 工作温度范围为 -55°C 至 125°C 的航天级、四路、32V、1MHz、3mV 失调电压运算放大器 | NAD | 14 | -55 to 125 放大器 CD 运算放大器 |
文件: | 总30页 (文件大小:456K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LM124AQML
LM124AQML LM124QML Low Power Quad Operational Amplifiers
Literature Number: SNOSAE0J
October 12, 2010
LM124AQML
LM124QML
Low Power Quad Operational Amplifiers
General Description
Advantages
The LM124/124A consists of four independent, high gain, in-
ternally frequency compensated operational amplifiers which
were designed specifically to operate from a single power
supply over a wide range of voltages. Operation from split
power supplies is also possible and the low power supply
current drain is independent of the magnitude of the power
supply voltage.
Eliminates need for dual supplies
■
■
■
Four internally compensated op amps in a single package
Allows directly sensing near GND and VOUT also goes to
GND
Compatible with all forms of logic
■
■
Power drain suitable for battery operation
Application areas include transducer amplifiers, DC gain
blocks and all the conventional op amp circuits which now can
be more easily implemented in single power supply systems.
For example, the LM124/124A can be directly operated off of
the standard +5Vdc power supply voltage which is used in
digital systems and will easily provide the required interface
electronics without requiring the additional +15Vdc power
supplies.
Features
Available with Radiation Guarantee
■
High Dose Rate
ELDRS Free
100 krad(Si)
100 krad(Si)
—
—
Internally frequency compensated for unity gain
■
■
■
Large DC voltage gain 100 dB
Wide bandwidth (unity gain) 1 MHz
(temperature compensated)
Unique Characteristics
Wide power supply range:
Single supply 3V to 32V
or dual supplies ±1.5V to ±16V
■
In the linear mode the input common-mode voltage range
■
includes ground and the output voltage can also swing to
ground, even though operated from only a single power
supply voltage
Very low supply current drain (700 μA)—essentially
■
■
■
independent of supply voltage
The unity gain cross frequency is temperature
compensated
■
Low input biasing current 45 nA
(temperature compensated)
Low input offset voltage 2 mV
and offset current: 5 nA
The input bias current is also temperature compensated
■
Input common-mode voltage range includes ground
■
■
Differential input voltage range equal to the power supply
voltage
Large output voltage swing 0V to V+ − 1.5V
■
Ordering Information
NS Package
NS Part Number
LM124J/883
SMD Part Number
7704301CA
Package Description
Number
J14A
14LD CERDIP
20LD LEADLESS CHIP
CARRIER
LM124AE/883
77043022A
E20A
LM124AJ/883
7704302CA
J14A
W14B
14LD CERDIP
LM124AW/883
14LD CERPACK
14LD CERAMIC SOIC
14LD CERDIP
LM124AWG/883
7704302XA
WG14A
J14A
LM124AJRQMLV (Note 11)
LM124AJRLQMLV (Note 12)
LM124AWGRQMLV (Note 11)
5962R9950401VCA, 100 krad(Si)
5962R9950402VCA, 100 krad(Si)
5962R9950401VZA, 100 krad(Si)
J14A
14LD CERDIP
WG14A
WG14A
W14B
14LD CERAMIC SOIC
14LD CERAMIC SOIC
14LD CERPACK
14LD CERPACK
Bare Die
LM124AWGRLQMLV (Note 12) 5962R9950402VZA, 100 krad(Si)
LM124AWRQMLV (Note 11)
LM124AWRLQMLV (Note 12)
LM124 MDE (Note 12)
5962R9950401VDA, 100 krad(Si)
5962R9950402VDA, 100 krad(Si)
5962R9950402V9A, 100 krad(Si)
5962R9950401V9A, 100 krad(Si)
W14B
(Note 1)
(Note 1)
LM124 MDR (Note 11)
Bare Die
© 2011 National Semiconductor Corporation
201080
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Note 1: FOR ADDITIONAL DIE INFORMATION, PLEASE VISIT THE HI REL WEB SITE AT: www.national.com/analog/space/level_die
Connection Diagrams
Leadless Chip Carrier
20108055
See NS Package Number E20A
Dual-In-Line Package
20108001
Top View
See NS Package Number J14A
20108033
See NS Package Number W14B or WG14A
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2
Schematic Diagram
(Each Amplifier)
20108002
3
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Absolute Maximum Ratings (Note 2)
Supply Voltage, V+
Differential Input Voltage
Input Voltage
32Vdc or ±16Vdc
32Vdc
−0.3Vdc to +32Vdc
Input Current
(VIN < −0.3Vdc) (Note 5)
Power Dissipation (Note 3)
CERDIP
CERPACK
LCC
CERAMIC SOIC
Output Short-Circuit to GND
(One Amplifier) (Note 4)
50 mA
1260mW
700mW
1350mW
700mW
V+ ≤ 15Vdc and TA = 25°C
Continuous
Operating Temperature Rangeꢀ
Maximum Junction Temperature
Storage Temperature Range
−55°C ≤ TA ≤ +125°C
150°C
−65°C ≤ TA ≤ +150°C
260°C
Lead Temperature (Soldering, 10 seconds)
Thermal Resistance ThetaJA
ꢁCERDIP (Still Air)
(500LF/Min Air flow)
ꢁ CERPACK (Still Air)
(500LF/Min Air flow)
ꢁ LCC (Still Air)
(500LF/Min Air flow)
ꢁ CERAMIC SOIC (Still Air)
(500LF/Min Air flow)
ThetaJC
103°C/W
51°C/W
176°C/W
116°C/W
91°C/W
66°C/W
176°C/W
116°C/W
CERDIP
CERPACK
LCC
CERAMIC SOIC
Package Weight (Typical)
CERDIP
CERPACK
LCC
19°C/W
18°C/W
24°C/W
18°C/W
2200mg
460mg
470mg
410mg
250V
CERAMIC SOIC
ESD Tolerance (Note 6)
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4
Quality Conformance Inspection
MIL-STD-883, Method 5005 - Group A
Subgroup
Description
Static tests at
Temp ( °C)
+25
1
2
Static tests at
+125
-55
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
+25
5
+125
-55
6
7
+25
8A
8B
9
+125
-55
+25
10
11
+125
-55
5
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LM124/883 Electrical Characteristics SMD: 77043
DC Parameters
(The following conditions apply to all the following parameters, unless otherwise specified.)
All voltages referenced to device ground.
Sub-
Groups
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
V+ = 5V
1.2
3.0
4.0
mA
mA
mA
uA
1, 2, 3
ICC
Power Supply Current
1
2, 3
1
V+ = 30V
V+ = 15V, VOUT = 200mV,
+VIN = 0mV, -VIN = +65mV
12
ISINK
Output Sink Current
V+ = 15V, VOUT = 2V,
10
5
mA
mA
mA
mA
mA
mV
mV
mV
mV
mV
mV
mV
1
2, 3
1
+VIN = 0mV, -VIN = +65mV
V+ = 15V, VOUT = 2V,
-20
-10
ISOURCE
IOS
Output Source Current
+VIN = 0mV, -VIN = -65mV
2, 3
1
Short Circuit Current V+ = 5V, VOUT = 0V
V+ = 30V, VCM = 0V
-60
-5
-7
-5
-7
-5
-7
-5
5
7
5
7
5
7
5
1
2, 3
1
V+ = 30V, VCM = 28V
Input Offset Voltage
VIO
2, 3
1
V+ = 5V, VCM = 0V
2, 3
1
V+ = 30V, VCM = 28.5V
Common Mode
V+ = 30V, VIN = 0V to 28.5V
Rejection Ratio
CMRR
+IIB
(Note 14)
(Note 13)
70
dB
1
-150
-300
-30
10
10
nA
nA
nA
nA
dB
1
2, 3
1
V+ = 5V, VCM = 0V
Input Bias Current
Input Offset Current
30
IIO
V+ = 5V, VCM = 0V
-100
65
100
2, 3
1
PSRR
Power Supply
Rejection Ratio
V+ = 5V to 30V, VCM = 0V
(Note 7)
(Note 14)
28.5
28
V
V
1
2, 3
4
Common Mode
Voltage Range
VCM
V+ = 30V
50
25
26
V/mV
V/mV
V
V+ = 15V, RL = 2K Ω,
VO = 1V to 11V
AVS
Large Signal Gain
5, 6
4, 5, 6
V+ = 30V, RL = 2K Ω
V+ = 30V, RL = 10K Ω
V+ = 30V, RL = 10K Ω
VOH
Output Voltage High
27
V
4, 5, 6
4, 5, 6
40
mV
40
100
20
mV
mV
mV
4
VOL
V+ = 30V, ISINK = 1uA
Output Voltage Low
5, 6
4, 5, 6
V+ = 5V, RL= 10K Ω
Channel Separation
(Amp to Amp Coupling)
(Note 9)
(Note 15)
1KHz, 20KHz
80
dB
4
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6
LM124A/883 Electrical Characteristics SMD: 77043
DC Parameters
(The following conditions apply to all the following parameters, unless otherwise specified.)
All voltages referenced to device ground.
Sub-
Groups
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
V+ = 5V
1.2
3.0
4.0
mA
mA
mA
1, 2, 3
1
ICC
Power Supply Current
V+ = 30V
2, 3
V+ = 15V, VOUT = 200mV,
+VIN = 0mV, -VIN = +65mV
12
uA
1
ISINK
Output Sink Current
V+ = 15V, VOUT = 2V,
10
5
mA
mA
mA
mA
mA
mV
mV
mV
mV
mV
mV
dB
1
2, 3
1
+VIN = 0mV, -VIN = +65mV
V+ = 15V, VOUT = 2V,
-20
-10
ISOURCE
IOS
Output Source Current
Short Circuit Current
+VIN = 0mV, -VIN = -65mV
2, 3
1
V+ = 5V, VOUT = 0V
-60
-2
2
4
2
4
2
4
1
V+ = 30V, VCM = 0V
-4
2, 3
1
V+ = 30V, VCM = 28.5V
V+ = 30V, VCM = 28V
-2
VIO
Input Offset Voltage
-4
2, 3
1
-2
V+ = 5V, VCM = 0V
V+ = 30V, VIN = 0V to 28.5V
V+ = 5V, VCM = 0V
V+ = 5V, VCM = 0V
V+ = 5V to 30V, VCM = 0V
V+ = 30V
-4
2, 3
1
Common Mode
Rejection Ratio
70
CMRR
±IIB
(Note 14)
(Note 13)
-50
-100
-10
10
10
10
30
nA
nA
nA
nA
1
Input Bias Current
Input Offset Current
2, 3
1
IIO
-30
2, 3
Power Supply
Rejection Ratio
PSRR
VCM
65
dB
1
Common Mode
Voltage Range
28.5
28
V
V
1
2, 3
4
(Note 7)
(Note 14)
50
25
26
V/mV
V/mV
V
V+ = 15V, RL = 2K Ω,
VO = 1V to 11V
AVS
Large Signal Gain
(Note 8)
5, 6
4, 5, 6
V+ = 30V, RL = 2K Ω
V+ = 30V, RL = 10K Ω
V+ = 30V, RL = 10K Ω
VOH
Output Voltage High
27
V
4, 5, 6
4, 5, 6
40
mV
40
100
20
mV
mV
mV
4
VOL
V+ = 30V, ISINK = 1uA
Output Voltage Low
5, 6
4, 5, 6
V+ = 5V, RL = 10K Ω
Channel Separation
Amp to Amp Coupling
(Note 9)
(Note 15)
80
dB
4
1KHz, 20KHz
7
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LM124A RAD HARD Electrical Characteristics
SMD: 5962R99504 (Note 11, Note 12)
DC Parameters
(The following conditions apply to all the following parameters, unless otherwise specified.)
All voltages referenced to device ground.
Sub-
Groups
Symbol
Parameter
Conditions
Notes
Min
Max
UniT
VCC+ = 30V, VCC- = Gnd,
VCM = +15V
-2
-4
2
4
mV
mV
mV
mV
mV
mV
mV
mV
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
1
2, 3
1
VCC+ = 2V, VCC- = -28V,
VCM = -13V
-2
2
-4
4
2, 3
1
VIO
Input Offset Voltage
VCC+ = 5V, VCC- = Gnd,
VCM = +1.4V
-2
2
-4
4
2, 3
1
VCC+ = 2.5V, VCC- = -2.5,
VCM = -1.1V
-2
2
-4
4
2, 3
1, 2
3
VCC+ = 30V, VCC- = Gnd,
VCM = +15V
-10
-30
-10
-30
-10
-30
-10
-30
-50
-100
-50
-100
-50
-100
-50
-100
10
30
VCC+ = 2V, VCC- = -28V,
VCM = -13V
10
1, 2
3
30
IIO
Input Offset Current
VCC+ = 5V, VCC- = Gnd,
VCM = +1.4V
10
1, 2
3
30
VCC+ = 2.5V, VCC- = -2.5,
VCM = -1.1V
10
1, 2
3
30
VCC+ = 30V, VCC- = Gnd,
VCM = +15V
+0.1
+0.1
+0.1
+0.1
+0.1
+0.1
+0.1
+0.1
1, 2
3
VCC+ = 2V, VCC- = -28V,
VCM = -13V
1, 2
3
±IIB
Input Bias Current
(Note 13)
VCC+ = 5V, VCC- = Gnd,
VCM = +1.4V
1, 2
3
VCC+ = 2.5V, VCC- = -2.5,
VCM = -1.1V
1, 2
3
VCC- = Gnd, VCM = +1.4V,
Power Supply
Rejection Ratio
+PSRR
CMRR
-100
76
100
uV/V
dB
1, 2, 3
1, 2, 3
1, 2,3
5V ≤ VCC ≤ 30V
Common Mode
Rejection Ratio
(Note 14)
VCC+ = 30V, VCC- = Gnd,
VO = 25V
Output Short Circiut
Current
IOS+
-70
mA
3
4
mA
mA
1, 2
3
ICC
VCC+ = 30V, VCC- = Gnd
Power Supply Current
+25°C ≤ TA ≤ +125°C,
+VCC = 5V, -VCC = 0V,
VCM = +1.4V
-30
-30
30
30
uV/ °C
uV/ °C
pA/° C
pA/ °C
2
3
2
3
Input Offset Voltage
Temperature
Sensitivity
ΔVIO/ ΔT
(Note 10)
(Note 10)
-55°C ≤ TA ≤ +25°C, +VCC = 5V,
-VCC = 0V, VCM = +1.4V
+25°C ≤ TA ≤ +125°C,
+VCC = 5V, -VCC = 0V,
VCM = +1.4V
-400
-700
400
700
Input Offset Current
Temperature
Sensitivity
ΔIO/ ΔT
-55°C ≤ TA ≤ +25°C, +VCC = 5V,
-VCC = 0V, VCM = +1.4V
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8
LM124A RAD HARD SMD: 5962R99504 (Note 11, Note 12)
AC/DC Parameters
(The following conditions apply to all the following parameters, unless otherwise specified.)
All voltages referenced to device ground.
Sub-
G roups
Symbol
Parameter
Conditions
Notes
Min
Max
35
UniT
mV
V
VCC+ = 30V, VCC- = Gnd,
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
RL = 10K Ω
VCC+ = 30V, VCC- = Gnd,
IOI = 5mA
Logical "0" Output
Voltage
VOL
1.5
0.4
VCC+ = 4.5V, VCC- = Gnd,
IOI = 2uA
V
VCC+ = 30V, VCC- = Gnd,
IOH = -10mA
27
V
Logical "1" Output
Voltage
VOH
VCC+ = 4.5V, VCC- = Gnd,
IOH = -10mA
2.4
V
VCC+ = 30V, VCC- = Gnd,
1V ≤ VO ≤ 26V, RL = 10K Ω
VCC+ = 30V, VCC- = Gnd,
5V ≤ VO ≤ 20V, RL = 2K Ω
VCC+ = 5V, VCC- = Gnd,
1V ≤ VO ≤ 2.5V, RL = 10K Ω
VCC+ = 5V, VCC- = Gnd,
1V ≤ VO ≤ 2.5V, RL = 2K Ω
VCC+ = 30V, VCC- = Gnd,
VO = +30V, RL = 10K Ω
VCC+ = 30V, VCC- = Gnd,
VO = +30V, RL = 2K Ω
50
25
V/mV
V/mV
4
5, 6
AVS
+
Voltage Gain
Voltage Gain
50
25
V/mV
V/mV
4
5, 6
10
10
27
26
V/mV
V/mV
V
4, 5, 6
4, 5, 6
4, 5, 6
AVS
Maximum Output
Voltage Swing
+VOP
V
uS
%
4, 5, 6
Transient Response:
Rise Time
TR(TR
)
VCC+ = 30V, VCC- = Gnd
VCC+ = 30V, VCC- = Gnd
1
7, 8A, 8B
7, 8A, 8B
Transient Response:
Overshoot
TR(OS
)
50
Slew Rate: Rise
Slew Rate: Fall
VCC+ = 30V, VCC- = Gnd
VCC+ = 30V, VCC- = Gnd
0.1
0.1
V/uS
V/uS
7, 8A, 8B
7, 8A, 8B
±SR
9
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LM124A RAD HARD SMD: 5962R99504 (Note 11, Note 12)
AC Parameters
(The following conditions apply to all the following parameters, unless otherwise specified.)
AC: +VCC = 30V, -VCC = 0V
Sub-
Groups
Symbol
NIBB
Parameter
Conditions
Notes
Min
Max
Unit
+VCC = 15V, -VCC = -15V,
BW = 10Hz to 5KHz
+VCC = 15V, -VCC = -15V,
RS = 20K Ω,
Noise Broadband
15
uVrm s
7
7
NIPC
Noise Popcorn
50
uVpK
BW = 10Hz to 5KHz
+VCC = 30V, -VCC = Gnd,
RL = 2K Ω
80
80
80
80
80
80
80
80
80
80
80
80
80
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
7
7
7
7
7
7
7
7
7
7
7
7
7
RL = 2K Ω,
VIN = 1V and 16V, A to B
RL = 2K Ω,
VIN = 1V and 16V, A to C
RL = 2K Ω,
VIN = 1V and 16V, A to D
RL = 2K Ω,
VIN = 1V and 16V, B to A
RL = 2K Ω,
VIN = 1V and 16V, B to C
RL = 2K Ω,
VIN = 1V and 16V, B to D
CS
Channel Separation
(Note 15)
RL = 2K Ω,
VIN = 1V and 16V, C to A
RL = 2K Ω,
VIN = 1V and 16V, C to B
RL = 2K Ω,
Vin = 1V and 16V, C to D
RL = 2K Ω,
VIN = 1V and 16V, D to A
RL = 2K Ohms,
VIN = 1V and 16V, D to B
RL = 2K Ω,
Vin = 1V and 16V, D to C
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10
LM124A RAD HARD - DC Drift Values SMD: 5962R99504 (Note 11, Note 12)
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: "Delta calculations performed on QMLV devices at group B, subgroup 5 only"
Sub-
Groups
Symbol
VIO
±IIB
Parameter
Input Offset Voltage
Input Bias Current
Conditions
Notes
Min
-0.5
-10
Max
0.5
10
Unit
mV
nA
VCC+ = 30V, VCC- = Gnd,
VCM = +15V
1
1
VCC+ = 30V, VCC- = Gnd,
VCM = +15V
LM124A - POST RADIATION LIMITS +25°C SMD: 5962R99504 (Note 11, Note 12)
(The following conditions apply to all the following parameters, unless otherwise specified.)
All voltages referenced to device ground.
Sub-
Groups
Symbol
Parameter
Conditions
Notes
Min
-2.5
-2.5
-2.5
-2.5
-15
-15
-15
-15
-75
-75
-75
-75
Max
2.5
2.5
2.5
2.5
15
Unit
mV
mV
mV
mV
nA
VCC+ = 30V, VCC- = Gnd,
VCM = +15V
1
VCC+ = 2V, VCC- = -28V,
VCM = -13V
1
1
1
1
1
1
1
1
1
1
1
4
VIO
Input Offset Voltage
(Note 11)
VCC+ = 5V, VCC- = Gnd,
VCM = +1.4V
VCC+ = 2.5V, VCC- = -2.5,
VCM = -1.1V
VCC+ = 30V, VCC- = Gnd,
VCM = +15V
VCC+ = 2V, VCC- = -28V,
VCM = -13V
15
nA
IIO
Input Offset Current
(Note 11)
VCC+ = 5V, VCC- = Gnd,
VCM = +1.4V
15
nA
VCC+ = 2.5V, VCC- = -2.5V,
VCM = -1.1V
15
nA
VCC+ = 30V, VCC- = Gnd,
VCM = +15V
+0.1
+0.1
+0.1
+0.1
nA
VCC+ = 2V, VCC- = -28V,
VCM = -13V
nA
±IIB
Input Bias Current
(Note 11)
(Note 11)
VCC+ = 5V, VCC- = Gnd,
VCM = +1.4V
nA
VCC+ = 2.5V, VCC- = -2.5V,
VCM = -1.1V
nA
VCC+ = 30V, VCC- = Gnd,
1V ≤ VO ≤ 26V, RL = 10K Ω
VCC+ = 30V, VCC- = Gnd,
5V ≤ VO ≤ 20V, RL = 2K Ω
40
40
V/mV
V/mV
AVS+
Voltage Gain
4
11
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Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), ThetaJA (package
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/
ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 4: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum
output current is approximately 40mA independent of the magnitude of V+. At values of supply voltage in excess of +15VDC, continuous short-circuits can exceed
the power dissipation ratings and cause eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers.
Note 5: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP
transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action
on the IC chip. This transistor action can cause the output voltages of the op amps to go to the V+ voltage level (or to ground for a large overdrive) for the time
duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again
returns to a value greater than -0.3VDC (at 25°C).
Note 6: Human body model, 1.5 kΩ in series with 100 pF.
Note 7: Guaranteed by VIO tests.
Note 8: Datalog reading in K=V/mV
Note 9: Guaranteed, not tested
Note 10: Calculated parameters
Note 11: Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table.
These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters
are guaranteed only for the conditions as specified in MIL-STD-883, Method 1019
Note 12: Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose
rate sensitivity (ELDRS) effect.
Note 13: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output
so no loading change exists on the input lines.
Note 14: The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The upper end of the
common-mode voltage range is V+ −1.5V (at 25°C), but either or both inputs can go to +32V without damage independent of the magnitude of V+.
Note 15: Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This typically can
be detected as this type of capacitance increases at higher frequencies.
Typical Performance Characteristics
Input Voltage Range
Input Current
20108034
20108035
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12
Supply Current
Voltage Gain
20108036
20108037
Open Loop Frequency
Response
Common Mode Rejection
Ratio
20108038
20108039
Voltage Follower Pulse
Response
Voltage Follower Pulse
Response (Small Signal)
20108041
20108040
13
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Large Signal Frequency
Response
Output Characteristics
Current Sourcing
20108042
20108043
Output Characteristics
Current Sinking
Current Limiting
20108045
20108044
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14
output of the amplifier to ground to increase the class A bias
current and prevent crossover distortion.
Application Hints
The LM124 series are op amps which operate with only a
single power supply voltage, have true-differential inputs, and
remain in the linear mode with an input common-mode volt-
age of 0 VDC. These amplifiers operate over a wide range of
power supply voltage with little change in performance char-
acteristics. At 25°C amplifier operation is possible down to a
Where the load is directly coupled, as in dc applications, there
is no crossover distortion.
Capacitive loads which are applied directly to the output of the
amplifier reduce the loop stability margin. Values of 50 pF can
be accommodated using the worst-case non-inverting unity
gain connection. Large closed loop gains or resistive isolation
should be used if larger load capacitance must be driven by
the amplifier.
minimum supply voltage of 2.3 VDC
.
The pinouts of the package have been designed to simplify
PC board layouts. Inverting inputs are adjacent to outputs for
all of the amplifiers and the outputs have also been placed at
the corners of the package (pins 1, 7, 8, and 14).
The bias network of the LM124 establishes a drain current
which is independent of the magnitude of the power supply
voltage over the range of from 3 VDC to 30 VDC
.
Precautions should be taken to insure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
test socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
Output short circuits either to ground or to the positive power
supply should be of short time duration. Units can be de-
stroyed, not as a result of the short circuit current causing
metal fusing, but rather due to the large increase in IC chip
dissipation which will cause eventual failure due to excessive
junction temperatures. Putting direct short-circuits on more
than one amplifier at a time will increase the total IC power
dissipation to destructive levels, if not properly protected with
external dissipation limiting resistors in series with the output
leads of the amplifiers. The larger value of output source cur-
rent which is available at 25°C provides a larger output current
capability at elevated temperatures (see typical performance
characteristics) than a standard IC op amp.
Large differential input voltages can be easily accommodated
and, as input differential voltage protection diodes are not
needed, no large input currents result from large differential
input voltages. The differential input voltage may be larger
than V+ without damaging the device. Protection should be
provided to prevent the input voltages from going negative
more than −0.3 VDC (at 25°C). An input clamp diode with a
resistor to the IC input terminal can be used.
The circuits presented in the section on typical applications
emphasize operation on only a single power supply voltage.
If complementary power supplies are available, all of the stan-
dard op amp circuits can be used. In general, introducing a
pseudo-ground (a bias voltage reference of V+/2) will allow
operation above and below this value in single power supply
systems. Many application circuits are shown which take ad-
vantage of the wide input common-mode voltage range which
includes ground. In most cases, input biasing is not required
and input voltages which range to ground can easily be ac-
commodated.
To reduce the power supply drain, the amplifiers have a class
A output stage for small signal levels which converts to class
B in a large signal mode. This allows the amplifiers to both
source and sink large output currents. Therefore both NPN
and PNP external current boost transistors can be used to
extend the power capability of the basic amplifiers. The output
voltage needs to raise approximately 1 diode drop above
ground to bias the on-chip vertical PNP transistor for output
current sinking applications.
For ac applications, where the load is capacitively coupled to
the output of the amplifier, a resistor should be used, from the
15
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Typical Single-Supply Applications
(V+ = 5.0 VDC
)
Non-Inverting DC Gain (0V Input = 0V Output)
20108005
*R not needed due to temperature independent IIN
DC Summing Amplifier
Power Amplifier
(VIN'S ≥ 0 VDC and VO ≥ VDC
)
20108007
V0 = 0 VDC for VIN = 0 VDC
AV = 10
20108006
Where: V0 = V1 + V2 − V3 − V4
(V1 + V2) ≥ (V3 + V4) to keep VO > 0 VDC
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16
LED Driver
“BI-QUAD” RC Active Bandpass Filter
20108008
20108009
fo = 1 kHz
Q = 50
AV = 100 (40 dB)
Fixed Current Sources
Lamp Driver
20108011
20108010
17
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Current Monitor
Pulse Generator
20108015
20108012
Squarewave Oscillator
*(Increase R1 for IL small)
Driving TTL
20108013
20108016
Voltage Follower
Pulse Generator
20108014
20108017
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18
High Compliance Current Sink
20108018
IO = 1 amp/volt VIN
(Increase RE for Io small)
Low Drift Peak Detector
20108019
19
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Comparator with Hysteresis
Ground Referencing a Differential Input Signal
20108020
20108021
VO = VR
Voltage Controlled Oscillator Circuit
20108022
*Wide control voltage range: 0 VDC ≤ VC ≤ 2 (V+ −1.5 VDC
)
Photo Voltaic-Cell Amplifier
20108023
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20
AC Coupled Inverting Amplifier
20108024
AC Coupled Non-Inverting Amplifier
20108025
21
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DC Coupled Low-Pass RC Active Filter
20108026
fO = 1 kHz
Q = 1
AV = 2
High Input Z, DC Differential Amplifier
20108027
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22
High Input Z Adjustable-Gain
DC Instrumentation Amplifier
20108028
Using Symmetrical Amplifiers to
Reduce Input Current (General Concept)
Bridge Current Amplifier
20108030
20108029
23
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Bandpass Active Filter
20108031
fO = 1 kHz
Q = 25
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24
Revision History
Date Released
Revision
Section
Changes
9/2/04
A
New Release, Corporate format
3 MDS data sheets converted into one Corp. data
sheet format. MNLM124-X, Rev. 1A2,
MNLM124A-X, Rev. 1A3 and MRLM124A-X-RH,
Rev. 5A0. MDS data sheets will be archived.
01/27/05
04/18/05
06/16/06
B
C
D
Connection Diagrams, Quality
Conformance Inspection Section, and
Physical Dimensions drawings
Added E package Connection Diagram. Changed
verbiage under Quality Conformance Title, and
Updated Revisions for the Marketing Drawings.
Update Absolute Maximum Ratings
Section
Corrected typo for Supply Voltage limit From:
32Vdc or +16Vdc TO: 32Vdc or ±16Vdc. Added
cerpack, cerdip, LCC package weight.
Features, Ordering Information Table, Rad Added Available with Radiation Guarantee, Low
Hard Electrical Section and Notes
Dose NSID's to table 5962R9950402VCA
LM124AJRLQMLV, 5962R9950402VDA
LM124AWRLQMLV, 5962R9950402VZA
LM124AWGRLQMLV, and reference to Note 10
and 11. Deleted code K NSID's LM124AJLQMLV
5962L9950401VCA, LM124AWGLQMLV
5962L9950401VZA, LM124AWLQMLV
5962L9950401VDA, Note 11 to Rad Hard
Electrical Heading. Note 11 to Notes.
10/07/2010
E
Data sheet title, Features, Ordering table, Update with current device information and format.
Electrical characteristic headings, Rad
Hard conditions
Revision D will be Archived
25
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Physical Dimensions inches (millimeters) unless otherwise noted
SAMPLE TEXT Ceramic Dual-In-Line Package (J)
NS Package Number J14A
SAMPLE TEXT 20 Pin Leadless Chip Carrier, Type C (E)
NS Package Number E20A
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26
SAMPLE TEXT Ceramic Flatpak Package
NS Package Number W14B
SAMPLE TEXT 14-Pin Ceramic Package (WG)
NS Package Number WG14A
27
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Notes
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