695D106X0035G2T [TI]
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS; 微功耗低压差（ LDO）稳压器
| 型号： | 695D106X0035G2T |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS |
| 文件： | 总37页 (文件大小：627K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
D, P, OR PW PACKAGE
Available in 5-V, 4.85-V, 3.3-V, 3.0-V, and
2.5-V Fixed-Output and Adjustable Versions
(TOP VIEW)
Dropout Voltage <85 mV Max at
†
‡
SENSE /FB
OUT
OUT
IN
1
2
3
4
8
7
6
5
I
= 100 mA (TPS7250)
O
RESET/PG
GND
Low Quiescent Current, Independent of
Load, 180 µA Typ
EN
IN
8-Pin SOIC and 8-Pin TSSOP Package
†
‡
SENSE
–
Fixed voltage options only
Output Regulated to ±2% Over Full
Operating Range for Fixed-Output Versions
(TPS7225, TPS7230, TPS7233, TPS7248,
and TPS7250)
Extremely Low Sleep-State Current,
FB – Adjustable version only (TPS7201)
0.5 µA Max
600
Power-Good (PG) Status Output
T
A
= 25°C
description
500
The TPS72xx family of low-dropout (LDO) voltage
regulators offers the benefits of low-dropout
voltage, micropower operation, and miniaturized
packaging. These regulators feature extremely
low dropout voltages and quiescent currents
compared to conventional LDO regulators.
Offered in small-outline integrated-circuit (SOIC)
packages and 8-terminal thin shrink small-outline
(TSSOP), the TPS72xx series devices are ideal
for cost-sensitive designs and for designs where
board space is at a premium.
TPS7225
400
300
200
100
TPS7230
TPS7233
TPS7248
TPS7250
150
A combination of new circuit design and process
innovation has enabled the usual pnp pass
transistor to be replaced by a PMOS device.
Because the PMOS pass element behaves as a
low-value resistor, the dropout voltage is very low
– maximum of 85 mV at 100 mA of load current
(TPS7250) – and is directly proportional to the
load current (see Figure 1). Since the PMOS pass
0
0
50
100
200
250
I
O
– Output Current – mA
Figure 1. Typical Dropout Voltage Versus
Output Current
element is a voltage-driven device, the quiescent current is very low (300 µA maximum) and is stable over the
entire range of output load current (0 mA to 250 mA). Intended for use in portable systems such as laptops and
cellular phones, the low-dropout voltage and micropower operation result in a significant increase in system
battery operating life.
The TPS72xx also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current
to 0.5 µA maximum at T = 25°C. Other features include a power-good function that reports low output voltage
J
and may be used to implement a power-on reset or a low-battery indicator.
The TPS72xx is offered in 2.5-V, 3-V, 3.3-V, 4.85-V, and 5-V fixed-voltage versions and in an adjustable version
(programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum of 2%
over line, load, and temperature ranges (3% for adjustable version).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
AVAILABLE OPTIONS
OUTPUT VOLTAGE
PACKAGED DEVICES
(V)
CHIP FORM
(Y)
T
J
SMALL OUTLINE
(D)
PDIP
(P)
TSSOP
(PW)
MIN
TYP
MAX
4.9
4.75
3.23
2.94
2.45
5
4.85
5.1
4.95
3.37
3.06
2.55
TPS7250QD
TPS7248QD
TPS7233QD
TPS7230QD
TPS7225QD
TPS7250QP
TPS7248QP
TPS7233QP
TPS7230QP
TPS7225QP
TPS7250QPWR
TPS7248QPWR
TPS7233QPWR
TPS7230QPWR
TPS7225QPWR
TPS7250Y
TPS7248Y
TPS7233Y
TPS7230Y
TPS7225Y
3.3
–55°C to 150°C
3
2.5
Adjustable
1.2 V to 9.75 V
TPS7201QD
TPS7201QP
TPS7201QPWR
TPS7201Y
The D package is available taped and reeled. Add R suffix to device type (e.g., TPS7250QDR). The PW package is only available left-end
taped and reeled. The TPS7201Q is programmable using an external resistor divider (see application information). The chip form is tested
at 25°C.
‡
TPS72xx
5
6
2
1
7
8
V
IN
IN
PG
PG
I
250 kΩ
SENSE
OUT
V
O
4
0.1 µF
EN
OUT
C
O
(see Note A)
+
GND
10 µF
3
CSR = 1 Ω
‡
TPS7225Q, TPS7230Q, TPS7233Q, TPS7248Q, TPS7250Q (fixed-voltage
options)
NOTE A: Capacitor selection is nontrivial. See application information section
for details.
Figure 2. Typical Application Configuration
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TPS72xx chip information
These chips, when properly assembled, display characteristics similar to the TPS72xxQ. Thermal compression
or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with
conductive epoxy or a gold-silicon preform.
(5)
BONDING PAD ASSIGNMENTS
SENSE
FB
(3)
(2)
(6)
(4)
(7)
IN
4
7
TPS72xx
6
OUT
PG
EN
5
(1)
GND
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
57
T max = 150°C
J
1
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
†
Fixed-voltage options only (TPS7225, TPS7230,
TPS7233, TPS7248, and TPS7250)
2
3
‡
Adjustable version only (TPS7201)
NOTE A. For most applications, OUT and SENSE should
betied together as close as possible to the device;
for other implementations, refer to the SENSE-pin
connection discussion in the application
information section of this data sheet.
69
functional block diagram
IN
RESISTOR DIVIDER OPTIONS
§
DEVICE
R1
R2
UNIT
§
§
EN
TPS7201
TPS7225
TPS7230
TPS7233
TPS7248
TPS7250
0
∞
Ω
257
357
420
726
756
233
233
233
233
233
kΩ
kΩ
kΩ
kΩ
kΩ
PG
_
+
OUT
¶
NOTE A: Resistors are nominal values only.
1.12 V
SENSE /FB
+
_
R1
R2
V
ref
= 1.188 V
COMPONENT COUNT
MOS transistors
Bilpolar transistors
Diodes
108
41
4
Capacitors
Resistors
15
75
GND
Switch positions are shown with EN low (active).
For most applications, SENSE should be externally connected to OUT as close as possible to the device.
For other implementations, refer to the SENSE-pin connection discussion in application information section.
§
¶
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range , V , PG, SENSE, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 11 V
I
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 A
O
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Tables 1 and 2
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURE (see Note 1 and Figure 3)
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING POWER RATING
A
D
P
PW
725 mW
1175 mW
525 mW
5.8 mW/°C
8.74 mW/°C
4.2 mW/°C
464 mW
782 mW
336 mW
377 mW
650 mW
273 mW
145 mW
301 mW
105 mW
DISSIPATION RATING TABLE 2 – CASE TEMPERATURE (see Note 1 and Figure 4)
≤ 25°C DERATING FACTOR = 70°C = 85°C T = 125°C
C
T
T
T
C
C
C
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING POWER RATING
C
D
P
PW
2063 mW
2738 mW
2900 mW
16.5 mW/°C
20.49 mW/°C
23.2 mW/°C
1320 mW
1816 mW
1856 mW
1073 mW
1508 mW
1508 mW
413 mW
689 mW
580 mW
NOTE 1: Dissipation rating tables and figures are provided for maintenance of junction temperature at or below absolute
maximumof150°C.Forguidelinesonmaintainingjunctiontemperaturewithintherecommendedoperatingrange,
see application information section.
MAXIMUM CONTINUOUS DISSIPATION
MAXIMUM CONTINUOUS DISSIPATION
vs
vs
FREE-AIR TEMPERATURE
CASE TEMPERATURE
1200
1100
3000
P Package
R
= 48.8°C/W
θJC
P Package
= 114.4°C/W
1000
900
800
700
600
500
400
300
200
100
0
2500
2000
1500
1000
500
R
θJA
PW Package
D Package
R
= 43.1°C/W
θJC
R
= 172°C/W
θJA
D Package
= 60.6°C/W
R
θJC
PW Package
= 238°C/W
R
θJA
0
25
50
75
100
125
150
25
50
75
100
125
150
T
A
– Free-Air Temperature – °C
T
C
– Case Temperature – °C
Figure 3
Figure 4
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
recommended operating conditions
MIN
3
MAX
10
UNIT
TPS7201Q
TPS7225Q
TPS7230Q
TPS7233Q
TPS7248Q
TPS7250Q
3.65
3.96
3.98
5.24
5.41
2
10
10
†
Input voltage, V
V
I
10
10
10
High-level input voltage at EN, V
V
V
IH
Low-level input voltage at EN, V
0.5
250
125
IL
Output current, I
0
mA
°C
O
Operating virtual junction temperature, T
–40
J
†
Minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout voltage at the
maximum specified load range. Since dropout voltage is a function of output current, the usable range can be extended for lighter loads. To
calculate the minimum input voltage for the maximum load current used in a given application, use the following equation:
V
V
V
I(min)
O(max)
DO(max load)
Because the TPS7201 is programmable, r
should be used to calculate V
DO
before applying the above equation. The equation for
DS(on)
is given in Note 3 under the TPS7201 electrical characteristics table. The minimum value of 3 V is the absolute
calculating V
DO
from r
DS(on)
lower limit for the recommended input-voltage range for the TPS7201.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
electrical characteristics, I = 10 mA, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), SENSE/FB shorted to OUT
O
O
(unless otherwise noted)
TPS72xxQ
TYP
‡
T
PARAMETER
TEST CONDITIONS
UNIT
µA
µA
A
J
MIN
MAX
225
325
0.5
1
25°C
–40°C to 125°C
25°C
180
EN ≤ 0.5 V,
V = V + 1 V,
I O
Ground current (active mode)
Input current (standby mode)
Output current limit threshold
0 mA ≤ I ≤ 250 mA
O
EN = V ,
3 V ≤ V ≤ 10 V
I
I
–40°C to 125°C
25°C
0.6
1
V
O
= 0 V
V = 10 V
I
–40°C to 125°C
25°C
1.5
0.5
1
Pass-element leakage current in
standby mode
µA
µA
EN = V ,
3 V ≤ V ≤ 10 V
I
I
–40°C to 125°C
25°C
0.5
0.5
V
PG
= 10 V,
Normal operation
PG leakage current
–40°C to 125°C
–40°C to 125°C
Output voltage temperature coefficient
Thermal shutdown junction temperature
31
75 ppm/°C
°C
165
3 V ≤ V ≤ 6 V
2
I
–40°C to 125°C
V
EN logic high (standby mode)
6 V ≤ V ≤ 10 V
2.7
I
25°C
–40°C to 125°C
25°C
0.5
V
3 V ≤ V ≤ 10 V
EN logic low (active mode)
EN hysteresis voltage
I
0.5
50
mV
25°C
–0.5
–0.5
0.5
µA
0.5
0 V ≤ V ≤ 10 V
EN input current
I
–40°C to 125°C
25°C
1.9
1.1
2.5
V
Minimum V for active pass element
I
–40°C to 125°C
25°C
2.5
1.5
V
Minimum V for valid PG
I
= 300 µA
I
PG
–40°C to 125°C
1.9
†
‡
CSR(compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any
series resistance added externally, and PWB trace resistance to C .
O
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
TPS7201Q electrical characteristics, I = 10 mA, V = 3.5 V, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), FB
O
I
O
shorted to OUT at device leads (unless otherwise noted)
TPS7201Q
TYP
‡
T
PARAMETER
UNIT
V
TEST CONDITIONS
J
MIN
MAX
V = 3.5 V,
I = 10 mA
O
25°C
1.188
Reference voltage (measured
at FB with OUT connected to
FB)
I
3 V ≤ V ≤ 10 V,
5 mA ≤ I ≤ 250 mA,
O
I
–40°C to 125°C 1.152
–40°C to 125°C
1.224
V
See Note 2
Reference voltage
temperature coefficient
31
75 ppm/°C
§
§
V = 2.4 V,
50 µA ≤ I ≤ 100 mA
25°C
25°C
2.1
2.9
1.6
I
O
V = 2.4 V,
I
100 mA ≤ I ≤ 200 mA
O
25°C
2.7
Ω
Pass-element series
resistance (see Note 3)
V = 2.9 V,
50 µA ≤ I ≤ 250 mA
O
I
–40°C to 125°C
25°C
4.5
V = 3.9 V,
50 µA ≤ I ≤ 250 mA
1
I
O
V = 5.9 V,
I
50 µA ≤ I ≤ 250 mA
25°C
0.8
O
25°C
23
V = 3 V to 10 V,
I
50 µA ≤ I ≤ 250 mA,
O
Input regulation
mV
36
See Note 2
–40°C to 125°C
25°C
15
17
60
50
25
I
= 5 mA to 250 mA, 3 V ≤ V ≤ 10 V,
I
O
See Note 2
–40°C to 125°C
25°C
36
Output regulation
mV
27
I
O
= 50 µA to 250 mA, 3 V ≤ V ≤ 10 V,
I
See Note 2
f = 120 Hz
–40°C to 125°C
43
25°C
–40°C to 125°C
25°C
49
32
45
30
I
I
= 50 µA
O
Ripple rejection
dB
= 250 mA,
O
See Note 2
–40°C to 125°C
25°C
Output noise spectral density
Output noise voltage
f = 120 Hz
2
µV/√Hz
µVrms
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
25°C
235
O
O
O
10 Hz ≤ f ≤ 100 kHz,
25°C
190
†
CSR = 1 Ω
25°C
125
0.95 ×
¶
V
FB
voltage decreasing from above V
PG
–40°C to 125°C
V
PG trip-threshold voltage
V
FB(nom)
¶
25°C
25°C
12
mV
Measured at V
PG hysteresis voltage
FB
0.1
0.1
0.4
V
¶
I
= 400 µA,
V = 2.13 V
I
PG output low voltage
PG
–40°C to 125°C
25°C
0.4
–10
–20
10
nA
20
FB input current
–40°C to 125°C
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
‡
§
¶
This voltage is not recommended.
Output voltage programmed to 2.5 V with closed-loop configuration (see application information).
NOTES: 2. When V < 2.9 V and I > 100 mA simultaneously, pass element r
increases (see Figure 10) to a point such that the resulting
I
O
DS(on)
dropout voltage prevents the regulator from maintaining the specified tolerance range.
3. To calculate dropout voltage, use equation:
V
DO
= I
r
O
DS(on)
r
is a function of both output current and input voltage. The parametric table lists r
for V = 2.4 V, 2.9 V, 3.9 V, and
I
DS(on)
DS(on)
5.9 V, which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V, 4 V, and 6 V, respectively. For other
programmed values, refer to Figures 10 and 11.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
TPS7225Q electrical characteristics, I =10mA, V = 3.5 V, EN = 0 V, C = 4.7 µF(CSR = 1 Ω), SENSE
O
I
O
shorted to OUT (unless otherwise noted)
TPS7225Q
TYP
‡
T
PARAMETER
UNIT
TEST CONDITIONS
= 10 mA
J
MIN
MAX
V = 3.5 V,
I
O
25°C
2.5
I
Output voltage
V
3.5 V ≤ V ≤ 10 V,
5 mA ≤ I ≤ 250 mA –40°C to 125°C
2.45
2.55
850
1.1
3.4
3.84
27
I
O
25°C
560
2.24
9
mV
V
I
O
= 250 mA,
V = 2.97 V
I
Dropout voltage
–40°C to 125°C
25°C
–40°C to 125°C
25°C
(2.97 V – V )/I ,
V = 2.97 V,
I
O
O
Pass-element series resistance
Input regulation
Ω
I
O
= 250 mA
V = 3.5 V to 10 V,
50 µA ≤ I ≤ 250 mA
mV
I
O
–40°C to 125°C
25°C
33
28
36
I
O
I
O
= 5 mA to 250 mA, 3.5 V ≤ V ≤ 10 V
I
–40°C to 125°C
25°C
60
Output regulation
Ripple rejection
mV
dB
24
41
= 50 µA to 250 mA, 3.5 V ≤ V ≤ 10 V
I
–40°C to 125°C
25°C
73
47
45
40
38
58
I
I
= 50 µA
O
–40°C to 125°C
25°C
f = 120 Hz
46
= 250 mA
O
–40°C to 125°C
25°C
Output noise spectral density
Output noise voltage
f = 120 Hz
2
µV/√Hz
µVrms
25°C
248
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
10 Hz ≤ f ≤ 100 kHz,
CSR =
25°C
200
†
25°C
130
0.95 ×
V
voltage decreasing from above V
PG
–40°C to 125°C
V
PG trip-threshold voltage
PG hysteresis voltage
O
V
O(nom)
50
25°C
25°C
mV
0.3
0.44
0.5
PG output low voltage
I
= 1.2 mA,
V = 2.13 V
I
V
PG
–40°C to 125°C
†
‡
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
TPS7230Q electrical characteristics, I = 10 mA, V = 4 V, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), SENSE
O
I
O
shorted to OUT (unless otherwise noted)
TPS7230Q
‡
T
PARAMETER
UNIT
TEST CONDITIONS
= 10 mA
J
MIN
TYP
MAX
V = 4 V,
I
O
25°C
3
I
Output voltage
V
4 V ≤ V ≤ 10 V,
5 mA ≤ I ≤ 250 mA –40°C to 125°C
2.94
3.06
185
270
502
900
2.01
3.6
27
I
O
25°C
145
390
1.56
9
I
= 100 mA,
= 250 mA,
V = 2.97 V
I
O
O
–40°C to 125°C
25°C
mV
Dropout voltage
I
V = 2.97 V
I
–40°C to 125°C
25°C
(2.97 V – V )/I ,
V = 2.97 V,
I
O
O
Pass-element series resistance
Input regulation
Ω
I
O
= 250 mA
–40°C to 125°C
25°C
V = 4 V to 10 V,
50 µA ≤ I ≤ 250 mA
mV
I
O
–40°C to 125°C
25°C
33
34
45
I
= 5 mA to 250 mA,
4 V ≤ V ≤ 10 V
I
O
O
–40°C to 125°C
25°C
74
Output regulation
Ripple rejection
mV
dB
42
60
I
= 50 µA to 250 mA, 4 V ≤ V ≤ 10 V
I
–40°C to 125°C
25°C
98
45
44
40
38
56
I
= 50 µA
O
O
–40°C to 125°C
25°C
f = 120 Hz
45
I
= 250 mA
–40°C to 125°C
25°C
Output noise spectral density
Output noise voltage
f = 120 Hz
2
256
µV/√Hz
µVrms
25°C
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
10 Hz ≤ f ≤ 100 kHz,
25°C
206
†
CSR = 1
25°C
132
0.95 ×
V
O
voltage decreasing from above V
PG
–40°C to 125°C
25°C
V
PG trip-threshold voltage
PG hysteresis voltage
V
O(nom)
50
mV
25°C
0.25
0.44
0.44
PG output low voltage
I
= 1.2 mA,
V = 2.55 V
I
V
PG
–40°C to 125°C
†
‡
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
TPS7233Q electrical characteristics, I =10mA, V = 4.3 V, EN = 0 V, C = 4.7 µF(CSR = 1 Ω), SENSE
O
I
O
shorted to OUT (unless otherwise noted)
TPS7233Q
TYP
‡
T
PARAMETER
UNIT
TEST CONDITIONS
= 10 mA
J
MIN
MAX
V = 4.3 V,
I
O
25°C
3.3
I
Output voltage
V
4.3 V ≤ V ≤ 10 V,
5 mA ≤ I ≤ 250 mA –40°C to 125°C
3.23
3.37
20
I
O
25°C
14
140
360
1.5
8
I
O
I
O
I
O
= 10 mA,
= 100 mA,
= 250 mA,
V = 3.23 V
I
–40°C to 125°C
25°C
30
180
232
460
610
1.84
2.5
25
V = 3.23 V
I
mV
Dropout voltage
–40°C to 125°C
25°C
V = 3.23 V
I
–40°C to 125°C
25°C
(3.23 V – V )/I ,
V = 3.23 V,
I
O
O
Pass-element series resistance
Input regulation
Ω
I
O
= 250 mA
–40°C to 125°C
25°C
V = 4.3 V to 10 V,
50 µA ≤ I ≤ 250 mA
mV
I
O
–40°C to 125°C
25°C
33
32
42
I
I
= 5 mA to 250 mA, 4.3 V ≤ V ≤ 10 V
I
O
–40°C to 125°C
25°C
71
Output regulation
Ripple rejection
mV
dB
41
55
= 50 µA to 250 mA, 4.3 V ≤ V ≤ 10 V
O
I
–40°C to 125°C
25°C
98
40
38
35
33
52
I
I
= 50 µA
O
–40°C to 125°C
25°C
f = 120 Hz
44
= 250 mA
O
–40°C to 125°C
25°C
Output noise spectral density
Output noise voltage
f = 120 Hz
2
µV/√Hz
µVrms
25°C
265
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
10 Hz ≤ f ≤ 100 kHz,
CSR = 1 Ω
25°C
212
†
25°C
135
0.95 ×
V
voltage decreasing from above V
PG
–40°C to 125°C
V
PG trip-threshold voltage
PG hysteresis voltage
O
V
O(nom)
32
25°C
25°C
mV
0.22
0.4
0.4
PG output low voltage
I
= 1.2 mA,
V = 2.8 V
I
V
PG
–40°C to 125°C
†
‡
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
TPS7248Q electrical characteristics, I = 10 mA, V = 5.85 V, EN = 0 V, C = 4.7 µF (CSR = 1 Ω),
O
I
O
SENSE shorted to OUT (unless otherwise noted)
TPS7248Q
TYP
‡
T
J
PARAMETER
UNIT
TEST CONDITIONS
MIN
MAX
V = 5.85 V,
I
= 10 mA
25°C
4.85
I
O
Output voltage
V
5.85 V ≤ V ≤ 10 V,
5 mA ≤ I ≤ 250 mA –40°C to 125°C
4.75
4.95
19
I
O
25°C
10
90
I
O
I
O
I
O
= 10 mA,
= 100 mA,
= 250 mA,
V = 4.75 V
I
–40°C to 125°C
25°C
30
100
150
250
285
1
V = 4.75 V
I
mV
Dropout voltage
–40°C to 125°C
25°C
216
0.8
V = 4.75 V
I
–40°C to 125°C
25°C
(4.75 V – V )/I ,
V = 4.75 V,
I
O
O
Pass-element series resistance
Input regulation
Ω
I
O
= 250 mA
–40°C to 125°C
25°C
1.4
34
V = 5.85 V to 10 V,
I
50 µA ≤ I ≤ 250 mA
mV
O
–40°C to 125°C
25°C
50
43
55
53
46
55
I
I
= 5 mA to 250 mA,
5.85 V ≤ V ≤ 10 V
I
O
–40°C to 125°C
25°C
95
Output regulation
Ripple rejection
mV
dB
75
= 50 µA to 250 mA, 5.85 V ≤ V ≤ 10 V
O
I
–40°C to 125°C
25°C
135
42
36
36
34
I
I
= 50 µA
O
–40°C to 125°C
25°C
f = 120 Hz
= 250 mA
O
–40°C to 125°C
25°C
Output noise spectral density
Output noise voltage
f = 120 Hz
2
370
µV/√Hz
µVrms
25°C
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
10 Hz ≤ f ≤ 100 kHz,
25°C
290
†
CSR = 1 Ω
25°C
168
0.95 ×
V
O
voltage decreasing from above V
PG
–40°C to 125°C
25°C
V
PG trip-threshold voltage
PG hysteresis voltage
V
O(nom)
50
mV
25°C
0.2
0.4
0.4
PG output low voltage
I
= 1.2 mA,
V = 4.12 V
I
V
PG
–40°C to 125°C
†
‡
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
TPS7250Q electrical characteristics, I = 10 mA, V = 6 V, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), SENSE
O
I
O
shorted to OUT (unless otherwise noted)
TPS7250Q
‡
T
PARAMETER
UNIT
TEST CONDITIONS
= 10 mA
J
MIN
TYP
MAX
V = 6 V,
I
O
25°C
5
I
Output voltage
V
6 V ≤ V ≤ 10 V,
5 mA ≤ I ≤ 250 mA –40°C to 125°C
4.9
5.1
12
I
O
25°C
8
76
I
O
I
O
I
O
= 10 mA,
= 100 mA,
= 250 mA,
V = 4.88 V
I
–40°C to 125°C
25°C
30
85
V = 4.88 V
I
mV
Dropout voltage
–40°C to 125°C
25°C
136
206
312
0.825
1.25
28
190
0.76
V = 4.88 V
I
–40°C to 125°C
25°C
(4.88 V – V )/I ,
V = 4.88 V,
I
O
O
Pass-element series resistance
Input regulation
Ω
I
O
= 250 mA
–40°C to 125°C
25°C
V = 6 V to 10 V,
50 µA ≤ I ≤ 250 mA
mV
I
O
–40°C to 125°C
25°C
35
46
59
52
46
61
I
I
= 5 mA to 250 mA, 6 V ≤ V ≤ 10 V
I
O
–40°C to 125°C
25°C
100
79
Output regulation
Ripple rejection
mV
dB
= 50 µA to 250 mA, 6 V ≤ V ≤ 10 V
O
I
–40°C to 125°C
25°C
150
41
37
36
32
I
I
= 50 µA
O
–40°C to 125°C
25°C
f = 120 Hz
= 250 mA
O
–40°C to 125°C
25°C
Output noise spectral density
Output noise voltage
f = 120 Hz
2
390
µV/√Hz
µVrms
25°C
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
10 Hz ≤ f ≤ 100 kHz,
CSR = 1 Ω
25°C
300
†
25°C
175
0.95 ×
V
voltage decreasing from above V
PG
–40°C to 125°C
V
PG trip-threshold voltage
PG hysteresis voltage
O
V
O(nom)
50
25°C
25°C
mV
0.19
0.4
0.4
PG output low voltage
I
= 1.2 mA,
V = 4.25 V
I
V
PG
–40°C to 125°C
†
‡
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
electrical characteristics, I = 10 mA, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), T = 25°C, SENSE/FB
O
O
J
shorted to OUT (unless otherwise noted)
TPS72xxY
‡
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
EN ≤ 0.5 V,
0 mA ≤ I ≤ 250 mA
V = V + 1 V,
I O
Ground current (active mode)
180
µA
O
Output current limit threshold
Thermal shutdown junction temperature
EN hysteresis voltage
V
= 0 V,
V = 10 V
I
0.6
165
50
A
°C
mV
V
O
Minimum V for active pass element
1.9
1.1
I
Minimum V for valid PG
I
= 300 µA
V
I
PG
†
electrical characteristics, I = 10 mA, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), T = 25°C, FB shorted to
O
O
J
OUT at device leads (unless otherwise noted)
TPS7201Y
TYP
‡
PARAMETER
UNIT
TEST CONDITIONS
MIN
MAX
Reference voltage (measured at FB with OUT
connected to FB)
V = 3.5 V,
I
I
O
= 10 mA
1.188
V
§
§
V = 2.4 V,
50 µA ≤ I ≤ 100 mA
2.1
2.9
1.6
1
I
O
V = 2.4 V,
I
100 mA ≤ I ≤ 200 mA
O
V = 2.9 V,
I
50 µA ≤ I ≤ 250 mA
Ω
Pass-element series resistance (see Note 3)
O
V = 3.9 V,
50 µA ≤ I ≤ 250 mA
O
I
V = 5.9 V,
I
50 µA ≤ I ≤ 250 mA
0.8
O
3 V ≤ V ≤ 10 V,
See Note 2
I
O
= 5 mA to 250 mA,
I
15
Output regulation
mV
3 V ≤ V ≤ 10 V,
See Note 2
I
= 50 µA to 250 mA,
I
O
17
60
50
I
I
= 50 µA
O
V = 3.5 V,
I
f = 120 Hz
Ripple rejection
dB
= 250 mA,
O
See Note 2
Output noise spectral density
V = 3.5 V,
I
f = 120 Hz
2
235
190
125
12
µV/√Hz
µVrms
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
V = 3.5 V,
I
Output noise voltage
10 Hz ≤ f ≤ 100 kHz,
†
CSR = 1 Ω
¶
mV
V
V = 3.5 V,
I
Measured at V
FB
PG hysteresis voltage
¶
V = 2.13 V,
I
I
= 400 µA
0.1
0.1
PG output low voltage
PG
FB input current
nA
V = 3.5 V
I
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
This voltage is not recommended.
Output voltage programmed to 2.5 V with closed-loop configuration (see application information).
.
O
‡
§
¶
NOTES:
2
3
When V < 2.9 V and I > 100 mA simultaneously, pass element r increases (see Figure 10) to a point such that the resulting
dropout voltage prevents the regulator from maintaining the specified tolerance range.
To calculate dropout voltage, use equation:
I
O
DS(on)
V
DO
= I
r
O
DS(on)
r
is a function of both output current and input voltage. The parametric table lists r
for V = 2.4 V, 2.9 V, 3.9 V, and
I
DS(on)
DS(on)
5.9 V, which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V, 4 V, and 6 V, respectively. For other
programmed values, refer to Figures 10 and 11.
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
electrical characteristics, I = 10 mA, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), T = 25°C, FB shorted to
O
O
J
OUT at device leads (unless otherwise noted)
TPS7225Y
MIN TYP
‡
PARAMETER
UNIT
TEST CONDITIONS
MAX
Output voltage
Dropout voltage
V = 3.5 V,
I
I
= 10 mA
2.5
V
I
O
V = 2.97 V,
I
= 250 mA
560
mV
O
(2.97 V – V )/I ,
V = 2.97 V,
I
O
O
Pass-element series resistance
Input regulation
2.24
Ω
I
O
= 250 mA
V = 3.5 V to 10 V,
I
50 µA ≤ I ≤ 250 mA
9
28
mV
O
3.5 V ≤ V ≤ 10 V
I
O
I
O
I
O
I
O
= 5 mA to 250 mA
= 50 µA to 250 mA
= 50 µA
I
Output regulation
mV
3.5 V ≤ V ≤ 10 V
24
I
58
V = 3.5 V,
I
f = 120 Hz
Ripple rejection
dB
= 250 mA
46
Output noise spectral density
V = 3.5 V,
I
f = 120 Hz
2
µV/√Hz
248
200
130
50
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
V = 3.5 V,
I
10 Hz ≤ f ≤ 100 kHz,
Output noise voltage
µVrms
†
CSR = 1 Ω
mV
V
PG hysteresis voltage
PG output low voltage
V = 3.5 V
I
V = 2.13 V
I
I
= 1.2 mA
0.3
PG
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
‡
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
electrical characteristics, I = 10 mA, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), T = 25°C, SENSE shorted
O
O
J
to OUT (unless otherwise noted)
TPS7230Y
MIN TYP
‡
PARAMETER
UNIT
V
TEST CONDITIONS
MAX
Output voltage
V = 4 V,
I
O
I
O
I
O
= 10 mA
= 100 mA
= 250 mA
3
145
390
I
V = 2.97 V,
I
mV
Dropout voltage
V = 2.97 V,
I
(2.97 V – V )/I ,
V = 2.97 V,
I
O
O
Pass-element series resistance
Input regulation
1.56
Ω
I
O
= 250 mA
V = 4 V to 10 V,
I
50 µA ≤ I ≤ 250 mA
9
34
mV
O
4 V ≤ V ≤ 10 V
I
O
I
O
I
O
I
O
= 5 mA to 250 mA
= 50 µA to 250 mA
= 50 µA
I
Output regulation
mV
4 V ≤ V ≤ 10 V
41
I
56
V = 4 V,
I
f = 120 Hz
Ripple rejection
dB
= 250 mA
45
Output noise spectral density
V = 4 V,
I
f = 120 Hz
2
µV/√Hz
256
206
132
50
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
V = 4 V,
I
10 Hz ≤ f ≤ 100 kHz,
Output noise voltage
µVrms
†
CSR = 1 Ω
mV
V
PG hysteresis voltage
PG output low voltage
V = 4 V
I
V = 2.55 V
I
I
= 1.2 mA
0.25
PG
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
‡
TPS7233Y
‡
PARAMETER
UNIT
TEST CONDITIONS
MIN TYP
MAX
Output voltage
V = 4.3 V,
I
O
I
O
I
O
I
O
= 10 mA
= 10 mA
= 100 mA
= 250 mA
3.3
14
V
I
V = 3.23 V,
I
V = 3.23 V,
I
140
360
mV
Dropout voltage
V = 3.23 V,
I
(3.23 V – V )/I ,
V = 3.23 V,
I
O
O
Pass-element series resistance
Input regulation
1.5
Ω
I
O
= 250 mA
V = 4.3 V to 10 V,
I
50 µA ≤ I ≤ 250 mA
8
32
mV
O
4.3 V ≤ V ≤ 10 V,
I
O
I
O
I
O
I
O
= 5 mA to 250 mA
= 50 µA to 250 mA
= 50 µA
I
Output regulation
mV
4.3 V ≤ V ≤ 10 V,
41
I
52
V = 4.3 V,
I
f = 120 Hz
Ripple rejection
dB
= 250 mA
44
Output noise spectral density
V = 4.3 V,
I
f = 120 Hz
2
µV/√Hz
265
212
135
32
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
V = 4.3 V,
I
10 Hz ≤ f ≤ 100 kHz,
Output noise voltage
µVrms
†
CSR = 1 Ω
mV
V
PG hysteresis voltage
PG output low voltage
V = 4.3 V
I
V = 2.8 V,
I
I
= 1.2 mA
0.22
PG
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
‡
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
†
electrical characteristics, I = 10 mA, EN = 0 V, C = 4.7 µF (CSR = 1 Ω), T = 25°C, SENSE shorted
O
O
J
to OUT (unless otherwise noted) (continued)
TPS7248Y
MIN TYP
‡
PARAMETER
UNIT
TEST CONDITIONS
MAX
Output voltage
Dropout voltage
V = 5.85 V,
I
O
I
O
I
O
I
O
= 10 mA
= 10 mA
= 100 mA
= 250 mA
4.85
10
V
I
V = 4.75 V,
I
V = 4.75 V,
I
90
mV
V = 4.75 V,
I
216
(4.75 V – V )/I ,
V = 4.75 V,
I
O
O
Pass-element series resistance
Output regulation
0.8
Ω
I
O
= 250 mA
5.85 V ≤ V ≤ 10 V
I
O
I
O
I
O
I
O
= 5 mA to 250 mA
= 50 µA to 250 mA
= 50 µA
43
55
I
mV
5.85 V ≤ V ≤ 10 V
I
53
V = 5.85 V,
I
f = 120 Hz
Ripple rejection
dB
= 250 mA
46
Output noise spectral density
V = 5.85 V,
I
f = 120 Hz
2
µV/√Hz
370
290
168
50
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
V = 5.85 V,
I
10 Hz ≤ f ≤ 100 kHz,
Output noise voltage
µVrms
†
CSR = 1 Ω
mV
V
PG hysteresis voltage
PG output low voltage
V = 5.85 V
I
V = 4.12 V
I
I
= 1.2 mA
0.2
PG
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
‡
TPS7250Y
‡
PARAMETER
UNIT
TEST CONDITIONS
MIN TYP
MAX
Output voltage
V = 6 V,
I
O
I
O
I
O
I
O
= 10 mA
= 10 mA
= 100 mA
= 250 mA
5
8
V
I
V = 4.88 V
I
V = 4.88 V
I
76
mV
Dropout voltage
V = 4.88 V,
I
190
(4.88 V – V )/I ,
V = 4.88 V,
I
O
O
Pass-element series resistance
Input regulation
0.76
Ω
I
O
= 250 mA
V = 6 V to 10 V,
I
50 µA ≤ I ≤ 250 mA
mV
O
6 V ≤ V ≤ 10 V,
I
O
I
O
I
O
I
O
= 5 mA to 250 mA
= 50 µA to 250 mA
= 50 µA
46
59
I
Output regulation
mV
6 V ≤ V ≤ 10 V,
I
52
V = 6 V,
I
f = 120 Hz
Ripple rejection
dB
= 250 mA
46
Output noise spectral density
V = 6 V,
I
f = 120 Hz
2
µV/√Hz
390
300
175
50
C
C
C
= 4.7 µF
= 10 µF
= 100 µF
O
O
O
V = 6 V,
I
10 Hz ≤ f ≤ 100 kHz,
Output noise voltage
µVrms
†
CSR = 1 Ω
mV
V
PG hysteresis voltage
PG output low voltage
V = 6 V
I
V = 4.25 V,
I
I
= 1.2 mA
0.19
PG
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
.
O
‡
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Output current
vs Input voltage
5
6
I
Q
Quiescent current
†
∆I
Change in quiescent current
Dropout voltage
vs Free-air temperature
vs Output current
vs Free-air temperature
vs Output current
vs Input voltage
7
Q
V
8
DO
∆V
Change in dropout voltage
Dropout voltage (TPS7201 only)
Pass-element series resistance
Change in output voltage
Output voltage
9
DO
V
10
11
12
13
DO
r
DS(on)
∆V
vs Free-air temperature
vs Input voltage
O
V
O
Line regulation
(TPS7201, TPS7233, TPS7248, TPS7250)
14
Load regulation
(TPS7225, TPS7233, TPS7248, TPS7250)
15
16
V
Power-good (PG) voltage
vs Output voltage
O(PG)
r
Power-good (PG) on-resistance
vs Input voltage
17
18
19
20
21
22
23
24
25
26
27
28
29
30
DS(on)PG
V
Minimum input voltage for valid PG
Output voltage response from enable (EN)
Load transient response (TPS7201/TPS7233)
Load transient response (TPS7248/TPS7250)
Line transient response (TPS7201)
Line transient response (TPS7233)
Line transient response (TPS7248/TPS7250)
Ripple rejection
vs Free-air temperature
I
vs Frequency
vs Frequency
Output Spectral Noise Density
vs Output current (C = 4.7 µF)
O
vs Added ceramic capacitance (C = 4.7 µF)
O
Compensation series resistance (CSR)
vs Output current (C = 10 µF)
O
vs Added ceramic capacitance (C = 10 µF)
O
†
This symbol is not currently listed within EIA or JEDEC standards for semiconductor symbology.
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
QUIESCENT CURRENT
QUIESCENT CURRENT
vs
vs
OUTPUT CURRENT
INPUT VOLTAGE
230
220
210
200
190
180
170
250
200
T
A
= 25°C
TPS7248
T
25°C
= 250 mA
TPS7248 V = 10 V
A
I
I
O
TPS7233
TPS7233 V = 10 V
I
150
100
TPS7250 V = 10 V
I
TPS7201 With
V
O
Programmed to 2.5 V
TPS7248 V = 5.85 V
I
TPS7250
TPS7250 V = 6.0 V
I
50
0
160
150
TPS7233 V = 4.3 V
I
0
50
100
150
200
250
0
1
2
3
4
5
6
7
8
9
10
I
O
– Output Current – mA
V – Input Voltage – V
I
Figure 5
Figure 6
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
CHANGE IN QUIESCENT CURRENT
vs
FREE-AIR TEMPERATURE
600
500
400
300
200
50
I
= 10 mA
T
A
= 25°C
O
I
V = V + 1 V
O
40
30
20
10
TPS7225
TPS7230
TPS7233
TPS7248
0
–10
–20
100
0
TPS7250
150
–30
– 40
0
50
100
200
250
– 40 – 20
0
20
40 60
80 100 120 140
T
A
– Free-Air Temperature – °C
I
O
– Output Current – mA
Figure 7
Figure 8
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
TPS7201
DROPOUT VOLTAGE
vs
CHANGE IN DROPOUT VOLTAGE
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
1.6
1.4
1.2
0.05
†
V = 2.4 V
I
0.04
0.03
0.02
0.01
TPS7230
TPS7233
†
V = 2.6 V
I
V = 2.9 V
I
1
0.8
0.6
0.4
V = 3.2 V
I
V = 3.9 V
I
TPS7248/TPS7250
0
V = 5.9 V
I
V = 9.65 V
I
–0.01
–0.02
0.2
0
–0.03
–0.04
0
50
100
150
200
250
–40 –20
0
20
40
60 80 100 120
140
I
– Output Current – mA
T
A
– Free-Air Temperature – °C
O
†
This voltage is not recommended.
Figure 9
Figure 10
CHANGE IN OUTPUT VOLTAGE
vs
PASS ELEMENT SERIES RESISTANCE
vs
FREE-AIR TEMPERATURE
INPUT VOLTAGE
15
10
6
5
4
3
2
1
0
T
V
= 25°C
A
I
= 10 mA
O
I
= 1.12 V
FB
V = V + 1 V
O
5
0
I
= 250 mA
O
–5
–10
–15
I
O
= 100 mA
–20
–25
2
3
4
5
6
7
8
9
10
–40 –20
0
20 40
60
80 100 120 140
V – Input Voltage – V
I
T
A
– Free-Air Temperature – °C
Figure 11
Figure 12
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
LINE REGULATION
TPS7201 With
5.5
5
25
20
T
= 25°C
= 250 mA
A
T
= 25°C
= 250 mA
TPS7250
TPS7248
A
I
O
I
O
4.5
4
15
10
V
Programmed to 2.5 V
O
3.5
3
5
TPS7233
TPS7233
0
2.5
2
–5
–10
–15
TPS7248
TPS7250
TPS7201 With
1.5
1
V
O
Programmed to 2.5 V
–20
–25
0.5
0
0
1
2
3
4
5
6
7
8
9
10
4
4.5
5
5.5
6
6.5
7
7.5
8
8.5
9
9.5 10
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 13
Figure 14
POWER-GOOD (PG) VOLTAGE
vs
†
OUTPUT VOLTAGE
LOAD REGULATION
6
50
40
T
= 25°C
A
T
A
= 25°C
PG Pulled Up to V With 5 kΩ Resistor
I
V
I
30
20
10
TPS7233
0
–10
–20
–30
TPS7225
TPS7248
TPS7250
GND
0
–40
–50
92
93
94
95
96
97
98
0
50
100
150
200
250
V
– Output Voltage – %
O
I
O
– Output Current – mA
†
V
O
as a percent of V nom.
O
Figure 15
Figure 16
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
MINIMUM INPUT VOLTAGE FOR VALID PG
POWER-GOOD (PG) ON-RESISTANCE
vs
vs
FREE-AIR TEMPERATURE
INPUT VOLTAGE
1.3
1.125
1.12
100
10
T
A
= 25°C
1.115
1.11
1
0
1.105
1.1
1.095
–40 –20
0
T
20
40
60
80 100 120 140
1
1.5
2
2.5
3
3.5
4
4.5
5
– Free-Air Temperature – °C
V – Input Voltage – V
I
A
Figure 17
Figure 18
OUTPUT VOLTAGE RESPONSE FROM
ENABLE (EN)
10
T
= 25°C
A
I
O
C = 0
C
5
0
= 4.7 µF (CSR = 1 Ω)
V
O
nom
0
50
100
150
t – Time – µs
Figure 19
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
TPS7201 (WITH V PROGRAMMED TO 2.5 V), TPS7233
O
LOAD TRANSIENT RESPONSE
200
100
0
T
= 25°C
A
I
I
O
–100
–200
V = 6 V
C = 0
C
= 4.7 µF (CSR = 1 Ω)
105
55
5
0
100
200
300
400
500
t – Time – µs
Figure 20
TPS7248/TPS7250
LOAD TRANSIENT RESPONSE
200
100
0
T
= 25°C
A
I
I
O
–100
–200
V = 6 V
C = 0
C
= 4.7 µF (CSR = 1 Ω)
105
55
5
0
100
200
300
400
500
t – Time – µs
Figure 21
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
TPS7201 WITH V PROGRAMMED TO 2.5 V
O
LINE TRANSIENT RESPONSE
100
50
0
T
= 25°C
A
I
O
–50
–100
C = 0
C
= 4.7 µF (CSR = 1 Ω)
6.5
6.25
6
0
100
200
300
400
t – Time – µs
Figure 22
TPS7233
LINE TRANSIENT RESPONSE
200
100
0
–50
–100
T
= 25°C
A
I
O
C = 0
C
= 4.7 µF (CSR = 1 Ω)
6.5
6.25
6
5.75
0
100
200
300
400
500
t – Time – µs
Figure 23
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
TPS7248/TPS7250
LINE TRANSIENT RESPONSE
100
50
0
–50
T
= 25°C
A
I
O
–100
C = 0
C
= 4.7 µF (CSR = 1 Ω)
6.5
6.25
6
0
100
200
300
400
500
t – Time – µs
Figure 24
RIPPLE REJECTION
vs
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
FREQUENCY
60
50
10
TPS7233
T
= 25°C
A
T
= 25°C
A
No Input
Capacitance Added
V = V + 1 V
No Input Capacitance Added
V = V + 1 V
I
O
I
O
I
C
= 100 mA
O
C
= 4.7 µF (CSR = 1 Ω)
O
= 4.7 µF (CSR = 1 Ω)
O
40
30
20
1
TPS7248/
TPS7250
TPS7201 With
C
= 10 µF (CSR = 1 Ω)
O
V
O
Programmed
to 2.5 V
0.1
10
0
C
= 100 µF (CSR = 1 Ω)
O
0.01
10
100
1 K
10 K
100 K
1 M
10 M
10
100
1 k
10 k
100 k
f – Frequency – Hz
f – Frequency – Hz
Figure 25
Figure 26
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
TYPICAL CHARACTERISTICS
TYPICAL REGIONS OF STABILITY
TYPICAL REGIONS OF STABILITY
COMPENSATION SERIES RESISTANCE (CSR)
vs
†
†
COMPENSATION SERIES RESISTANCE (CSR)
vs
OUTPUT CURRENT
ADDED CERAMIC CAPACITANCE
100
100
T
= 25°C
Region of
Instability
A
I
Region of Instability
V = V + 1 V
O
I
C
= 250 mA
O
= 4.7 µF
O
10
1
10
No Input Capacitor Added
1
T
= 25°C
A
I
O
V = V + 1 V
C
O
0.1
0.1
= 4.7 µF
Region of Instability
No Added Ceramic Capacitance
No Input Capacitance Added
Region of Instability
50 100
0.01
0.01
0
150
200
250
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
I
O
– Output Current – mA
Added Ceramic Capacitance – µF
Figure 27
Figure 28
TYPICAL REGIONS OF STABILITY
TYPICAL REGIONS OF STABILITY
†
†
COMPENSATION SERIES RESISTANCE (CSR)
COMPENSATION SERIES RESISTANCE (CSR)
vs
vs
OUTPUT CURRENT
ADDED CERAMIC CAPACITANCE
100
100
10
T
= 25°C
Region of
Instability
A
I
Region of Instability
V = V + 1 V
O
I
C
= 250 mA
O
= 10 µF
O
10
1
No Input Capacitor Added
T
= 25°C
A
I
C
V = V + 1 V
O
1
= 10 µF
O
No Added Ceramic Capacitance
No Input Capacitor Added
0.1
0.1
Region of Instability
Region of Instability
0.01
0.01
0
50
100
150
200
250
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
I
O
– Output Current – mA
Added Ceramic Capacitance – µF
Figure 29
Figure 30
†
CSRreferstothetotalseriesresistance, includingtheESRofthecapacitor, anyseriesresistanceaddedexternally, andPWBtraceresistance
to C
.
O
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
APPLICATION INFORMATION
The design of the TPS72xx family of low-dropout (LDO) regulators is based on the higher-current TPS71xx
family. These new families of regulators have been optimized for use in battery-operated equipment and feature
extremely low dropout voltages, low supply currents that remain constant over the full-output-current range of
the device, and an enable input to reduce supply currents to less than 0.5 µA when the regulator is turned off.
device operation
The TPS72xx uses a PMOS pass element to dramatically reduce both dropout voltage and supply current over
more conventional PNP-pass-element LDO designs. The PMOS transistor is a voltage-controlled device that,
unlike a PNP transistor, does not require increased drive current as output current increases. Supply current
in the TPS72xx is essentially constant from no-load to maximum.
Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation.
Thedeviceswitchesintoaconstant-currentmodeatapproximately1A;furtherloadincreasesreducetheoutput
voltage instead of increasing the output current. The thermal protection shuts the regulator off if the junction
temperature rises above 165°C. Recovery is automatic when the junction temperature drops approximately 5°C
below the high temperature trip point. The PMOS pass element includes a back diode that safely conducts
reverse current when the input voltage level drops below the output voltage level.
A logic high on the enable input, EN, shuts off the output and reduces the supply current to less than 0.5 µA.
EN should be grounded in applications where the shutdown feature is not used.
Power good (PG) is an open-drain output signal used to indicate output-voltage status. A comparator circuit
continuously monitors the output voltage. When the output drops to approximately 95% of its nominal regulated
value, the comparator turns on and pulls PG low.
Transient loads or line pulses can also cause activation of PG if proper care is not taken in selecting the input
and output capacitors. Load transients that are faster than 5 µs can cause a signal on PG if high-ESR output
capacitors (greater than approximately 7 Ω) are used. A 1-µs transient causes a PG signal when using an output
capacitorwithgreaterthan3.5ΩofESR. Itisinterestingtonotethattheoutput-voltagespikeduringthetransient
can drop well below the reset threshold and still not trip if the transient duration is short. A 1-µs transient must
drop at least 500 mV below the threshold before tripping the PG circuit. A 2-µs transient trips PG at just 400 mV
below the threshold. Lower-ESR output capacitors help by reducing the drop in output voltage during a transient
and should be used when fast transients are expected.
A typical application circuit is shown in Figure 31.
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
APPLICATION INFORMATION
TPS72xx
(see Note A)
5
6
2
1
7
8
V
IN
IN
PG
PG
I
250 kΩ
SENSE
OUT
V
O
C1
0.1 µF
4
EN
OUT
+
10 µF
GND
CSR = 1 Ω
3
NOTE A: TPS7225, TPS7230, TPS7233, TPS7248, TPS7250
(fixed-voltage options).
Figure 31. Typical Application Circuit
external capacitor requirements
Although not required, a 0.047-µF to 0.1-µF ceramic bypass input capacitor, connected between IN and GND
and located close to the TPS72xx, is recommended to improve transient response and noise rejection. A
higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated
and the device is located several inches from the power source.
An output capacitor is required to stabilize the internal feedback loop. For most applications, a 10-µF to 15-µF
solid-tantalum capacitor with a 0.5-Ω resistor (see capacitor selection table) in series issufficient. The maximum
capacitor ESR should be limited to 1.3 Ω to allow for ESR doubling at cold temperatures. Figure 32 shows the
transient response of a 5-mA to 85-mA load using a 10-µF output capacitor with a total ESR of 1.7 Ω.
A 4.7-µF solid-tantalum capacitor in series with a 1-Ω resistor may also be used (see Figures 27 and 28)
provided the ESR of the capacitor does not exceed 1 Ω at room temperature and 2 Ω over the full operating
temperature range.
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
APPLICATION INFORMATION
V = V + 1 V
I
O
V
O
1→
I
= 85 mA
= 5 mA
O
I
O
2→
Ch 2
Ch1 50 mV
50 mA
100 µs/div
Figure 32. Load Transient Response (CSR total = 1.7 Ω), TPS7248Q
A partial listing of surface-mount capacitors usable with the TPS72xx family is provided below. This information
(along with the stability graphs, Figures 27 through 30) is included to assist the designer in selecting suitable
capacitors.
CAPACITOR SELECTION
†
†
PART NO.
MFR.
VALUE
MAX ESR
SIZE (H × L × W)
1.2 × 7.2 × 6
592D156X0020R2T
595D156X0025C2T
595D106X0025C2T
695D106X0035G2T
Sprague
Sprague
Sprague
Sprague
15 µF, 20 V
15 µF, 25 V
10 µF, 25 V
10 µF, 35 V
1.1
1
2.5 × 7.1 × 3.2
2.5 × 7.1 × 3.2
2.5 × 7.6 × 2.5
1.2
1.3
†
Size is in mm. ESR is maximum resistance in ohms at 100 kHz and T = 25°C. Listings are sorted by height.
A
sense-pin connection
SENSE must be connected to OUT for proper operation of the regulator. Normally this connection should be
as short as possible; however, remote sense may be implemented in critical applications when proper care of
the circuit path is exercised. SENSE internally connects to a high-impedance wide-bandwidth amplifier through
a resistor-divider network, and any noise pickup on the PCB trace will feed through to the regulator output.
SENSE must be routed to minimize noise pickup. Filtering SENSE using an RC network is not recommended
because of the possibility of inducing regulator instability.
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
APPLICATION INFORMATION
output voltage programming
The output voltage of the TPS7201 adjustable regulator is programmed using an external resistor divider as
shown in Figure 33. The output voltage is calculated using:
R1
R2
(1)
V
V
1
O
ref
Where:
V
= 1.188 V typ (the internal reference voltage)
ref
Resistors R1 and R2 should be chosen for approximately 7-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 169 kΩ to set the divider current at 7 µA and then calculate R1 using:
V
O
R1
1
R2
(2)
V
ref
OUTPUT VOLTAGE
PROGRAMMING GUIDE
TPS7201
IN
5
6
DIVIDER RESISTANCE
OUTPUT
VOLTAGE
(V)
†
(kΩ)
2
8
V
I
IN
PG
Power-Good Indicator
250 kΩ
R1
R2
0.1 µF
OUT
2.5
3.3
3.6
4
191
309
348
402
549
750
169
169
169
169
169
169
>2.7 V
4
7
V
O
EN
OUT
FB
<0.4 V
R1
R2
+
1
10 µF
CSR = 1 Ω
5
GND
3
6.4
†
1% values shown.
Figure 33. TPS7201 Adjustable LDO Regulator Programming
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
APPLICATION INFORMATION
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
allowableto avoid damaging the device is 150°C. These restrictions limit the power dissipation that the regulator
can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate
the maximum allowable dissipation, P
, and the actual dissipation, P , which must be less than or equal
D(max)
D
to P
.
D(max)
The maximum-power-dissipation limit is determined using the following equation:
T max
J
T
A
P
D(max)
R
JA
Where:
T max is the maximum allowable junction temperature, i.e.,150°C absolute maximum and 125°C
J
recommended operating temperature.
R
is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal
θJA
SOIC and 238°C/W for the 8-terminal TSSOP.
T is the ambient temperature.
A
The regulator dissipation is calculated using:
P
V
V
I
D
I
O
O
Power dissipation resulting from quiescent current is negligible.
regulator protection
The TPS72xx PMOS-pass transistor has a built-in back diode that safely conducts reverse currents when the
input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output
to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be
appropriate.
The TPS72xx also features internal current limiting and thermal protection. During normal operation, the
TPS72xx limits output current to approximately 1 A. When current limiting engages, the output voltage scales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of
the device exceeds 165°C, thermal-protection circuitry shuts it down. Once the device has cooled, regulator
operation resumes.
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.010 (0,25)
M
0.014 (0,35)
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
0.016 (0,40)
A
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
MECHANICAL DATA
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE PACKAGE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0°–15°
0.021 (0,53)
0.015 (0,38)
0.010 (0,25)
M
0.010 (0,25) NOM
4040082/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
MECHANICAL DATA
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0,30
0,65
M
0,10
0,19
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
0,75
0,50
A
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4040064/E 08/96
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2007
PACKAGING INFORMATION
Orderable Device
TPS7201QD
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7201QDG4
TPS7201QDR
TPS7201QDRG4
TPS7201QP
SOIC
SOIC
D
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TPS7201QPE4
TPS7201QPW
TPS7201QPWG4
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TSSOP
TSSOP
PW
PW
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7201QPWLE
TPS7201QPWR
OBSOLETE TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7201QPWRG4
TPS7225QD
PW
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7225QDG4
TPS7225QDR
TPS7225QDRG4
TPS7225QP
SOIC
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TPS7225QPE4
TPS7225QPWR
TPS7225QPWRG4
TPS7230QD
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TSSOP
TSSOP
SOIC
PW
PW
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7230QDR
TPS7230QDRG4
TPS7230QP
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TPS7230QPE4
TPS7230QPWR
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TSSOP
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2007
Orderable Device
TPS7230QPWRG4
TPS7233QD
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
PW
8
8
8
8
8
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
D
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7233QDG4
TPS7233QDR
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7233QDRG4
TPS7233QP
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TPS7233QPE4
TPS7233QPW
TPS7233QPWG4
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TSSOP
TSSOP
PW
PW
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7233QPWLE
TPS7233QPWR
OBSOLETE TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7233QPWRG4
TPS7248QD
PW
D
8
8
8
8
8
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7248QDG4
TPS7248QDR
TPS7248QDRG4
TPS7248QP
SOIC
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TPS7248QPE4
TPS7248QPW
TPS7248QPWG4
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TSSOP
TSSOP
PW
PW
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7248QPWLE
TPS7248QPWR
OBSOLETE TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7248QPWRG4
TPS7250QD
PW
D
8
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7250QDG4
TPS7250QDR
SOIC
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7250QDRG4
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2007
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TPS7250QP
ACTIVE
ACTIVE
PDIP
PDIP
P
P
8
8
50
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
TPS7250QPE4
Pb-Free
(RoHS)
TPS7250QPWLE
TPS7250QPWR
OBSOLETE TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
ACTIVE
TSSOP
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS7250QPWRG4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to
discontinue any product or service without notice. Customers should obtain the latest relevant information
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subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent
TI deems necessary to support this warranty. Except where mandated by government requirements, testing
of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible
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