74AC00 [TI]
QUADRUPLE 2-INPUT POSITIVE-NAND GATES; 四路2输入正与非门
| 型号： | 74AC00 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE 2-INPUT POSITIVE-NAND GATES |
| 文件： | 总5页 (文件大小：81K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54AC00, SN74AC00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996
SN54AC00 . . . J OR W PACKAGE
SN74AC00 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), DIP
(N) Packages, Ceramic Chip Carriers (FK),
Flat (W), and DIP (J) Packages
1A
1B
1Y
2A
2B
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
4B
4A
4Y
3B
3A
3Y
description
2Y
GND
8
The ‘AC00 contain four independent 2-input NAND
gates. Each gate performs the Boolean function of
Y = A B or Y = A + B in positive logic.
SN54AC00 . . . FK PACKAGE
(TOP VIEW)
The SN54AC00 is characterized for operation over
the full military temperature range of –55°C to 125°C.
The SN74AC00 is characterized for operation from
–40°C to 85°C.
3
2
1
20 19
18
1Y
NC
2A
4A
NC
4Y
4
5
6
7
8
FUNCTION TABLE
(each gate)
17
16
INPUTS
NC
2B
15 NC
14
9 10 11 12 13
OUTPUT
Y
A
H
L
B
H
X
L
3B
L
H
H
X
NC – No internal connection
†
logic symbol
logic diagram (positive logic)
1
1A
2
&
A
B
3
6
Y
1Y
2Y
3Y
4Y
1B
4
2A
5
2B
9
3A
10
3B
12
4A
13
4B
8
11
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AC00, SN74AC00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Maximum power dissipation at T = 55°C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . . . 1.25 W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
A
DB package . . . . . . . . . . . . . . . . . . 0.5 W
N package . . . . . . . . . . . . . . . . . . . . 1.1 W
PW package . . . . . . . . . . . . . . . . . . 0.5 W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
recommended operating conditions (see Note 3)
SN54AC00
SN74AC00
UNIT
MIN
2
MAX
MIN
2
MAX
V
V
Supply voltage
6
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
2.1
2.1
High-level input voltage
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
3.15
3.85
V
V
IH
0.9
1.35
1.65
0.9
1.35
1.65
V
IL
Low-level input voltage
= 4.5 V
= 5.5 V
V
V
Input voltage
0
0
V
0
0
V
V
V
I
CC
CC
Output voltage
V
CC
V
CC
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
–12
–24
–24
12
–12
–24
–24
12
I
High-level output current
Low-level output current
= 4.5 V
= 5.5 V
= 3 V
mA
mA
OH
OL
I
= 4.5 V
= 5.5 V
24
24
24
24
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
0
8
0
8
ns/V
T
A
–55
125
–40
85
°C
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AC00, SN74AC00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
SN54AC00
SN74AC00
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
2.9
TYP
MAX
MIN
2.9
4.4
5.4
2.4
3.7
4.7
3.85
MAX
MIN
2.9
MAX
3 V
I
= –50 µA
4.5 V
5.5 V
3 V
4.4
4.4
OH
5.4
5.4
I
I
= –12 mA
= –24 mA
2.56
3.86
4.86
2.46
3.76
4.76
OH
V
OH
V
4.5 V
5.5 V
5.5 V
5.5 V
3 V
OH
†
†
I
I
= –50 mA
= –75 mA
OH
3.85
OH
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 µA
4.5 V
5.5 V
3 V
OH
0.1
0.1
0.1
I
I
=12 mA
= 24 mA
0.36
0.36
0.36
0.5
0.44
0.44
0.44
OL
V
OL
V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
0.5
OL
0.5
†
†
I
I
= 50 mA
1.65
OL
= 75 mA
1.65
±1
OL
I
I
V = V
or GND
or GND,
or GND
±0.1
±1
µA
µA
pF
I
I
CC
CC
CC
V = V
I = 0
O
2
40
20
CC
I
C
V = V
5 V
2.6
i
I
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
switching characteristics over recommended operating free-air temperature range,
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
7
SN54AC00
SN74AC00
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
2
MAX
9.5
8
MIN
1
MAX
MIN
2
MAX
10
t
t
11
9
PLH
A or B
Y
ns
1.5
5.5
1
1
8.5
PHL
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
6
SN54AC00
SN74AC00
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1.5
MAX
8
MIN
1
MAX
MIN
1.5
1
MAX
8.5
7
t
t
8.5
7
PLH
A or B
Y
ns
1.5
4.5
6.5
1
PHL
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Power dissipation capacitance
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
C
C
40
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AC00, SN74AC00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996
PARAMETER MEASUREMENT INFORMATION
V
CC
TEST
/t
S1
Input
(see Note B)
50% V
50% V
CC
CC
t
Open
PLH PHL
0 V
t
t
t
PHL
PLH
PHL
2 × V
CC
V
OH
In-Phase
Output
S1
50% V
50% V
50% V
CC
CC
500 Ω
Open
From Output
Under Test
V
OL
t
PLH
C
= 50 pF
L
500 Ω
V
OH
(see Note A)
Out-of-Phase
Output
50% V
CC
CC
V
OL
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A.
C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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Copyright 1998, Texas Instruments Incorporated
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