74AC11086DE4 [TI]
AC SERIES, QUAD 2-INPUT XOR GATE, PDSO16, PLASTIC, SO-16;
| 型号： | 74AC11086DE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | AC SERIES, QUAD 2-INPUT XOR GATE, PDSO16, PLASTIC, SO-16 栅 输入元件 光电二极管 逻辑集成电路 石英晶振 触发器 |
| 文件： | 总9页 (文件大小：219K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
D OR N PACKAGE
(TOP VIEW)
Center-Pin V
Minimize High-Speed Switching Noise
and GND Configurations
CC
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
1B
2A
2B
V
1A
1Y
2Y
GND
GND
3Y
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
500-mA Typical Latch-Up Immunity at
125°C
CC
Package Options Include Plastic
Small-Outline (D) Packages and Standard
Plastic 300-mil DIPs (N)
V
CC
3A
3B
4A
4Y
4B
description
This device contains four independent 2-input exclusive-OR gates. It performs the Boolean function
Y = A B = AB + AB in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.
The 74AC11086 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
L
L
L
L
H
H
L
H
L
H
H
H
†
logic symbol
1
1A
1B
2A
2B
3A
3B
4A
4B
2
3
6
7
=1
16
15
14
11
10
9
1Y
2Y
3Y
4Y
8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
logic diagram (positive logic)
1
1A
2
3
1Y
2Y
16
1B
15
2A
14
2B
11
3A
6
7
3Y
4Y
10
3B
9
4A
8
4B
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.
EXCLUSIVE OR
= 1
These are five equivalent exclusive-OR symbols valid for a 74AC11086 gate in positive logic; negation may be shown
at any two ports.
EVEN-PARITY ELEMENT
ODD-PARITY ELEMENT
LOGIC-IDENTITY ELEMENT
=
2k
2k+1
The output is active (high) if
all inputs stand at the same
logic level (i.e., A=B).
The output is active (high) if
an even number of inputs
(i.e., 0 or 2) are active (high).
The output is active (high) if an
odd number of inputs (i.e., only
1 of the 2) are active (high).
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Maximum power dissipation at T = 55°C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . . . . 1.3 W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
A
N package . . . . . . . . . . . . . . . . . . . . 1.1 W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150 C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
recommended operating conditions
MIN NOM
MAX
UNIT
V
Supply voltage
3
2.1
5
5.5
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
V
High-level input voltage
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
V
V
0.9
1.35
1.65
V
IL
Low-level input voltage
= 4.5 V
= 5.5 V
V
V
Input voltage
0
0
V
V
V
I
CC
Output voltage
V
CC
–4
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
I
High-level output current
Low-level output current
= 4.5 V
= 5.5 V
= 3 V
–24
–24
12
mA
mA
OH
OL
I
= 4.5 V
= 5.5 V
24
24
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
0
10
ns/V
T
A
–40
85
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
2.9
TYP
MAX
3 V
2.9
4.4
I
I
= –50 µA
4.5 V
5.5 V
3 V
4.4
OH
5.4
5.4
V
OH
= –4 mA
2.58
3.94
4.94
2.48
3.8
V
OH
4.5 V
5.5 V
5.5 V
3 V
I
I
= –24 mA
= –75 mA
OH
4.8
†
3.85
OH
0.1
0.1
0.1
0.1
I
= 50 µA
4.5 V
5.5 V
3 V
OL
0.1
0.1
V
OL
I
I
I
= 12 mA
= 24 mA
0.36
0.36
0.36
0.44
0.44
0.44
1.65
±1
V
OL
OL
OL
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
†
= 75 mA
I
I
V = V
or GND
or GND,
or GND
±0.1
µA
µA
pF
I
I
CC
CC
CC
V = V
I = 0
O
4
40
CC
I
C
V = V
3.5
i
I
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
5.6
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
1.5
MAX
9.4
t
t
1.5
1.5
10.6
8.2
PLH
A or B
Y
ns
1.5
5.1
7.4
PHL
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
3.8
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
1.5
MAX
6.8
t
t
1.5
1.5
7.6
6.8
PLH
A or B
Y
ns
1.5
3.8
6.2
PHL
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance per gate
C
= 50 pF,
L
f = 1 MHz
27
pF
pd
PARAMETER MEASUREMENT INFORMATION
V
CC
Input
(see Note B)
From Output
Under Test
50%
50%
0 V
t
PLH
C
= 50 pF
t
PHL
L
500 Ω
(see Note A)
V
OH
50% V
50% V
Output
CC
CC
V
OL
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A.
C includes probe and jig capacitance.
L
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
21-Mar-2013
PACKAGING INFORMATION
Orderable Device
74AC11086D
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
ACTIVE
SOIC
SOIC
SOIC
D
16
16
16
40
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85 AC11086
74AC11086DE4
74AC11086DG4
ACTIVE
ACTIVE
D
D
Green (RoHS
& no Sb/Br)
-40 to 85
AC11086
AC11086
AC11086
Green (RoHS
& no Sb/Br)
-40 to 85
74AC11086DR
74AC11086DRE4
74AC11086DRG4
74AC11086N
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
SOIC
SOIC
SOIC
PDIP
D
D
D
N
16
16
16
16
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Call TI
Call TI
25
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
74AC11086N
74AC11086N
74AC11086NE4
ACTIVE
PDIP
N
16
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Only one of markings shown within the brackets will appear on the physical device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Mar-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
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