74AC11244DWR [TI]
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS;
| 型号： | 74AC11244DWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS 驱动 输出元件 |
| 文件： | 总6页 (文件大小：94K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74AC11244
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS171B – MARCH 1987 – REVISED SEPTEMBER 1998
DB, DW, NT, OR PW PACKAGE
(TOP VIEW)
EPIC (Enhanced-Performance Implanted
CMOS ) 1-µm Process
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
1Y1
1Y2
1Y3
1OE
1A1
1A2
1A3
1A4
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
Flow-Through Architecture Optimizes PCB
Layout
1Y4
Center-Pin V
and GND Pin
GND
GND
GND
GND
2Y1
2Y2 10
2Y3
2Y4
CC
Configurations Minimize High-Speed
Switching Noise
V
CC
V
CC
17 2A1
16 2A2
15 2A3
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
11
12
14
13
2A4
2OE
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, and Standard Plastic DIPs (NT)
description
The 74AC11244 is an octal buffer or line driver designed specifically to improve both the performance and
density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The
device can be used as two 4-bit buffers or one 8-bit buffer, with active-low output-enable (OE) inputs.
When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The 74AC11244 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each driver)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11244
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS171B – MARCH 1987 – REVISED SEPTEMBER 1998
†
logic symbol
24
13
1OE
2OE
EN
EN
23
22
21
20
1
2
3
4
17
16
15
14
9
10
11
12
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
24
13
1OE
2OE
1
23
9
17
16
15
1A1
1Y1
1Y2
2A1
2A2
2Y1
2Y2
2
3
10
22
1A2
21
11
12
1A3
1Y3
1Y4
2A3
2A4
2Y3
2Y4
20
4
14
1A4
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11244
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS171B – MARCH 1987 – REVISED SEPTEMBER 1998
recommended operating conditions (see Note 3)
MIN NOM
MAX
UNIT
V
Supply voltage
3
2.1
5
5.5
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
V
High-level input voltage
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
V
V
0.9
1.35
1.65
V
IL
Low-level input voltage
= 4.5 V
= 5.5 V
V
V
Input voltage
0
0
V
V
V
I
CC
Output voltage
V
CC
–4
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
I
High-level output current
Low-level output current
= 4.5 V
= 5.5 V
= 3 V
–24
–24
12
mA
mA
OH
OL
I
= 4.5 V
= 5.5 V
24
24
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
0
10
ns/V
T
A
–40
85
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
2.9
TYP
MAX
3 V
2.9
4.4
I
I
= –50 µA
4.5 V
5.5 V
3 V
4.4
OH
5.4
5.4
V
OH
= –4 mA
2.58
3.94
4.94
2.48
3.8
V
OH
4.5 V
5.5 V
5.5 V
3 V
I
I
= –24 mA
= –75 mA
OL
4.8
†
3.85
OH
0.1
0.1
0.1
0.1
I
= 50 µA
4.5 V
5.5 V
3 V
OL
0.1
0.1
V
OL
I
I
I
= 12 mA
= 24 mA
0.36
0.36
0.36
0.44
0.44
0.44
1.65
±1
V
OL
OL
OL
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
†
= 75 mA
I
I
I
V = V
or GND
±0.1
±0.5
8
µA
µA
µA
pF
pF
I
I
CC
V
= V or GND
CC
±5
OZ
CC
O
V = V
or GND,
or GND
I = 0
O
80
I
CC
CC
C
C
V = V
4
i
I
V
= V or GND
CC
5 V
10
o
O
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11244
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS171B – MARCH 1987 – REVISED SEPTEMBER 1998
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
7.1
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
9.3
t
t
t
t
t
t
1.5
1.5
1.5
1.5
1.5
1.5
10.2
9.5
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
6.3
8.6
8
10.7
10.6
7.9
11.8
11.9
8.3
ns
OE
OE
7.9
5.9
ns
7.2
9.4
9.9
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
4.9
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
6.7
6.4
7.7
7.6
7
t
t
t
t
t
t
1.5
1.5
1.5
1.5
1.5
1.5
7.3
6.9
8.5
8.5
7.3
8.2
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
4.5
5.4
ns
OE
OE
5.4
5.2
ns
5.8
7.8
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
27
9
UNIT
Outputs enabled
Outputs disabled
C
Power dissipation capacitance per buffer/driver
C
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11244
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS171B – MARCH 1987 – REVISED SEPTEMBER 1998
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
Open
GND
TEST
S1
S1
t
/t
Open
500 Ω
PLH PHL
From Output
Under Test
t
/t
2 × V
CC
GND
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
Output
Control
(low-level
enabling)
V
CC
50%
50%
0 V
t
PZL
V
t
CC
PLZ
Output
Waveform 1
V
Input
CC
50%
50%
50% V
CC
0 V
20% V
S1 at 2 × V
(see Note B)
CC
CC
CC
V
V
OL
t
PLH
t
PHZ
t
PHL
t
PZH
Output
Waveform 2
S1 at GND
V
OH
OH
0 V
80% V
50% V
50% V
Output
CC
CC
V
50% V
CC
OL
(see Note B)
VOLTAGE WAVEFORMS
C includes probe and jig capacitance.
L
VOLTAGE WAVEFORMS
NOTES: A.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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