74AC11800DW [TI]
TRIPLE 4-INPUT AND/NAND GATES;
| 型号： | 74AC11800DW |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | TRIPLE 4-INPUT AND/NAND GATES 栅 驱动 输入元件 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总5页 (文件大小：78K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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ꢇ ꢈꢉꢊ ꢋꢌ ꢍꢁ ꢎꢉ ꢏꢊꢐꢇ ꢍꢂꢏꢑ ꢒꢏꢂꢏꢑ ꢍ ꢓꢂꢇꢌ ꢔ
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SCAS233 − AUGUST 1992 − REVISED APRIL 1993
DW PACKAGE
(TOP VIEW)
• Suitable for Use in Applications Such as:
− Differential Line Drivers
− Complementary Input Circuits for
Decoders and Code Converters
1A
1Y
1Z
2Y
GND
GND
GND
GND
2Z
1B
1
24
2
23 1C
22 1D
• Flow-Through Architecture Optimizes
3
PCB Layout
4
21
20
19
18
17
16
15
14
13
2A
2B
• Center-Pin V
and GND Pin Configurations
Minimize High-Speed Switching Noise
CC
5
6
V
V
CC
CC
• EPIC (Enhanced-Performance Implanted
7
CMOS) 1-µm Process
8
2C
2D
3A
3B
3C
9
• 500-mA Typical Latch-Up Immunity at 125°C
10
11
12
3Y
3Z
3D
description
The 74AC11800 is a triple 4-input AND/NAND
gate. Elimination of decode spikes in symmetrical
decoder and code-converter applications makes
the device useful for applications such as a
decoder or differential line driver.
The 74AC11800 is characterized for operation
from −40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS
A
L
B
C
X
X
L
D
X
X
X
L
Y
L
L
L
L
H
Z
H
H
H
H
L
X
L
X
X
X
H
X
X
H
X
H
H
†
logic symbol
logic diagram, each section (positive logic)
1
1A
24
2
&
1Y
A
B
C
D
Z
Y
1B
23
1C
22
3
4
1Z
2Y
1D
21
2A
20
2B
17
2C
16
9
2Z
3Y
2D
15
10
3A
14
3B
13
3C
12
11
3Z
3D
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
EPIC is a trademark of Texas Instruments Incorporated.
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Copyright 1993, Texas Instruments Incorporated
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2−1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
ꢀ ꢁꢂ ꢃ ꢄꢄ ꢅꢆ ꢆ
ꢇ ꢈ ꢉ ꢊꢋ ꢌꢍ ꢁ ꢎꢉ ꢏ ꢊꢐ ꢇꢍꢂꢏ ꢑꢒ ꢏꢂ ꢏꢑꢍ ꢓ ꢂꢇꢌ ꢔ
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SCAS233 − AUGUST 1992 − REVISED APRIL 1993
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
recommended operating conditions (see Note 2)
MIN NOM
MAX
UNIT
V
Supply voltage
3
2.1
5
5.5
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
V
High-level input voltage
V
V
0.9
1.35
1.65
= 4.5 V
= 5.5 V
V
IL
Low-level input voltage
V
V
Input voltage
0
0
V
V
V
V
I
CC
Output voltage
O
CC
−4
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
= 4.5 V
= 5.5 V
= 3 V
−24
−24
12
I
High-level output current
Low-level output current
mA
mA
OH
= 4.5 V
= 5.5 V
24
I
OL
24
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
0
10
ns/V
T
A
−40
85
°C
NOTE 2: Unused or floating inputs must be held high or low.
2−2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
ꢀ ꢁꢂ ꢃ ꢄꢄꢅ ꢆꢆ
ꢇ ꢈꢉꢊ ꢋꢌ ꢍꢁ ꢎꢉ ꢏꢊꢐꢇ ꢍꢂꢏꢑ ꢒꢏꢂꢏ ꢑꢍ ꢓ ꢂꢇꢌ ꢔ
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SCAS233 − AUGUST 1992 − REVISED APRIL 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
2.9
TYP
MAX
3 V
4.5 V
5.5 V
3 V
2.9
4.4
4.4
I
I
= − 50 µA
OH
5.4
5.4
= − 4 mA
2.58
3.94
4.94
2.48
3.8
V
OH
V
OH
4.5 V
5.5 V
5.5 V
3 V
I
I
= − 24 mA
= −75 mA
OL
4.8
†
3.85
OH
0.1
0.1
0.1
0.1
4.5 V
5.5 V
3 V
I
I
= 50 µA
OL
0.1
0.1
= 12 mA
= 24 mA
0.36
0.36
0.36
0.44
0.44
0.44
1.65
1
V
OL
V
OL
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
I
I
OL
†
= 75 mA
OL
I
I
V = V
or GND
or GND,
or GND
0.1
4
µA
µA
pF
I
I
CC
CC
CC
V = V
I = 0
O
40
CC
I
C
V = V
4
i
I
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
switching characteristics over recommended operating free-air temperature range,
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
5.8
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
2.5
MAX
9.8
t
t
2.5
2.7
10.7
12
PLH
A, B, C, or D
Y or Z
ns
2.7
6.2
10.9
PHL
switching characteristics over recommended operating free-air temperature range,
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
4.6
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
2.2
MAX
7.2
t
t
2.2
2.3
7.7
8.4
PLH
A, B, C, or D
Y or Z
ns
2.3
4.8
7.7
PHL
operating characteristics, V
= 5 V, T = 25°C
CC
A
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
C
Power dissipation capacitance per gate
C
63
pF
pd
2−3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
ꢀ ꢁꢂ ꢃ ꢄꢄ ꢅꢆ ꢆ
ꢇ ꢈ ꢉ ꢊꢋ ꢌꢍ ꢁ ꢎꢉ ꢏ ꢊꢐ ꢇꢍꢂꢏ ꢑꢒ ꢏꢂ ꢏꢑꢍ ꢓ ꢂꢇꢌ ꢔ
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SCAS233 − AUGUST 1992 − REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
V
CC
Input
(see Note B)
From Output
Under Test
50% V
CC
50% V
CC
0 V
t
PLH
C
= 50 pF
t
PHL
L
500 Ω
(see Note A)
V
OH
50% V
CC
50% V
Output
CC
V
OL
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A.
C includes probe and jig capacitance.
L
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
2−4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
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