74ACT11004PWRE4 [TI]
ACT SERIES, HEX 1-INPUT INVERT GATE, PDSO20, GREEN, PLASTIC, TSSOP-20;
| 型号： | 74ACT11004PWRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ACT SERIES, HEX 1-INPUT INVERT GATE, PDSO20, GREEN, PLASTIC, TSSOP-20 栅 输入元件 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总13页 (文件大小：447K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74ACT11004
HEX INVERTER
SCAS215B – JANUARY 1988 – REVISED JUNE 1997
DB, DW, N, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
Flow-Through Architecture Optimizes PCB
Layout
1Y
2Y
3Y
GND
GND
GND
GND
4Y
1A
2A
3A
NC
V
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
Center-Pin V
Minimize High-Speed Switching Noise
and GND Configurations
CC
EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
CC
V
500-mA Typical Latch-Up Immunity at
125°C
CC
NC
13 4A
12 5A
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages and Standard Plastic (N) 300-mil
DIPs
5Y
6Y
11
6A
NC – No internal connection
description
This device contains six independent inverters. It performs the Boolean function Y = A.
The 74ACT11004 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
†
logic symbol
1
20
19
18
13
12
11
1
1Y
1A
2A
3A
4A
5A
6A
2
3
8
2Y
3Y
4Y
9
5Y
6Y
10
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11004
HEX INVERTER
SCAS215B – JANUARY 1988 – REVISED JUNE 1997
logic diagram (positive logic)
20
19
18
13
12
11
1
2
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
3
8
9
10
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±150 mA
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions
MIN
4.5
2
MAX
UNIT
V
V
V
V
V
V
Supply voltage
5.5
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
V
0.8
V
0
0
V
V
V
I
CC
Output voltage
V
O
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
24
mA
mA
ns/V
°C
OH
OL
∆t/∆v
0
10
T
–40
85
A
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11004
HEX INVERTER
SCAS215B – JANUARY 1988 – REVISED JUNE 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
4.4
TYP
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
4.4
5.4
I
= –50 A
OH
5.4
V
3.94
4.94
3.8
V
OH
OL
I
I
I
= –24 mA
= –75 mA
OH
OH
OL
4.8
†
3.85
0.1
0.1
0.1
0.1
0.44
0.44
1.65
±1
= 50
A
V
0.36
0.36
V
I
I
= 24 mA
= 75 mA
OL
†
OL
I
I
V = V
or GND
or GND,
±0.1
4
A
A
I
I
CC
CC
V = V
I = 0
O
40
CC
I
‡
∆I
CC
One input at 3.4 V,
V = V or GND
Other inputs at GND or V
CC
0.9
1
mA
pF
C
3.5
i
I
CC
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ns.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
switching characteristics over recommended ranges of supply voltage and free-air temperature
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
5.3
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
1.5
MAX
9
t
t
1.5
1.5
9.7
9.6
PLH
A
Y
ns
1.5
6.4
8.7
PHL
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
C
Power dissipation capacitance per inverter
C
32
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11004
HEX INVERTER
SCAS215B – JANUARY 1988 – REVISED JUNE 1997
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
Input
(see Note B)
1.5 V
1.5 V
From Output
Under Test
t
t
PLH
PHL
C
= 50 pF
L
500 Ω
(see Note A)
V
OH
50% V
CC
50% V
Output
CC
V
OL
LOAD CIRCUIT
C includes probe and jig capacitance.
L
VOLTAGE WAVEFORMS
NOTES: A.
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
28-May-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SSOP
SSOP
Drawing
74ACT11004DBLE
74ACT11004DBR
OBSOLETE
ACTIVE
DB
20
20
TBD
Call TI
Call TI
DB
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74ACT11004DBRE4
74ACT11004DBRG4
74ACT11004DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
DB
DB
DW
DW
DW
DW
DW
N
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74ACT11004DWG4
74ACT11004DWR
74ACT11004DWRE4
74ACT11004DWRG4
74ACT11004N
SOIC
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
74ACT11004NE4
PDIP
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
74ACT11004PW
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74ACT11004PWE4
74ACT11004PWG4
74ACT11004PWR
74ACT11004PWRE4
74ACT11004PWRG4
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-May-2007
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
74ACT11004DBR
74ACT11004DWR
74ACT11004PWR
SSOP
SOIC
DB
DW
PW
20
20
20
2000
2000
2000
330.0
330.0
330.0
16.4
24.4
16.4
8.2
7.5
13.0
7.1
2.5
2.7
1.6
12.0
12.0
8.0
16.0
24.0
16.0
Q1
Q1
Q1
10.8
6.95
TSSOP
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
74ACT11004DBR
74ACT11004DWR
74ACT11004PWR
SSOP
SOIC
DB
DW
PW
20
20
20
2000
2000
2000
346.0
346.0
346.0
346.0
346.0
346.0
33.0
41.0
33.0
TSSOP
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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