74ACT11032DBRE4 [TI]
ACT SERIES, QUAD 2-INPUT OR GATE, PDSO16, GREEN, PLASTIC, SSOP-16;
| 型号： | 74ACT11032DBRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ACT SERIES, QUAD 2-INPUT OR GATE, PDSO16, GREEN, PLASTIC, SSOP-16 栅 输入元件 光电二极管 逻辑集成电路 触发器 |
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| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74ACT11032
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS008C – JULY 1987 – REVISED APRIL 1996
D, DB, N, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
Center-Pin V and GND Configurations to
Minimize High-Speed Switching Noise
CC
1A
1Y
1B
2A
2B
V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
2Y
GND
GND
3Y
500-mA Typical Latch-Up Immunity at 125°C
CC
V
CC
Package Options Include Plastic
3A
3B
4A
Small-Outline Packages (D), Plastic Shrink
Small-Outline Packages (DB), Plastic Thin
Shrink Small-Outline Packages (PW), and
Standard Plastic 300-mil DIPs (N)
4Y
4B
description
This device contains four independent 2-input OR gates. It performs the Boolean function Y = A + B or
A • B
Y
in positive logic.
The 74ACT11032 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
OUTPUT
Y
INPUTS
A
B
X
H
L
H
X
L
H
H
L
†
logic symbol
logic diagram (positive logic)
1
1A
16
1A
1Y
1B
≥
2
3
6
7
1Y
2Y
3Y
4Y
1B
15
2A
2A
14
2Y
2B
2B
11
3A
10
3A
3Y
3B
9
3B
4A
4A
8
4Y
4B
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11032
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS008C – JULY 1987 – REVISED APRIL 1996
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Maximum power dissipation at T = 55°C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . . . . 1.3 W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
A
DB package . . . . . . . . . . . . . . . . . . 0.55 W
N package . . . . . . . . . . . . . . . . . . . . 1.1 W
PW package . . . . . . . . . . . . . . . . . . . 0.5 W
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150 C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
recommended operating conditions
MIN
4.5
2
MAX
UNIT
V
V
V
V
V
V
Supply voltage
5.5
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
V
0.8
V
0
0
V
V
V
I
CC
Output voltage
V
O
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
24
mA
mA
ns/V
°C
OH
OL
t/ v
0
10
T
–40
85
A
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11032
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS008C – JULY 1987 – REVISED APRIL 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
4.4
TYP
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
4.4
5.4
I
= –50 A
OH
5.4
V
3.94
4.94
3.8
V
OH
OL
I
I
I
= –24 mA
= –75 mA
OH
OH
OL
4.8
†
3.85
0.1
0.1
0.1
0.1
= 50
A
V
0.36
0.36
0.44
0.44
1.65
±1
V
I
I
= 24 mA
= 75 mA
OL
†
OL
I
I
V = V
or GND
or GND,
±0.1
A
A
I
I
CC
CC
V = V
I
O
= 0
CC
4
40
CC
I
One input at 3.4 V,
Other inputs at GND or V
‡
5.5 V
5 V
0.9
1
mA
pF
I
CC
C
V = V or GND
3.5
i
I
CC
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
switching characteristics over recommended ranges of supply voltage and free-air temperature
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
6.2
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
1.5
MAX
8.1
t
t
1.5
1.5
9
8
PLH
A or B
Y
ns
1.5
4.9
7.4
PHL
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Power dissipation capacitance per gate
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
C
C
29
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11032
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS008C – JULY 1987 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
Input
(see Note B)
From Output
Under Test
1.5 V
1.5 V
t
PLH
C
= 50 pF
t
PHL
L
500 Ω
(see Note A)
V
OH
50% V
50% V
Output
CC
CC
V
OL
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A.
C includes probe and jig capacitance.
L
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns,
O
r
t = 3 ns.
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
1-Aug-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
74ACT11032D
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
74ACT11032DBLE
74ACT11032DBRE4
74ACT11032DBRG4
74ACT11032DE4
OBSOLETE
ACTIVE
SSOP
SSOP
SSOP
SOIC
DB
DB
DB
D
16
16
16
16
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
ACTIVE
ACTIVE
40
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
74ACT11032DG4
74ACT11032DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
D
D
D
D
16
16
16
16
40
Green (RoHS
& no Sb/Br)
2500
2500
2500
Green (RoHS
& no Sb/Br)
74ACT11032DRE4
74ACT11032DRG4
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
74ACT11032N
74ACT11032NE4
74ACT11032PWLE
ACTIVE
ACTIVE
PDIP
PDIP
N
N
16
16
16
25
25
Pb-Free (RoHS)
Pb-Free (RoHS)
TBD
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
OBSOLETE
TSSOP
PW
Call TI
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
1-Aug-2011
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
74ACT11032DR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2011
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC 16
SPQ
Length (mm) Width (mm) Height (mm)
333.2 345.9 28.6
74ACT11032DR
D
2500
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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