74ACT11138N [TI]
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS;
| 型号： | 74ACT11138N |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS 驱动 输入元件 光电二极管 逻辑集成电路 |
| 文件： | 总7页 (文件大小：91K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
54ACT11138, 74ACT11138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS050A – D3266, JANUARY 1989 – REVISED APRIL 1993
54ACT11138 . . . J PACKAGE
74ACT11138 . . . D, N, OR PW PACKAGE
• Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
(TOP VIEW)
• Incorporates Three Enable Inputs to
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y0
A
B
Y1
Y2
Y3
GND
Y4
Y5
Simplify Cascading and/or Data Reception
• Flow-Through Architecture Optimizes
PCB Layout
C
V
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
CC
G1
G2A
G2B
• EPIC (Enhanced-Performance Implanted
Y6
Y7
CMOS) 1- m Process
• 650-mA Typical Latch-Up Immunity
at 125°C
54ACT11138 . . . FK PACKAGE
(TOP VIEW)
• Package Options Include Plastic
Small-Outline Packages, Plastic Thin
Shrink Small-Outline Packages, Ceramic
Chip Carriers, and Standard Plastic and
Ceramic 300-mil DIPs
3
2
1
20 19
18
4
5
6
7
8
G2A
G2B
NC
Y7
A
Y0
NC
Y1
Y2
17
16
15
14
description
The ′ACT11138 circuit is designed to be used in
high-performance memory-decoding or data-
routing applications requiring very short
propagation delay times. In high-performance
memory systems, this decoder can be used to
minimize the effects of system decoding. When
employed with high-speed memories utilizing a
fast enable circuit, the delay times of this decoder
Y6
9 10 11 12 13
NC – No internal connection
and the enable time of the memory are usually less than the typical access time of the memory. This means
that the effective system delay introduced by the decoder is negligible.
The conditions at the binary select inputs and the three enable inputs select one of eight input lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
The 54ACT11138 is characterized for operation over the full military temperature range of – 55°C to 125°C. The
74ACT11138 is characterized for operation from – 40°C to 85°C.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT11138, 74ACT11138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS050A – D3266, JANUARY 1989 – REVISED APRIL 1993
†
logic symbols (alternatives)
DMUX
BIN/OCT
16
16
1
15
14
13
15
14
13
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
2
A
B
C
A
B
C
1
2
4
1
2
3
5
6
7
8
0
7
G
2
3
5
&
&
11
10
9
11
10
9
G1
G2A
G2B
G1
G2A
G2B
6
7
EN
8
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
logic diagram (positive logic)
16
Y0
15
A
1
Y1
2
Y2
Y3
Y4
14
13
Select
Inputs
B
C
3
5
Data
Outputs
6
7
8
Y5
Y6
Y7
10
9
G2A
G2B
Enable
Inputs
11
G1
Pin numbers shown are for the D, J, and N packages.
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT11138, 74ACT11138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS050A – D3266, JANUARY 1989 – REVISED APRIL 1993
FUNCTION TABLE
OUTPUTS
ENABLE
INPUTS
SELECT
INPUTS
G1
X
G2A
H
X
X
L
G2B
X
H
X
L
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0
H
H
H
L
Y1
H
H
H
H
L
Y2
H
H
H
H
H
L
Y3
H
H
H
H
H
H
L
Y4
H
H
H
H
H
H
H
L
Y5
H
H
H
H
H
H
H
H
L
Y6
H
H
H
H
H
H
H
H
H
L
Y7
H
H
H
H
H
H
H
H
H
H
L
X
L
H
H
H
H
H
H
H
H
L
L
L
L
H
L
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
L
L
H
H
H
H
L
L
H
H
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through V
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
54ACT11138
74ACT11138
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
V
0
0
V
V
0
0
V
V
V
I
CC
CC
Output voltage
V
O
CC
CC
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
24
–24
24
mA
mA
ns/V
°C
OH
I
OL
t/ v
0
10
0
10
T
–55
125
– 40
85
A
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT11138, 74ACT11138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS050A – D3266, JANUARY 1989 – REVISED APRIL 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
54ACT11138
74ACT11138
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
4.4
TYP
MAX
MIN
4.4
MAX
MIN
4.4
5.4
3.8
4.8
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
I
I
= – 50
A
OH
5.4
5.4
3.94
4.94
3.7
V
OH
= – 24 mA
V
OH
4.7
I
I
= – 50 mA
= – 75 mA
3.85
OH
3.85
OH
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 A
OL
OL
0.36
0.36
0.5
0.44
0.44
V
OL
I
= 24 mA
V
0.5
I
I
= 50 mA
= 75 mA
1.65
OL
1.65
± 1
40
OL
I
I
V = V
or GND
or GND,
± 0.1
± 1
A
A
I
I
CC
CC
V = V
I = 0
O
4
80
CC
I
One input at 3.4 V,
Other inputs at GND or V
5.5 V
5 V
0.9
1
1
mA
pF
I
CC
CC
C
V = V or GND
I CC
3.5
i
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
switching characteristics over recommended ranges of supply voltage and free-air temperature
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
6.1
6
54ACT11138
74ACT11138
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
8.9
8.7
8
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
10.5
10.3
9.4
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
9.8
9.7
8.9
8.9
9.3
9.8
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PLH
PHL
A, B, C
G1
Any Y
Y
5.5
6
ns
7.9
8.3
8.8
9.5
6.4
6
9.9
G2A, G2B
Any Y
ns
10.5
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
C
Power dissipation capacitance
C
88
pF
pd
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT11138, 74ACT11138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS050A – D3266, JANUARY 1989 – REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
Input
(see Note B)
1.5 V
1.5 V
From Output
Under Test
t
t
PHL
PLH
C
= 50 pF
L
500 Ω
(see Note A)
V
OH
CC
50% V
50% V
CC
Output
V
OL
VOLTAGE WAVEFORMS
LOAD CIRCUIT
NOTES: A.
C includes probe and jig capacitance.
L
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
2–5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–6
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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