74ACT11544DW [TI]
OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS;
| 型号： | 74ACT11544DW |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总8页 (文件大小：107K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀ ꢁ ꢂꢃ ꢄꢅꢅꢆ ꢁꢁ
ꢇ ꢃꢄꢂꢈꢉꢊ ꢋꢌ ꢍꢎ ꢄꢋ ꢊꢋꢏꢉ ꢄ ꢊꢂꢐ ꢎꢃ ꢋ ꢍꢑ ꢋꢊ
ꢒ ꢍꢄ ꢓꢉ ꢔ ꢕꢎꢄꢂꢄ ꢋꢉ ꢇꢖ ꢄꢗ ꢖꢄ ꢎ
ꢘ
SCAS133 − D3609, JULY 1990 − REVISED APRIL 1993
DW PACKAGE
(TOP VIEW)
• Inputs Are TTL-Voltage Compatible
• 3-State Inverted Outputs
• Back-to-Back Registers for Storage
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CEBA
A1
GBA
LEBA
B1
• Flow-Through Architecture Optimizes
2
PCB Layout
3
A2
A3
A4
GND
GND
GND
GND
A5
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
4
B2
5
B3
• EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
6
B4
7
V
V
CC
CC
8
• 500-mA Typical Latch-Up Immunity
at 125°C
9
B5
10
11
12
13
14
B6
B7
B8
LEAB
GAB
description
A6
A7
A8
This 8-bit registered transceiver contains two sets
of D-type latches for temporary storage of data
flowing in either direction. Separate latch enable
(LEAB or LEBA) and output enable (GAB or GBA)
inputs are provided for each register to permit
independent control in either direction of data flow.
The 74ACT11544 inverts data in both directions.
CEAB
The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data to B. Having CEAB
low and LEAB low makes the A-to-B latches transparent; a subsequent low-to-high transition of LEAB puts the
A latches in the storage mode. With CEAB and GAB both low, the 3-state B outputs are active and reflect the
data present at the output of the A latches. Data flow from B-to-A is similar, but requires the use of CEBA, LEBA,
and GBA inputs.
The 74ACT11544 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
LATCH
INPUTS
LEAB
OUTPUT BUFFERS
B1 THRU B8
STATUS
CEAB
GAB
†
A TO B
H
X
X
L
X
H
X
Storing
Storing
Z
H
L
L
Z
L
Transparent
Storing
Current A Data
}
L
H
Previous A Data
†
‡
A-to-B data flow is shown: B-to-A flow control is the same except uses
CEBA, LEBA, and GBA.
Data present before low-to-high transition of LEAB.
EPIC is a trademark of Texas Instruments Incorporated.
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Copyright 1993, Texas Instruments Incorporated
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ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ
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2−1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢅꢅ ꢆꢁ ꢁ
ꢇꢃ ꢄꢂ ꢈꢉ ꢊ ꢋꢌꢍ ꢎ ꢄꢋ ꢊꢋ ꢏꢉ ꢄ ꢊꢂꢐ ꢎ ꢃꢋꢍ ꢑ ꢋꢊ
ꢒꢍ ꢄ ꢓ ꢉꢔ ꢕꢎ ꢄꢂꢄꢋ ꢉ ꢇ ꢖꢄ ꢗꢖꢄ ꢎ
ꢘ
SCAS133 − D3609, JULY 1990 − REVISED APRIL 1993
†
logic symbol
logic diagram (positive logic)
28
28
GBA
CEBA
LEAB
GAB
1 EN3
G1
GBA
1
1
27
15
14
16
CEBA
1C5
2 EN4
G2
27
LEBA
CEAB
LEAB
15
GAB
2C6
14
2
26
CEAB
B1
A1
3
5D
16
6D
4
LEAB
3
25
24
23
20
19
18
17
B2
B3
B4
B5
B6
B7
B8
A2
A3
A4
A5
A6
A7
A8
2
C1
1D
4
A1
26
B1
5
10
11
12
13
C1
1D
To Seven Other Transceivers
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
MIN NOM
MAX
UNIT
V
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
V
0.8
V
0
0
V
V
V
I
CC
Output voltage
V
O
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
−24
24
mA
mA
ns/V
°C
OH
OL
Dt/Dv
0
10
T
− 40
85
A
2−2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂꢃ ꢄꢅꢅꢆ ꢁꢁ
ꢇ ꢃꢄꢂꢈꢉꢊ ꢋꢌ ꢍꢎ ꢄꢋ ꢊꢋꢏꢉ ꢄ ꢊꢂꢐ ꢎꢃ ꢋꢍ ꢑ ꢋꢊ
ꢒ ꢍꢄ ꢓꢉ ꢔ ꢕꢎꢄꢂꢄ ꢋꢉꢇ ꢖ ꢄꢗ ꢖꢄ ꢎ
ꢘ
SCAS133 − D3609, JULY 1990 − REVISED APRIL 1993
electrical characteristics over recommended operating free-air temperature range
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
4.4
TYP
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
4.4
5.4
I
= − 50 mA
OH
5.4
3.94
4.94
3.8
V
V
OH
OL
I
I
= − 24 mA
= − 75 mA
OH
4.8
†
3.85
OH
0.1
0.1
0.1
0.1
0.44
0.44
1.65
1
I
= 50 mA
OL
0.36
0.36
V
V
I
I
= 24 mA
OL
†
= 75 mA
OL
I
I
I
Control inputs
V = V
or GND
0.1
0.5
8
mA
mA
mA
I
I
CC
‡
A or B ports
V
= V
or GND
5
OZ
CC
O
CC
V = V
or GND,
I
O
= 0
80
I
CC
One input at 3.4 V,
Other inputs at GND or V
§
5.5 V
0.9
1
mA
DI
CC
CC
C
C
Control inputs
A or B ports
V = V
CC
or GND
or GND
5 V
5 V
4.5
12
pF
pF
i
I
V = V
O CC
o
†
‡
§
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
For I/O ports, the parameter I includes the input leakage current.
OZ
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
T
= 25°C
A
MIN
MAX
UNIT
MIN
4
MAX
t
t
Pulse duration, LEAB or LEBA low
Setup time
4
2.5
3
ns
w
Data before LEAB or LEBA↑
Data before CEAB or CEBA↑
Data after LEAB or LEBA↑
Data after CEAB or CEBA↑
2.5
3
ns
ns
su
2
2
t
h
Hold time
1.5
1.5
2−3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢒꢍ ꢄ ꢓ ꢉꢔ ꢕꢎ ꢄꢂꢄꢋ ꢉ ꢇ ꢖꢄ ꢗꢖꢄ ꢎ
ꢘ
SCAS133 − D3609, JULY 1990 − REVISED APRIL 1993
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
5.7
7.3
6
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
2.4
4.1
2.6
3.4
3.3
3.6
4.8
4.7
3
MAX
8.2
9.3
8.7
10.1
9.5
11.2
9.7
9.5
9
t
t
t
t
2.4
8.9
10.3
9.5
PLH
PHL
PLH
PHL
PZH
A or B
B or A
A or B
A or B
A or B
A or B
A or B
4.1
2.6
3.4
3.3
3.6
4.8
4.7
3
LEBA or LEAB
CEBA or CEAB
CEBA or CEAB
GBA or GAB
GBA or GAB
ns
7.1
6.7
8.2
7.6
7.6
6.4
7.8
7.3
7.2
11
t
t
t
t
10.4
13
ns
t
PZL
PHZ
10.4
10.2
9.9
ns
t
PLZ
PZH
ns
t
3.5
4.6
4.6
10.8
9.3
9.2
3.5
4.6
4.6
12.5
9.9
PZL
PHZ
ns
t
9.7
PLZ
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
47
UNIT
Outputs enabled
Outputs disabled
C
Power dissipation capacitance per transceiver
C
pF
pd
14
2−4
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ꢘ
SCAS133 − D3609, JULY 1990 − REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
TEST
S1
S1
t
/t
Open
PLH PHL
/t
500 Ω
Open
GND
From Output
Under Test
t
2 × V
CC
GND
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
3 V
0 V
Timing Input
(see Note B)
1.5 V
t
w
t
h
t
3 V
su
3 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
Data Input
0 V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
Output
Control
(low-level
enabling)
3 V
0 V
3 V
0 V
Input
(see Note B)
1.5 V
1.5 V
1.5 V
1.5 V
t
PZL
t
t
PHL
PLH
t
PLZ
Output
Waveform 1
V
OH
[ V
CC
In-Phase
Output
50% V
50% V
CC
50% V
50% V
CC
V
CC
20% V
S1 at 2 × V
(see Note C)
CC
CC
V
OL
OL
t
PHZ
t
PLH
t
t
PHL
PZH
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
80% V
CC
50% V
50% V
CC
CC
CC
[ 0 V
V
OL
(see Note C)
VOLTAGE WAVEFORMS
NOTES: A. C includes probe and jig capacitance.
VOLTAGE WAVEFORMS
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
2−5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2−6
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jun-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SOIC
PDIP
PDIP
Drawing
74ACT11544DW
74ACT11544NT
74ACT11544NT
OBSOLETE
OBSOLETE
OBSOLETE
DW
28
28
28
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
NT
NT
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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