74ACTQ18825SSCX [TI]
ACT SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56, 0.300 INCH, SSOP-56;
| 型号： | 74ACTQ18825SSCX |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ACT SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56, 0.300 INCH, SSOP-56 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总8页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
March 1993
74ACTQ18825 18-Bit
Buffer/Line Driver with TRI-STATE Outputs
É
General Description
Features
Y
Utilizes NSC FACT Quiet Series technology
Broadside pinout allows for easy board layout
Guaranteed simultaneous switching noise level and dy-
namic threshold performance
The ’ACTQ18825 contains eighteen non-inverting buffers
with TRI-STATE outputs designed to be employed as a
memory and address driver, clock driver, or bus oriented
transmitter/receiver. The device is byte controlled. Each
byte has separate TRI-STATE control inputs which can be
shorted together for full 18-bit operation.
Y
Y
Y
Y
Y
Guaranteed pin-to-pin output skew
Separate control logic for each byte
The ’ACTQ18825 utilizes NSC Quiet Series technology to
guarantee quiet output switching and improved dynamic
threshold performance. FACT Quiet SeriesTM features
GTOTM output control and undershoot corrector for superior
performance.
Extra data width for wider address/data paths or buses
carrying parity
Y
Y
Y
Outputs source/sink 24 mA
Additional specs for Multiple Output Switching
Output loading specs for both 50 pF and 250 pF loads
Logic Symbol
Connection Diagram
Pin Assignment
for SSOP
TL/F/10955–1
TL/F/10955–2
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
FACTTM, FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/10955
RRD-B30M75/Printed in U. S. A.
Functional Description
Pin Description
The ’ACTQ18825 contains eighteen non-inverting buffers
with TRI-STATE standard outputs. The device is byte con-
trolled with each byte functioning identically, but indepen-
dent of the other. The control pins may be shorted together
to obtain full 8-bit operation. The TRI-STATE outputs are
Pin Names
Description
OE
n
Output Enable Input (Active Low)
I –I
0 17
Inputs
O –O
0 17
Outputs
controlled by an Output Enable (OE ) input for each byte.
n
When OE is LOW, the outputs are in 2-state mode. When
n
OE is HIGH, the outputs are in the high impedance mode,
n
but this does not interfere with entering new data into the
inputs.
Truth Table
Inputs
Outputs
Byte 1 (0:8)
OE
Byte 2 (8:17)
OE
4
I –I
0
I –I
9
O –O
0
O –O
9 17
8
17
8
OE
1
OE
3
2
L
H
X
L
L
X
H
L
L
L
L
L
H
X
X
L
H
L
H
Z
Z
L
H
L
L
L
H
X
X
X
L
H
Z
Z
Z
L
H
X
H
L
X
H
H
L
L
L
H
X
L
H
Z
L
H
L
H
L
e
e
e
e
H
L
High Voltage Level
Low Voltage Level
Immaterial
X
Z
High Impedance
Logic Diagram
TL/F/10955–3
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Recommended Operating
Conditions
Supply Voltage (V
’ACTQ
)
CC
4.5V to 5.5V
b
a
0.5V to 7.0V
Supply Voltage (V
)
CC
Input Voltage (V )
I
0V to V
0V to V
CC
DC Input Diode Current (I
)
IK
Output Voltage (V
)
O
CC
e b
b
a
V
I
V
I
0.5V
a
20 mA
20 mA
Operating Temperature (T )
A
74ACTQ
e
V
CC
0.5V
b
a
40 C to 85 C
§
§
DC Output Diode Current (I
)
OK
Minimum Input Edge Rate dV/dt
’ACTQ Devices
e b
b
a
V
V
0.5V
a
20 mA
20 mA
O
O
125 mV/ns
e
V
CC
0.5V
V
V
from 0.8V to 2.0V
@
IN
b
a
0.5V
DC Output Voltage (V
)
O
0.5V to V
CC
4.5V, 5.5V
CC
g
DC Output Source/Sink Current (I
)
O
50 mA
DC V
or Ground Current
CC
Per Output Pin
g
50 mA
Junction Temperature
PDIP SOIC
a
140 C
§
b
a
65 C to 150 C
Storage Temperature
§
§
4000V
ESD Last Passing Voltage (Min)
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACTTM circuits outside databook specifications.
Note 2: For qualification information please refer to the NSC SSOP Qualifi-
cation Handbook.
DC Electrical Characteristics for ACTQ Family Devices
74ACTQ
74ACTQ
e
a
V
CC
(V)
T
A
40 C to 85 C
e a
Symbol
Parameter
Units
Conditions
T
25 C
§
A
b
§
§
Typ
Guaranteed Limits
e
0.1V
V
V
V
Minimum High
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
IH
OUT
V
V
V
b
or V
CC
0.1V
e
Maximum Low
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
OUT
0.1V
IL
b
or V
CC
0.1V
e b
OUT
Minimum High
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
50 mA
OH
e
*V
IN
V
IL
or V
IH
24 mA
24 mA
b
b
4.5
5.5
3.86
4.86
3.76
4.76
V
V
I
OH
e
e
V
OL
Maximum Low
Output Voltage
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
I
50 mA
OUT
*V
IN
V or V
IL IH
4.5
5.5
0.36
0.36
0.44
0.44
24 mA
V
I
OL
24 mA
e
I
I
I
Maximum TRI-STATE
Leakage Current
V
V
, V
IL IH
OZ
g
g
g
g
5.5
0.5
0.1
5.0
1.0
mA
e
V
O
V
, GND
CC
e
Maximum Input
Leakage Current
V
V
CC
, GND
IN
I
5.5
5.5
5.5
mA
mA
mA
e
b
I
I
Maximum I /Input
CC
0.6
1.5
V
V
V
CC
2.1V
CCT
CC
I
e
Maximum Quiescent
Supply Current
V
CC
or GND
IN
8.0
80.0
75
e
e
²
I
I
Minimum Dynamic
mA
mA
V
V
1.65V Max
3.85V Min
OLD
OHD
OLD
5.5
Output Current
b
75
OHD
*All outputs loaded; thresholds associated with output under test.
²
Maximum test duration 2.0 ms, one output loaded at a time.
3
DC Electrical Characteristics for ACTQ Family Devices (Continued)
74ACTQ
74ACTQ
e
a
V
T
A
40 C to 85 C
CC
(V)
e a
Symbol
Parameter
Units
Conditions
T
Typ
0.5
25 C
§
A
b
§
§
Guaranteed Limits
0.8
V
OLP
V
OLV
V
OHP
V
OHV
Quiet Output
Figures 2-12, 13
(Notes 2, 3)
5.0
5.0
5.0
5.0
V
V
V
V
Maximum Dynamic V
OL
OL
Quiet Output
Figures 2-12, 13
(Notes 2, 3)
b
b
0.8
0.5
Minimum Dynamic V
Maximum
Overshoot
Figures 2-12, 13
(Notes 1, 3)
a
b
a
b
V
V
1.0
1.0
V
OH
V
OH
1.5
1.8
OH
OH
Minimum V
CC
Figures 2-12, 13
(Notes 1, 3)
V
CC
Droop
Minimum High
Dynamic Input
Voltage Level
V
IHD
V
ILD
5.0
5.0
1.7
1.2
2.0
0.8
V
V
(Notes 1, 4)
(Notes 1, 4)
Maximum Low
Dynamic Input
Voltage Level
Note 1: Worst case package.
Note 2: Maximum number of outputs that can switch simultaneously is n. (n-1) outputs are switched LOW and one output held LOW.
Note 3: Maximum number of outputs that can switch simultaneously is n. (n-1) outputs are switched HIGH and one output held HIGH.
Note 4: Maximum number of data inputs (n) switching (n-1) input switching 0V to 3V (’ACTQ). Input under test switching 3V to threshold (VILD).
AC Electrical Characteristics
74ACTQ
74ACTQ
e a
e b
A
a
V
*
T
25 C
T
40 C to 85 C
§
CC
§
50 pF
§
A
Symbol
Parameter
Units
e
e
(V)
C
C
L
50 pF
L
Min
Typ
Max
Min
Max
t
t
Propagation Delay
Data to Output
2.0
2.0
5.3
5.6
8.4
8.7
2.0
2.0
9.0
9.2
PHL
5.0
5.0
5.0
ns
ns
ns
PLH
t
t
Output Enable
Time
2.0
2.0
6.3
6.5
9.6
9.7
2.0
2.0
10.3
10.4
PZL
PZH
t
t
Output Disable
Time
1.5
1.5
4.5
5.1
7.3
8.5
1.5
1.5
7.6
8.8
PLZ
PHZ
g
*Voltage Range 5.0 is 5.0V 0.5V.
4
Extended AC Electrical Characteristics
74ACTQ
54ACTQ
74ACTQ
e b
54ACTQ
e b
e
A
T
40 C
T
Mil
Mil
§
to 85 C
A
T
40 C
§
to 85 C
A
a
e
e
e
T
A
V
Mil
Mil
§
Com
CC
a
e
§
Com
e
e
Units
V
C
L
50 pF
V
CC
CC
Symbol
Parameter
V
CC
e
16 Outputs
e
(Note 3)
C
50 pF
16 Outputs)
Switching
(Note 2)
C
250 pF
L
L
e
(Note 3)
C
250 pF
L
Switching (Note 2)
Min
Typ
Max
Min
Max
Min Max
Min
Max
t
t
Propagation Delay
Data to Output
6.5
5.5
8.0
6.5
9.8
8.9
PLH
PHL
ns
ns
ns
ns
ns
ns
t
t
Output Enable Time
Output Disable Time
Pin to Pin Skew
6.1
6.5
7.6
7.8
9.2
9.4
PZH
(Note 4)
(Note 4)
(Note 5)
PZL
t
t
3.1
3.5
5.0
5.2
6.1
6.5
PHZ
PLZ
(Note 5)
t
OSHL
(Note 1) HL Data to Output
Pin to Pin Skew
(Note 1) LH Data to Output
Pin to Pin Skew
(Note 1) LH/HL Data to Output
t
OSLH
t
OST
Note 1: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device. The
specification applies to any outputs switching HIGH to LOW (t ), LOW to HIGH (t ), or any combination switching LOW to HIGH and/or HIGH to LOW
OSHL OSLH
(t
OST
).
Note 2: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all low-to-high, high-
to-low, etc.).
Note 3: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in
the standard AC load. This specification pertains to single output switching only.
Note 4: TRI-STATE delays are load dominated and have been excluded from the datasheet.
Note 5: The Output Disable Time is dominated by the RC network (500X, 250 pF) on the output and has been excluded from the datasheet.
Capacitance
Symbol
Parameter
Typ
Units
Conditions
e
e
C
C
Input Pin Capacitance
4.5
pF
V
V
5.0V
5.0V
IN
CC
Power Dissipation
Capacitance
PD
CC
95
pF
5
FACT Noise Characteristics
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the noise
characteristics of FACT.
6. Set the word generator input levels at 0V LOW and 3V
HIGH for ACT devices and 0V LOW and 5V HIGH for AC
devices. Verify levels with a digital volt meter.
V /V
OLP OLV
and V
/V :
OHP OHV
Equipment:
Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output volt-
ages using a 50X coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
#
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Tektronics Model 7854 Oscilloscope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50 pF, 500X.
Measure V
and V
OLV
on the quiet output during the
and V on the quiet out-
#
#
OLP
HL transition. Measure V
2. Deskew the word generator so that no two channels have
greater than 150 ps skew between them. This requires
that the oscilloscope be deskewed first. Swap out the
channels that have more than 150 ps of skew until all
channels being used are within 150 ps. It is important to
deskew the word generator channels before testing. This
will ensure that the outputs switch simultaneously.
OHP
put during the LH transition.
OHV
Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
V
and V
:
IHD
ILD
3. Terminate all inputs and outputs to ensure proper loading
of the outputs and that the input levels are at the correct
voltage.
Monitor one of the switching outputs using a 50X coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
#
4. Set V
to 5.0V.
First increase the input LOW voltage level, V , until the
IL
output begins to oscillate. Oscillation is defined as noise
#
#
#
CC
5. Set the word generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and affect the results of the measurement.
on the output LOW level that exceeds V limits, or on
IL
output HIGH levels that exceed V limits. The input
IH
LOW voltage level at which oscillation occurs is defined
as V
.
ILD
Next increase the input HIGH voltage level on the word
generator, V until the output begins to oscillate. Oscilla-
IH
tion is defined as noise on the output LOW level that
exceeds V limits, or on output HIGH levels that exceed
IL
V
limits. The input HIGH voltage level at which oscilla-
.
IH
tion occurs is defined as V
IHD
Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
TL/F/10955–4
FIGURE 1. Quiet Output Noise Voltage Waveforms
Note A: V
and V
are measured with respect to ground reference.
OLP
OHV
e
Note B: Input pulses have the following characteristics:
k
150 ps.
f
1 MHz,
e
e
3 ns, skew
t
r
3 ns, t
f
TL/F/10955–5
FIGURE 2. Simultaneous Switching Test Circuit
6
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74ACTQ 18825 SS
C
X
Temperature Range Family
e
Special Variations
X
e
Devices shipped in 13 reels
74ACTQ
CommercialÐTTL Compatible
×
Device Type
Temperature Range
e
b
Commercial Product ( 40 C to
C
§
Package Code
e
a
85 C)
§
SS
Small Outline (SSOP)
7
Physical Dimensions inches (millimeters)
56-Lead SSOP (0.300 Wide) (SS)
×
NS Package Number MS56A
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into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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