74AHC1G125DCKRG4 概述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT 具有三态输出单总线缓冲器门 逻辑控制器 总线驱动器/收发器
74AHC1G125DCKRG4 规格参数
是否Rohs认证: | 符合 | 生命周期: | Active |
零件包装代码: | SOIC | 包装说明: | SC-70, 5 PIN |
针数: | 5 | Reach Compliance Code: | compliant |
ECCN代码: | EAR99 | HTS代码: | 8542.39.00.01 |
Factory Lead Time: | 6 weeks | 风险等级: | 0.79 |
Is Samacsys: | N | 控制类型: | ENABLE LOW |
计数方向: | UNIDIRECTIONAL | 系列: | AHC/VHC/H/U/V |
JESD-30 代码: | R-PDSO-G5 | JESD-609代码: | e4 |
长度: | 2 mm | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | BUS DRIVER | 最大I(ol): | 0.008 A |
湿度敏感等级: | 1 | 位数: | 1 |
功能数量: | 1 | 端口数量: | 2 |
端子数量: | 5 | 最高工作温度: | 125 °C |
最低工作温度: | -40 °C | 输出特性: | 3-STATE |
输出极性: | TRUE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | TSSOP | 封装等效代码: | TSSOP5/6,.08 |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
包装方法: | TR | 峰值回流温度(摄氏度): | 260 |
电源: | 2/5.5 V | 最大电源电流(ICC): | 0.01 mA |
Prop。Delay @ Nom-Sup: | 9.5 ns | 传播延迟(tpd): | 13 ns |
认证状态: | Not Qualified | 座面最大高度: | 1.1 mm |
子类别: | Bus Driver/Transceivers | 最大供电电压 (Vsup): | 5.5 V |
最小供电电压 (Vsup): | 2 V | 标称供电电压 (Vsup): | 3.3 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | AUTOMOTIVE | 端子面层: | Nickel/Palladium/Gold (Ni/Pd/Au) |
端子形式: | GULL WING | 端子节距: | 0.65 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
翻译: | N/A | 宽度: | 1.25 mm |
Base Number Matches: | 1 |
74AHC1G125DCKRG4 数据手册
通过下载74AHC1G125DCKRG4数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢇꢉ ꢊ
ꢀꢋ ꢁꢈ ꢌ ꢍ ꢎꢏꢀ ꢎꢏꢐ ꢐ ꢍ ꢑ ꢈ ꢄꢒꢍ
ꢓ ꢋꢒ ꢅ ꢔ ꢕꢀꢒꢄꢒ ꢍ ꢖ ꢏꢒ ꢗꢏ ꢒ
SCLS377J − AUGUST 1997 − REVISED JUNE 2005
D
D
Operating Range of 2 V to 5.5 V
D
D
Low Power Consumption, 10-µA Max I
8-mA Output Drive at 5 V
CC
Max t of 6 ns at 5 V
pd
DCK PACKAGE
(TOP VIEW)
DBV PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
OE
A
V
Y
1
2
3
5
1
2
3
5
OE
A
V
Y
CC
CC
1
2
3
5
OE
A
V
Y
CC
4
GND
4
GND
4
GND
See mechanical drawings for dimensions.
description/ordering information
The SN74AHC1G125 is a single bus buffer gate/line driver with 3-state output. The output is disabled when the
output-enable (OE) input is high. When OE is low, true data is passed from the A input to the Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup
CC
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
‡
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
SN74AHC1G125DBVR
SN74AHC1G125DBVT
SN74AHC1G125DCKR
SN74AHC1G125DCKT
SOT (SOT-23) − DBV
A25_
−40°C to 85°C
SOT (SC-70) − DCK
AM_
AM_
SOT (SOT-553) − DRL
Reel of 4000
SN74AHC1G125DRLR
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
logic diagram (positive logic)
1
2
OE
A
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2005, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢓꢋ ꢒ ꢅ ꢔ ꢕꢀꢒꢄꢒ ꢍ ꢖꢏꢒ ꢗꢏ ꢒ
SCLS377J − AUGUST 1997 − REVISED JUNE 2005
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
JA
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
DRL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
MAX
UNIT
V
Supply voltage
2
1.5
5.5
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
= 3 V
2.1
V
High-level input voltage
V
V
= 5.5 V
= 2 V
3.85
0.5
0.9
= 3 V
V
IL
Low-level input voltage
= 5.5 V
1.65
5.5
V
V
Input voltage
0
0
V
V
I
Output voltage
V
CC
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
−50
−4
−8
50
4
mA
= 3.3 V 0.3 V
= 5 V 0.5 V
= 2 V
I
High-level output current
Low-level output current
OH
mA
mA
= 3.3 V 0.3 V
= 5 V 0.5 V
= 3.3 V 0.3 V
= 5 V 0.5 V
I
OL
mA
8
100
20
85
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
−40
°C
A
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢇꢉ ꢊ
ꢀꢋ ꢁꢈ ꢌ ꢍ ꢎꢏꢀ ꢎꢏꢐ ꢐ ꢍ ꢑ ꢈ ꢄꢒꢍ
ꢓ ꢋꢒ ꢅ ꢔ ꢕꢀꢒꢄꢒ ꢍ ꢖ ꢏꢒ ꢗꢏ ꢒ
SCLS377J − AUGUST 1997 − REVISED JUNE 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
2
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
1.9
MAX
2 V
3 V
1.9
2.9
2.9
3
I
= −50 mA
OH
4.5 V
3 V
4.4
4.5
4.4
V
V
OH
OL
I
I
= −4 mA
= −8 mA
2.58
3.94
2.48
3.8
OH
4.5 V
2 V
OH
0.1
0.1
0.1
0.36
0.36
0.1
0.25
1
0.1
0.1
0.1
0.44
0.44
1
3 V
I
= 50 mA
OL
4.5 V
3 V
V
V
I
I
= 4 mA
= 8 mA
OL
4.5 V
0 V to 5.5 V
5.5 V
5.5 V
5 V
OL
I
I
I
V = 5.5 V or GND
mA
mA
mA
pF
pF
I
I
V = V
or GND
or GND,
or GND
2.5
10
OZ
CC
I
CC
CC
CC
V = V
I
O
= 0
I
C
C
V = V
4
10
10
i
I
V
= V
O CC
or GND
5 V
10
o
switching characteristics over recommended operating free-air temperature range,
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
5.6
5.6
5.4
5.4
7
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
ns
MIN
MAX
8
t
t
t
t
t
t
1
1
1
1
1
1
1
1
1
1
1
1
9.5
9.5
9.5
9.5
11.5
11.5
13
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
C
C
C
= 15 pF
= 15 pF
= 15 pF
L
L
L
8
8
ns
OE
OE
8
9.7
9.7
11.5
11.5
11.5
11.5
13.2
13.2
ns
7
t
t
t
t
t
t
8.1
8.1
7.9
7.9
9.5
9.5
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
C
C
C
= 50 pF
= 50 pF
= 50 pF
ns
ns
ns
L
L
L
13
13
OE
OE
13
15
15
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢓꢋ ꢒ ꢅ ꢔ ꢕꢀꢒꢄꢒ ꢍ ꢖꢏꢒ ꢗꢏ ꢒ
SCLS377J − AUGUST 1997 − REVISED JUNE 2005
switching characteristics over recommended operating free-air temperature range,
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
3.8
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
ns
MIN
MAX
5.5
5.5
5.1
5.1
6.8
6.8
t
t
t
t
t
t
1
1
1
1
1
1
6.5
6.5
6
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
C
C
C
= 15 pF
= 15 pF
= 15 pF
L
L
L
3.8
3.6
ns
OE
OE
3.6
6
4.6
8
ns
4.6
8
t
t
t
t
t
t
5.3
5.3
5.1
5.1
6.1
6.1
7.5
7.5
7.1
7.1
8.8
8.8
1
1
1
1
1
1
8.5
8.5
8
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
C
C
C
= 50 pF
= 50 pF
= 50 pF
ns
ns
ns
L
L
L
OE
OE
8
10
10
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
No load, f = 1 MHz
TYP
UNIT
C
Power dissipation capacitance
14
pF
pd
4
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ꢓ ꢋꢒ ꢅ ꢔ ꢕꢀꢒꢄꢒ ꢍ ꢖ ꢏꢒ ꢗꢏ ꢒ
SCLS377J − AUGUST 1997 − REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
GND
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
su
V
CC
V
CC
50% V
CC
50% V
CC
Input
50% V
CC
50% V
CC
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
CC
50% V
CC
50% V
CC
50% V
t
Input
CC
0 V
0 V
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
OH
≈V
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
S1 at V
(see Note B)
V
OL
+ 0.3 V
CC
V
OL
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
V
OH
OH
Out-of-Phase
Output
V
OH
− 0.3 V
50% V
CC
50% V
50% V
CC
CC
V
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
22-Oct-2007
PACKAGING INFORMATION
Orderable Device
74AHC1G125DBVRE4
74AHC1G125DBVRG4
74AHC1G125DBVTE4
74AHC1G125DBVTG4
74AHC1G125DCKRE4
74AHC1G125DCKRG4
74AHC1G125DCKTE4
74AHC1G125DCKTG4
74AHC1G125DRLRG4
SN74AHC1G125DBVR
SN74AHC1G125DBVT
SN74AHC1G125DCKR
SN74AHC1G125DCKT
SN74AHC1G125DRLR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DRL
DBV
DBV
DCK
DCK
DRL
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Oct-2007
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
31-May-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN74AHC1G125DBVR SOT-23
SN74AHC1G125DBVR SOT-23
SN74AHC1G125DBVT SOT-23
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DCK
DCK
DRL
5
5
5
5
5
5
5
5
5
5
3000
3000
250
178.0
180.0
180.0
180.0
180.0
178.0
178.0
180.0
180.0
180.0
9.0
9.2
9.2
9.2
9.2
9.0
9.0
9.2
9.2
9.2
3.23
3.23
3.23
2.24
2.24
2.4
3.17
3.17
3.17
2.34
2.34
2.5
1.37
1.37
1.37
1.22
1.22
1.2
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
SN74AHC1G125DCKR
SN74AHC1G125DCKR
SN74AHC1G125DCKR
SN74AHC1G125DCKT
SN74AHC1G125DCKT
SN74AHC1G125DCKT
SN74AHC1G125DRLR
SC70
SC70
SC70
SC70
SC70
SC70
SOT
3000
3000
3000
250
2.4
2.5
1.2
250
2.24
2.24
1.78
2.34
2.34
1.78
1.22
1.22
0.69
250
4000
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
31-May-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AHC1G125DBVR
SN74AHC1G125DBVR
SN74AHC1G125DBVT
SN74AHC1G125DCKR
SN74AHC1G125DCKR
SN74AHC1G125DCKR
SN74AHC1G125DCKT
SN74AHC1G125DCKT
SN74AHC1G125DCKT
SN74AHC1G125DRLR
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DCK
DCK
DRL
5
5
5
5
5
5
5
5
5
5
3000
3000
250
180.0
205.0
205.0
202.0
205.0
180.0
180.0
202.0
205.0
202.0
180.0
200.0
200.0
201.0
200.0
180.0
180.0
201.0
200.0
201.0
18.0
33.0
33.0
28.0
33.0
18.0
18.0
28.0
33.0
28.0
3000
3000
3000
250
SC70
SC70
SC70
SC70
250
SC70
250
SOT
4000
Pack Materials-Page 2
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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74AHC1G125DCKRG4 替代型号
型号 | 制造商 | 描述 | 替代类型 | 文档 |
SN74AHC1G125DCKR | TI | SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT | 完全替代 | |
SN74AHC1G125DCKT | TI | SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT | 完全替代 | |
74AHC1G125DCKTG4 | TI | SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT | 完全替代 |
74AHC1G125DCKRG4 相关器件
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74AHC1G125DCKTG4 | TI | SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT | 获取价格 | |
74AHC1G125DRLRG4 | TI | SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT | 获取价格 | |
74AHC1G125GF | NXP | Bus buffer/line driver; 3-state | 获取价格 | |
74AHC1G125GF,132 | NXP | 74AHC(T)1G125 - Bus buffer/line driver; 3-state SON 6-Pin | 获取价格 | |
74AHC1G125GM | NXP | Bus buffer/line driver; 3-state | 获取价格 | |
74AHC1G125GM | NEXPERIA | Bus buffer/line driver; 3-stateProduction | 获取价格 | |
74AHC1G125GM,132 | NXP | 74AHC(T)1G125 - Bus buffer/line driver; 3-state SON 6-Pin | 获取价格 | |
74AHC1G125GV | NXP | Bus buffer/line driver; 3-state | 获取价格 | |
74AHC1G125GV | NEXPERIA | Bus buffer/line driver; 3-state | 获取价格 |
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