74AHCT16245DGVRG4 [TI]
16-Bit Bus Transceivers With 3-State Outputs 48-TVSOP -40 to 85;
| 型号： | 74AHCT16245DGVRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-Bit Bus Transceivers With 3-State Outputs 48-TVSOP -40 to 85 光电二极管 逻辑集成电路 电视 |
| 文件： | 总13页 (文件大小：368K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54AHCT16245, SN74AHCT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS335J – MARCH 1996 – REVISED OCTOBER 2000
SN54AHCT16245 . . . WD PACKAGE
SN74AHCT16245 . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
Members of Texas Instruments’ Widebus
Family
Inputs Are TTL-Voltage Compatible
Distributed V
High-Speed Switching Noise
and GND Pins Minimize
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
CC
2
3
Flow-Through Architecture Optimizes PCB
Layout
4
5
Latch-Up Performance Exceeds 250 mA Per
JESD 17
6
7
V
V
CC
CC
8
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
description
9
The ’AHCT16245 devices are 16-bit (dual-octal)
noninverting 3-state transceivers designed for
synchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. They allow
data transmission from the A bus to the B bus or
fromtheBbustotheAbus, dependingonthelogic
level at the direction-control (DIR) input. The
output-enable (OE) input can be used to disable
the device so that the buses are effectively
isolated.
V
V
CC
CC
2B5
2B6
GND
2B7
2B8
2A5
2A6
GND
2A7
2A8
2OE
To ensure the high-impedance state during power
up or power down, OE should be tied to V
2DIR
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74AHCT16245DL
SSOP – DL
AHCT16245
Tape and reel
SN74AHCT16245DLR
SN74AHCT16245DGGR
SN74AHCT16245DGVR
SNJ54AHCT16245WD
–40°C to 85°C
–55°C to 125°C
TSSOP – DGG Tape and reel
AHCT16245
TVSOP – DGV
CFP – WD
Tape and reel
Tube
HF245
SNJ54AHCT16245WD
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright 2000, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT16245, SN74AHCT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS335J – MARCH 1996 – REVISED OCTOBER 2000
FUNCTION TABLE
(each 8-bit transceiver)
INPUTS
OPERATION
OE
DIR
L
L
L
B data to A bus
A data to B bus
Isolation
H
H
X
†
logic symbol
48
1OE
G3
1
1DIR
3 EN1 [BA]
3 EN2 [AB]
25
2OE
G6
24
2DIR
6 EN4 [BA]
6 EN5 [AB]
47
2
1A1
1B1
1
2
46
1A2
44
3
5
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
1A3
43
6
1A4
41
8
1A5
40
9
1A6
38
11
12
13
1A7
37
1A8
36
2A1
4
5
35
2A2
33
14
16
17
19
20
22
23
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2A3
32
2A4
30
2A5
29
2A6
27
2A7
26
2A8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT16245, SN74AHCT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS335J – MARCH 1996 – REVISED OCTOBER 2000
logic diagram (positive logic)
1
24
36
1DIR
2DIR
2A1
48
25
1OE
1B1
2OE
47
1A1
2
13
2B1
To Seven Other Channels
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1): Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
I/O, Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
O
CC
Input clamp current, I (V < 0): Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
IK
I
I/O, Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through each V
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
O
O
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
CC
JA
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54AHCT16245 SN74AHCT16245
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
Input voltage
IH
0.8
5.5
0.8
5.5
V
IL
0
0
0
0
V
I
Input/output voltage, A or B pins
High-level output current
Low-level output current
V
V
V
IO
OH
OL
CC
–8
CC
–8
I
I
mA
mA
ns/V
°C
8
8
20
85
∆t/∆v Input transition rise or fall rate
Operating free-air temperature
NOTE 3: All unused inputs of the device must be held at V
20
T
A
–55
125
–40
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT16245, SN74AHCT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS335J – MARCH 1996 – REVISED OCTOBER 2000
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54AHCT16245 SN74AHCT16245
A
PARAMETER
TEST CONDITIONS
V
UNIT
V
CC
MIN TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
= –50
A
4.4
4.5
OH
OH
OL
OL
V
V
4.5 V
4.5 V
OH
= –8 mA
= 50
= 8 mA
3.94
3.8
3.8
A
0.1
0.36
±0.1
±0.25
4
0.1
0.44
±1*
0.1
0.44
±1
V
OL
I
I
I
OE or DIR
V = V
or GND
0 V to 5.5 V
5.5 V
A
A
A
I
I
CC
†
A or B inputs
V
= V
or GND
±2.5
40
±2.5
40
OZ
CC
O
CC
V = V
or GND, I = 0
5.5 V
I
CC
O
One input at 3.4 V,
Other inputs at
‡
5.5 V
1.35
10
1.5
1.5
10
mA
∆I
CC
V
or GND
CC
V = V
C
C
OE or DIR
or GND
or GND
5 V
5 V
2.5
4
pF
pF
i
I
CC
CC
A or B inputs V = V
io
I
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V
= 0 V.
CC
†
‡
For I/O ports, the parameter I
includes the input leakage current.
OZ
This is the increase in supply current for each input at one of the specified TTL voltage levels rather than 0 V or V
CC
.
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
4.5**
4.5**
8.9**
8.9**
9.2**
9.2**
7
SN54AHCT16245 SN74AHCT16245
FROM
(INPUT)
TO
LOAD
PARAMETER
UNIT
ns
(OUTPUT) CAPACITANCE
MIN
MAX
8.5**
8.5**
13**
13**
14**
14**
9.5
MIN
1**
1**
1**
1**
1**
1**
1
MAX
10**
10**
14**
14**
15**
15**
11
MIN
1
MAX
9.5
9.5
14
t
t
t
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
PLH
PHL
PZH
PZL
PHZ
PLZ
sk(o)
A or B
OE
B or A
A or B
A or B
B or A
A or B
A or B
C
C
C
C
C
= 15 pF
= 15 pF
= 15 pF
= 50 pF
= 50 pF
L
L
L
L
L
1
1
ns
1
14
1
15
ns
OE
1
15
1
10.5
10.5
15
A or B
ns
5.3
9.5
1
11
1
8.3
14
1
15
1
ns
OE
OE
8.3
14
1
15
1
15
8
14
1
15
1
15
C
C
= 50 pF
= 50 pF
ns
ns
L
L
8
14
1
15
1
15
1***
1
** On products compliant to MIL-PRF-38535, this parameter is not production tested.
*** On products compliant to MIL-PRF-38535, this parameter does not apply.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT16245, SN74AHCT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS335J – MARCH 1996 – REVISED OCTOBER 2000
noise characteristics, V
= 5 V, C = 50 pF, T = 25°C (see Note 4)
CC
L
A
SN74AHCT16245
UNIT
PARAMETER
MIN
TYP
MAX
V
V
V
V
V
Quiet output, maximum dynamic V
0.6
V
V
V
V
V
OL(P)
OL(V)
OH(V)
IH(D)
IL(D)
OL
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage
Low-level dynamic input voltage
–0.6
4.8
OL
OH
2
0.8
NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
No load, f = 1 MHz
TYP
UNIT
C
Power dissipation capacitance
17
pF
pd
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT16245, SN74AHCT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS335J – MARCH 1996 – REVISED OCTOBER 2000
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
GND
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
3 V
0 V
1.5 V
Timing Input
t
w
t
h
3 V
t
su
3 V
0 V
1.5 V
1.5 V
Input
Input
1.5 V
1.5 V
Data Input
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
0 V
t
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
50% V
CC
50% V
CC
CC
V
S1 at V
(see Note B)
CC
V
V
+ 0.3 V
OL
V
OL
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
– 0.3 V
OH
50% V
50% V
CC
CC
CC
V
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
74AHCT16245DGGRE4
74AHCT16245DGGRG4
74AHCT16245DGVRE4
74AHCT16245DGVRG4
74AHCT16245DLRG4
SN74AHCT16245DGGR
SN74AHCT16245DGVR
SN74AHCT16245DL
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
48
48
48
48
48
48
48
48
48
48
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TVSOP
TVSOP
SSOP
DGG
DGV
DGV
DL
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TVSOP
SSOP
DGG
DGV
DL
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHCT16245DLG4
SN74AHCT16245DLR
SSOP
DL
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SSOP
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Aug-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AHCT16245DGGR TSSOP
SN74AHCT16245DGVR TVSOP
DGG
DGV
DL
48
48
48
2000
2000
1000
330.0
330.0
330.0
24.4
16.4
32.4
8.6
7.1
15.8
10.2
1.8
1.6
3.1
12.0
12.0
16.0
24.0
16.0
32.0
Q1
Q1
Q1
SN74AHCT16245DLR
SSOP
11.35 16.2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Aug-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AHCT16245DGGR
SN74AHCT16245DGVR
SN74AHCT16245DLR
TSSOP
TVSOP
SSOP
DGG
DGV
DL
48
48
48
2000
2000
1000
346.0
346.0
346.0
346.0
346.0
346.0
41.0
33.0
49.0
Pack Materials-Page 2
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
48
0.0135 (0,343)
0.008 (0,203)
0.005 (0,13)
M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
0°–ā8°
1
24
0.040 (1,02)
0.020 (0,51)
A
Seating Plane
0.004 (0,10)
0.008 (0,20) MIN
PINS **
0.110 (2,79) MAX
28
48
0.630
56
DIM
0.380
(9,65)
0.730
A MAX
A MIN
(16,00) (18,54)
0.370
(9,40)
0.620
0.720
(15,75) (18,29)
4040048/E 12/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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