74ALB16244DGGE4 [TI]
IC,BUFFER/DRIVER,QUAD,4-BIT,ALB-BICMOS,TSSOP,48PIN,PLASTIC;
| 型号： | 74ALB16244DGGE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC,BUFFER/DRIVER,QUAD,4-BIT,ALB-BICMOS,TSSOP,48PIN,PLASTIC 驱动 信息通信管理 光电二极管 逻辑集成电路 |
| 文件： | 总11页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
Member of Texas Instruments’ Widebus
Family
State-of-the-Art Advanced Low-Voltage
BiCMOS (ALB) Technology Design for 3.3-V
Operation
1OE
1Y1
1Y2
GND
1Y3
1Y4
1
2
3
4
5
6
7
8
9
48 2OE
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
Schottky Diodes on All Inputs to Eliminate
Overshoot and Undershoot
Industry Standard ’16244 Pinout
V
42
V
Distributed V
High-Speed Switching Noise
and GND Pins Minimize
CC
CC
CC
2Y1
2Y2
41 2A1
40 2A2
39 GND
38 2A3
37 2A4
36 3A1
35 3A2
34 GND
33 3A3
32 3A4
Flow-Through Architecture Optimizes PCB
Layout
GND 10
2Y3 11
2Y4 12
3Y1 13
3Y2 14
GND 15
3Y3 16
3Y4 17
description
The SN74ALB16244 16-bit buffer and line driver
is designed for high-speed, low-voltage (3.3-V)
V
operation. This device is intended to replace
CC
the conventional driver in any speed-critical path.
The small propagation delay is achieved using a
unity-gain amplifier on the input and feedback
resistors from input to output, which allows the
output to track the input with a small offsetvoltage.
V
18
31
V
CC
CC
4Y1 19
4Y2 20
GND 21
4Y3 22
30 4A1
29 4A2
28 GND
27 4A3
The device can be used as four 4-bit buffers, two
8-bit buffers, or one 16-bit buffer. This device
provides true outputs and symmetrical active-low
output-enable (OE) inputs.
23
24
26
25
4Y4
4OE
4A4
3OE
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74ALB16244DL
SSOP – DL
ALB16244
Tape and reel
SN74ALB16244DLR
SN74ALB16244DGGR
SN74ALB16244DGVR
–40°C to 85°C
TSSOP – DGG Tape and reel
TVSOP – DGV Tape and reel
ALB16244
AV244
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
A
OE
L
H
L
H
L
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
†
logic symbol
1
1OE
EN1
EN2
EN3
EN4
48
2OE
25
3OE
24
4OE
47
1A1
46
2
3
1
1
1
1
1
2
3
4
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
1A2
44
5
1A3
43
6
1A4
41
8
2A1
40
9
2A2
38
11
12
13
14
16
17
19
20
22
23
2A3
37
2A4
36
3A1
35
3A2
33
3A3
32
3A4
30
4A1
29
4A2
27
4A3
26
4A4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
logic diagram (positive logic)
1
25
36
1OE
3OE
3A1
47
2
3
5
6
13
1A1
1Y1
1Y2
1Y3
1Y4
3Y1
46
35
33
32
14
1A2
3A2
3A3
3A4
3Y2
44
16
1A3
3Y3
43
17
1A4
3Y4
48
24
30
2OE
4OE
4A1
41
8
9
19
2A1
2Y1
2Y2
2Y3
2Y4
4Y1
40
29
27
26
20
2A2
4A2
4A3
4A4
4Y2
38
11
12
22
2A3
4Y3
37
23
2A4
4Y4
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
CC
Input voltage range, V : Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
I
I/O ports (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
CC
CC
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each V
Package thermal impedance, θ (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
O
O
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
CC
JA
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
recommended operating conditions
MIN
MAX
3.6
–25
25
UNIT
V
V
CC
Supply voltage
3
†
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
mA
mA
ns/V
°C
OH
†
OL
∆t/∆v
Outputs enabled
5
T
–40
85
A
†
See Figures 1 and 2 for typical I/O ranges.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
‡
PARAMETER
TEST CONDITIONS
I = 18 mA
MIN TYP
MAX
–1.2
UNIT
3.6
V
I
CC
–1.2
V
Data inputs
V
V
= 3 V
V
IK
CC
I = –18 mA
I
–0.9
Control inputs
= 3.6 V,
V = V
or GND
±10
0.6
25
µA
mA
µA
mA
µA
µA
µA
mA
mA
µA
pF
CC
I
CC
CC
OE low
OE high
OE low
OE high
0.4
V = V
I
I
I
Data inputs
V
CC
= 3.6 V
–0.8
–1
V = 0
I
–60
20
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
= 3.6 V,
= 3.6 V,
= 3.6 V,
= 3.6 V,
V
V
= 3 V
0.6
–0.1
3.7
OZH
O
= 0.5 V
–50
5.6
0.8
600
OZL
O
/buffer
I
O
= 0,
V = V
I
or GND
CC
CC
Control inputs = V
CC
or GND
CCZ
§
= 3 V to 3.6 V, One input at V
CC
–0.6 V, Other inputs at V or GND
CC
∆I
CC
C
C
V = 3 V or 0
I
4.5
5.5
i
V
O
= 3 V or 0
pF
o
‡
§
All typical values are at V
= 3.3 V, T = 25°C.
A
CC
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
or GND.
CC
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 3)
V = 3.3 V ± 0.3 V
CC
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
‡
MIN TYP
MAX
t
Y
Y
Y
0.6
1.3
1.8
1.3
2
ns
ns
ns
A
pd
t
en
2.5
2.8
4.7
4.2
OE
OE
t
dis
‡
All typical values are at V
= 3.3 V, T = 25°C.
A
CC
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
OUTPUT VOLTAGE HIGH
vs
INPUT VOLTAGE
3.5
3
2.5
2
–100 µA
–25 mA
–6 mA
1.5
1.5
2
2.5
3
3.5
4
V – Input Voltage – V
I
Figure 1. V
Over Recommended Free-Air Temperature Range
OH
OUTPUT VOLTAGE LOW
vs
INPUT VOLTAGE
2
1.5
1
25 mA
100 µA
0.5
0
6 mA
0
0.5
1
1.5
2
V – Input Voltage – V
I
Figure 2. V
Over Recommended Free-Air Temperature Range
OL
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
PARAMETER MEASUREMENT INFORMATION
6 V
Open
GND
S1
500 Ω
From Output
Under Test
TEST
S1
t
Open
6 V
pd
/t
C
= 50 pF
t
L
PLZ PZL
500 Ω
(see Note A)
t
/t
GND
PHZ PZH
LOAD CIRCUIT
1.5 V
t
w
3 V
0 V
1.5 V
1.5 V
Input
3 V
Timing
Input
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
t
h
su
3 V
0 V
3 V
Output Control
(low-level
Data
Input
1.5 V
1.5 V
1.5 V
1.5 V
enabling)
0 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
t
t
PLZ
PZL
Output
Waveform 1
S1 at 6 V
3 V
V
3 V
0 V
1.5 V
Input
1.5 V
1.5 V
V + 0.3 V
OL
(see Note B)
OL
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
V
OH
– 0.3 V
1.5 V
Output
1.5 V
1.5 V
0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
dis
en
.
pd
PLZ
PZL
PLH
PHZ
PZH
PHL
.
Figure 3. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
3-May-2005
PACKAGING INFORMATION
Orderable Device
SN74ALB16244DGGR
SN74ALB16244DGVR
SN74ALB16244DL
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
48
48
48
48
2000
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
TVSOP
SSOP
SSOP
DGV
DL
2000
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALB16244DLR
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
48
0.0135 (0,343)
0.008 (0,203)
0.005 (0,13)
M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
0°–ā8°
1
24
0.040 (1,02)
0.020 (0,51)
A
Seating Plane
0.004 (0,10)
0.008 (0,20) MIN
PINS **
0.110 (2,79) MAX
28
48
0.630
56
DIM
0.380
(9,65)
0.730
A MAX
A MIN
(16,00) (18,54)
0.370
(9,40)
0.620
0.720
(15,75) (18,29)
4040048/E 12/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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