74F169PCQB [TI]
F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16, 0.300 INCH, PLASTIC, DIP-16;
| 型号： | 74F169PCQB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16, 0.300 INCH, PLASTIC, DIP-16 光电二极管 |
| 文件： | 总8页 (文件大小：141K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1994
54F/74F169
4-Stage Synchronous Bidirectional Counter
General Description
Features
Y
Asynchronous counting and loading
The ’F169 is a fully synchronous 4-stage up/down counter.
The ’F169 is a modulo-16 binary counter. Features a preset
capability for programmable operation, carry lookahead for
easy cascading and a U/D input to control the direction of
counting. All state changes, whether in counting or parallel
loading, are initiated by the LOW-to-HIGH transition of the
clock.
Y
Built-in lookahead carry capability
Y
Presettable for programmable operation
Package
Commercial
74F169PC
Military
Package Description
Number
N16E
16-Lead (0.300 Wide) Molded Dual-In-Line
×
54F169DM (Note 2)
J16A
16-Lead Ceramic Dual-In-Line
74F169SC (Note 1)
74F169SJ (Note 1)
M16A
M16D
16-Lead (0.150 Wide) Molded Small Outline, JEDEC
×
16-Lead (0.300 Wide) Molded Small Outline, EIAJ
×
e
Note 1: Devices also available in 13 reel. Use suffix
SCX and SJX.
×
Note 2: Military grade device with environmental and burn-in processing. Use suffix
e
DMQB.
Logic Symbols
IEEE/IEC
’F169
TL/F/9488–3
TL/F/9488–9
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/9488
RRD-B30M75/Printed in U. S. A.
Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
Pin Assignment
for LCC
TL/F/9488–1
TL/F/9488–2
Unit Loading/Fan Out
54F/74F
Pin Names
Description
U.L.
Input I /I
IH IL
HIGH/LOW Output I /I
OH OL
b
20 mA/ 0.6 mA
CEP
CET
CP
Count Enable Parallel Input (Active LOW)
Count Enable Trickle Input (Active LOW)
Clock Pulse Input (Active Rising Edge)
Parallel Data Inputs
1.0/1.0
1.0/2.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33.3
50/33.3
b
20 mA/ 1.2 mA
b
20 mA/ 0.6 mA
b
20 mA/ 0.6 mA
b
20 mA/ 0.6 mA
b
20 mA/ 0.6 mA
P –P
0
3
PE
Parallel Enable Input (Active LOW)
Up-Down Count Control Input
Flip-Flop Outputs
U/D
b
b
Q –Q
0
1 mA/20 mA
1 mA/20 mA
3
TC
Terminal Count Output (Active LOW)
Functional Description
The ’F169 uses edge-triggered J-K type flip-flops and has
no constraints on changing the control or data input signals
in either state of the clock. The only requirement is that the
various inputs attain the desired state at least a setup time
before the rising edge of the clock and remain valid for the
recommended hold time thereafter. The parallel load opera-
tion takes precedence over other operations, as indicated in
the Mode Select Table. When PE is LOW, the data on the
P –P inputs enters the flip-flops on the next rising edge of
CET is LOW, when a counter reaches zero in the Count
Down mode or reaches 15 for the ’F169 in the Count Up
mode. The TC output state is not a function of the Count
Enable Parallel (CEP) input level. Since the TC signal is de-
rived by decoding the flip-flop states, there exists the possi-
bility of decoding spikes on TC. For this reason the use of
TC as a clock signal is not recommended (see logic equa-
tions below).
e
0
3
1) Count Enable
CEP CET PE
#
#
the clock. In order for counting to occur, both CEP and CET
must be LOW and PE must be HIGH; the U/D input then
determines the direction of counting. The Terminal Count
(TC) output is normally HIGH and goes LOW, provided that
e
2) Up: (’F169): TC
Q
Q
Q
Q
Q
Q
#
3
(Down) CET
#
(Up) CET
#
#
#
#
#
#
#
0
1
2
e
3) Down: TC
Q
Q
#
0
1
2
3
2
Logic Diagram
’F169
TL/F/9488–5
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Mode Select Table
Action on Rising
PE
CEP
CET
U/D
Clock Edge
e
e
e
H
L
HIGH Voltage Level
LOW Voltage Level
Immaterial
L
H
H
H
H
X
L
X
L
X
H
L
Load (Pn x Q )
n
Count Up (Increment)
Count Down (Decrement)
No Change (Hold)
X
L
L
H
X
X
H
X
X
No Change (Hold)
State Diagram
’F169
TL/F/9488–7
3
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
Commercial
b
a
55 C to 125 C
§
0 C to 70 C
§
§
b
b
a
65 C to 150 C
Storage Temperature
§
§
§
§
§
a
§
a
55 C to 125 C
Ambient Temperature under Bias
§
Supply Voltage
Military
Commercial
b
b
a
a a
4.5V to 5.5V
a a
4.5V to 5.5V
Junction Temperature under Bias
Plastic
55 C to 175 C
§
§
a
55 C to 150 C
V
Pin Potential to
CC
Ground Pin
b
a
0.5V to 7.0V
b
a
0.5V to 7.0V
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
b
a
30 mA to 5.0 mA
e
in HIGH State (with V
Standard Output
0V)
CC
b
0.5V to 5.5V
0.5V to V
CC
b
a
TRI-STATE Output
É
Current Applied to Output
in LOW State (Max)
twice the rated I (mA)
OL
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
54F/74F
Symbol
Parameter
Units
V
CC
Conditions
Min
Typ
Max
V
V
V
V
Input HIGH Voltage
2.0
V
V
V
Recognized as a HIGH Signal
Recognized as a LOW Signal
IH
Input LOW Voltage
0.8
IL
b
e b
18 mA
Input Clamp Diode Voltage
1.2
Min
Min
I
IN
CD
OH
e b
e b
e b
Output HIGH
Voltage
54F 10% V
2.5
2.5
2.7
I
I
I
1 mA
1 mA
1 mA
CC
OH
OH
OH
74F 10% V
74F 5% V
V
CC
CC
e
e
V
Output LOW
Voltage
54F 10% V
74F 10% V
0.5
I
I
20 mA
20 mA
OL
CC
OL
V
Min
Max
Max
Max
0.0
0.5
CC
OL
e
I
I
I
Input HIGH
Current
54F
74F
20.0
5.0
V
V
V
2.7V
IH
IN
mA
mA
mA
V
e
Input HIGH Current
Breakdown Test
54F
74F
100
7.0
7.0V
BVI
IN
e
V
CC
Output HIGH
54F
74F
250
50
CEX
OUT
Leakage Current
e
All Other Pins Grounded
V
Input Leakage
Test
I
ID
1.9 mA
ID
OD
IL
74F
74F
4.75
e
All Other Pins Grounded
I
I
Output Leakage
Circuit Current
V
150 mV
IOD
3.75
mA
mA
0.0
b
b
e
e
Input LOW Current
0.6
1.2
V
V
0.5V (except CET)
0.5V (CET)
IN
IN
Max
b
b
e
0V
OUT
I
I
Output Short-Circuit Current
Power Supply Current
60
150
mA
mA
Max
Max
V
V
OS
e
35
52
LOW
CCL
O
4
’F169
AC Electrical Characteristics
74F
54F
74F
e a
T
25 C
§
5.0V
A
e
50 pF
e
T
, V
CC
e
Mil
T
, V
Com
e
50 pF
A
A CC
e a
Symbol
Parameter
V
Units
CC
C
C
L
L
e
C
50 pF
L
Min
Typ
Max
Min
Max
Min
Max
f
Maximum Count Frequency
Propagation Delay
90
60
70
MHz
ns
max
t
t
3.0
4.0
6.5
9.0
8.5
3.0
4.0
12.0
16.0
3.0
4.0
9.5
PLH
CP to Q (PE HIGH or LOW)
n
11.5
13.0
PHL
t
t
Propagation Delay
CP to TC
5.5
4.0
12.0
8.5
15.5
12.5
5.5
4.0
20.0
15.0
5.5
4.0
17.5
13.0
PLH
ns
ns
ns
PHL
t
t
Propagation Delay
CET to TC
2.5
2.5
4.5
8.5
6.5
2.5
2.5
9.0
2.5
2.5
7.0
PLH
11.0
12.0
12.0
PHL
t
t
Propagation Delay
U/D to TC
3.5
4.0
8.5
8.0
11.5
12.0
3.5
4.0
16.0
14.0
3.5
4.0
12.5
13.0
PLH
PHL
AC Operating Requirements
74F
54F
74F
e a
T
25 C
§
5.0V
A
e
e
Symbol
Parameter
T
, V
CC
Mil
Max
T
, V
A CC
Com
Max
Units
A
e a
V
CC
Min
Max
Min
Min
t (H)
s
Setup Time, HIGH or LOW
4.0
4.0
4.5
4.5
4.5
4.5
t (L)
s
P to CP
n
ns
t (H)
h
Hold Time, HIGH or LOW
P to CP
n
3.0
3.0
3.5
3.5
3.5
3.5
t (L)
h
t (H)
s
Setup Time, HIGH or LOW
CEP or CET to CP
7.0
5.0
8.0
8.0
8.0
6.5
t (L)
s
ns
t (H)
h
Hold Time, HIGH or LOW
CEP or CET to CP
0
0
0
t (L)
h
0.5
1.0
0.5
t (H)
s
Setup Time, HIGH or LOW
PE to CP
8.0
8.0
10.0
10.0
9.0
9.0
t (L)
s
ns
t (H)
h
Hold Time, HIGH or LOW
PE to CP
1.0
0
1.0
0
1.0
0
t (L)
h
t (H)
s
Setup Time, HIGH or LOW
U/D to CP
11.0
7.0
14.0
12.0
12.5
8.5
t (L)
s
ns
ns
t (H)
h
Hold Time, HIGH or LOW
U/D to CP
0
0
0
0
0
0
t (L)
h
t
t
(H)
(L)
CP Pulse Width
HIGH or LOW
4.0
7.0
6.0
9.0
4.5
8.0
w
w
5
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F 169
S
C
X
Temperature Range Family
Special Variations
e
e
e
e
74F
54F
Commercial
Military
X
QB
Devices shipped in 13 reels
×
Military grade device with
environmental and burn-in
processing shipped in tubes
Device Type
Package Code
Temperature Range
e
e
e
e
P
D
S
SJ
Plastic DIP
Ceramic DIP
Small Outline Package SOIC JEDEC
Small Outline SOIC EIAJ
e
e
a
C
M
Commercial (0 C to 70 C)
§
§
b a
Military ( 55 C to 125 C)
§
§
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
6
Physical Dimensions inches (millimeters) (Continued)
16-Lead (0.150 Wide) Molded Small Outline Package, JEDEC (S)
×
NS Package Number M16A
16-Lead (0.300 Wide) Molded Dual-In-Line Package (P)
×
NS Package Number N16E
7
Physical Dimensions inches (millimeters) (Continued)
16-Lead (0.300 Wide) Molded Small Outline Package, EIAJ (SJ)
×
NS Package Number M16D
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failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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