750L05C [TI]
LOW-DROPOUT VOLTAGE REGULATORS; 低压差稳压器型号: | 750L05C |
厂家: | TEXAS INSTRUMENTS |
描述: | LOW-DROPOUT VOLTAGE REGULATORS |
文件: | 总20页 (文件大小:522K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TL750L, TL751L SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS017S–SEPTEMBER 1987–REVISED AUGUST 2005
FEATURES
•
Very Low Dropout Voltage, Less Than 0.6 V at
150 mA
•
•
•
•
•
Reverse Transient Protection Down to –50 V
Internal Thermal-Overload Protection
Overvoltage Protection
•
•
Very Low Quiescent Current
TTL- and CMOS-Compatible Enable on
TL751L Series
Internal Overcurrent-Limiting Circuitry
Less Than 500-µA Disable (TL751L Series)
•
60-V Load-Dump Protection
TL750L . . . D PACKAGE
(TOP VIEW)
TL750L . . . KC PACKAGE
(TOP VIEW)
TL750L . . . KTE PACKAGE
(TOP VIEW)
OUTPUT
INPUT
1
2
3
4
8
7
6
5
OUTPUT
OUTPUT
COMMON
INPUT
COMMON
COMMON
NC
COMMON
COMMON
NC
COMMON
INPUT
NC − No internal connection
TL751L . . . D PACKAGE
(TOP VIEW)
TL751L . . . P PACKAGE
(TOP VIEW)
TL750L . . . LP PACKAGE
(TO-92, TO-226AA)
(TOP VIEW)
OUTPUT
COMMON
COMMON
NC
INPUT
OUTPUT
NC
INPUT
NC
COMMON
ENABLE
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
INPUT
COMMON
COMMON
ENABLE
NC
NC
COMMON
OUTPUT
NC − No internal connection
NC − No internal connection
DESCRIPTION/ORDERING INFORMATION
The TL750L and TL751L series of fixed-output voltage regulators offer 5-V, 8-V, 10-V, and 12-V options. The
TL751L series also has an enable (ENABLE) input. When ENABLE is high, the regulator output is placed in the
high-impedance state. This gives the designer complete control over power up, power down, or emergency
shutdown.
The TL750L and TL751L series are low-dropout positive-voltage regulators specifically designed for
battery-powered systems. These devices incorporate overvoltage and current-limiting protection circuitry, along
with internal reverse-battery protection circuitry to protect the devices and the regulated system. The series is
fully protected against 60-V load-dump and reverse-battery conditions. Extremely low quiescent current during
full-load conditions makes these devices ideal for standby power systems.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerFLEX is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1987–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TL750L, TL751L SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS017S–SEPTEMBER 1987–REVISED AUGUST 2005
ORDERING INFORMATION
VO TYP
AT 25°C
TJ
PACKAGE(1)
PowerFLEX™ – KTE
ORDERABLE PART NUMBER(2)
TOP-SIDE MARKING
Reel of 2000
Tube of 75
TL750L05CKTER
TL750L05CD
TL750L05CDR
TL751L05CD
TL751L05CDR
TL750L05CLP
TL750L05CLPR
TL750L05CKC
TL750L08CD
TL750L08CDR
TL750L08CLP
TL751L10CP
TL750L10CD
TL750L10CDR
TL751L10CD
TL751L10CDR
TL750L10CLP
TL750L10CLPR
TL750L12CD
TL750L12CDR
TL751L12CD
TL751L12CDR
TL750L12CLP
TL750L05C
50L05C
51L05C
Reel of 2500
Tube of 75
SOIC – D
5 V
Reel of 2500
Bulk of 1000
Reel of 2000
Tube of 50
TO-226/TO-92 – LP
TO-220 – KC
SOIC – D
750L05C
TL750L05C
50L08C
Tube of 75
8 V
Reel of 2500
Bulk of 1000
Tube of 50
TO-226/TO-92 – LP
PDIP – P
750L08C
0°C to 125°C
TL751L10C
Tube of 75
50L10C
51L10C
750L10C
50L12C
Reel of 2500
Tube of 75
SOIC – D
10 V
Reel of 2500
Bulk of 1000
Reel of 2000
Tube of 75
TO-226/TO-92 – LP
Reel of 2500
Tube of 75
SOIC – D
12 V
51L12C
Reel of 2500
Bulk of 1000
TO-226/TO-92 – LP
750L12C
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) For the most current ordering information, see the Package Option Addendum at the end of this data sheet.
DEVICE COMPONENT COUNT
Transistors
JFETs
20
2
Diodes
5
Resistors
16
2
TL750L, TL751L SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS017S–SEPTEMBER 1987–REVISED AUGUST 2005
Absolute Maximum Ratings(1)
over operating junction temperature range (unless otherwise noted)
MIN
MAX UNIT
Continuous input voltage
Transient input voltage(2)
26
60
V
V
TA = 25°C
Continuous reverse input voltage
Transient reverse input voltage
Operating virtual junction temperature
Lead temperature
–15
–50
150
260
150
V
t ≤ 100 ms
V
TJ
°C
°C
°C
1,6 mm (1/16 in) for 10 s
Tstg
Storage temperature range
–65
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The transient input voltage rating applies to the waveform shown in Figure 1.
Package Thermal Data(1)
PACKAGE
PDIP (P)
BOARD
θJC
θJA
High K, JESD 51-7
High K, JESD 51-5
High K, JESD 51-7
High K, JESD 51-7
High K, JESD 51-5
57°C/W
3°C/W
39°C/W
55°C/W
3°C/W
85°C/W
23°C/W
97°C/W
140°C/W
19°C/W
PowerFLEX™ (KTE)
SOIC (D)
TO-226/TO-92 (LP)
TO-220 (KC)
(1) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
Recommended Operating Conditions
over recommended operating junction temperature range (unless otherwise noted)
MIN
6
MAX
26
UNIT
TL75xL05
TL75xL08
TL75xL10
TL75xL12
TL75xLxx
TL75xLxx
TL75xLxx
TL75xLxx
TL75xLxxC
9
26
VI
Input voltage
V
11
13
2
26
26
VIH
VIL
High-level ENABLE input voltage
Low-level ENABLE input voltage
15
V
V
TJ = 25°C
–0.3
–0.15
0
0.8
0.8
150
125
(1)
TJ = 0°C to 125°C
IO
Output current
mA
TJ
Operating virtual junction temperature
0
°C
(1) The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for
ENABLE voltage levels and temperature only.
3
TL750L, TL751L SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS017S–SEPTEMBER 1987–REVISED AUGUST 2005
TL75xL05 Electrical Characteristics(1)
VI = 14 V, IO = 10 mA, TJ = 25°C (unless otherwise noted)
TL750L05
TL751L05
PARAMETER
TEST CONDITIONS
UNIT
MIN
4.8
TYP
MAX
TJ = 25°C
5
5.2
5.25
10
Output voltage
VI = 6 V to 26 V, IO = 0 to 150 mA
V
TJ = 0°C to 125°C
4.75
VI = 9 V to 16 V
VI = 6 V to 26 V
VI = 8 V to 18 V, f = 120 Hz
IO = 5 mA to 150 mA
IO = 10 mA
5
6
Input regulation voltage
mV
30
Ripple rejection
60
65
20
dB
Output regulation voltage
50
0.2
0.6
mV
Dropout voltage
V
IO = 150 mA
Output noise voltage
f = 10 Hz to 100 kHz
IO = 150 mA
500
10
1
µV
12
2
Input bias current
VI = 6 V to 26 V, IO = 10 mA, TJ = 0°C to 125°C
ENABLE ≥ 2 V
mA
0.5
(1) Pulse-testing techniques are used to maintain the junction temperature as close to the ambient temperature as possible. Thermal effects
must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor,
with equivalent series resistance of less than 0.4 Ω, across the output.
TL75xL08 Electrical Characteristics(1)
VI = 14 V, IO = 10 mA, TJ = 25°C (unless otherwise noted)
TL750L08
TL751L08
PARAMETER
TEST CONDITIONS
UNIT
MIN
7.68
7.6
TYP
MAX
8.32
8.4
TJ = 25°C
8
Output voltage
VI = 9 V to 26 V, IO = 0 to 150 mA
V
TJ = 0°C to 125°C
VI = 10 V to 17 V
VI = 9 V to 26 V
VI = 11 V to 21 V, f = 120 Hz
IO = 5 mA to 150 mA
IO = 10 mA
10
25
65
40
20
Input regulation voltage
mV
50
Ripple rejection
60
dB
Output regulation voltage
80
0.2
0.6
mV
Dropout voltage
V
IO = 150 mA
Output noise voltage
f = 10 Hz to 100 kHz
IO = 150 mA
500
10
1
µV
12
2
Input bias current
VI = 9 V to 26 V, IO = 10 mA, TJ = 0°C to 125°C
ENABLE ≥ 2 V
mA
0.5
(1) Pulse-testing techniques are used to maintain the junction temperature as close to the ambient temperature as possible. Thermal effects
must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor,
with equivalent series resistance of less than 0.4 Ω, across the output.
4
TL750L, TL751L SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS017S–SEPTEMBER 1987–REVISED AUGUST 2005
TL75xL10 Electrical Characteristics(1)
VI = 14 V, IO = 10 mA, TJ = 25°C (unless otherwise noted)
TL750L10
TL751L10
PARAMETER
TEST CONDITIONS
UNIT
MIN
9.6
TYP
MAX
10.4
10.5
25
TJ = 25°C
10
Output voltage
VI = 11 V to 26 V, IO = 0 to 150 mA
V
TJ = 0°C to 125°C
9.5
VI = 12 V to 19 V
VI = 11 V to 26 V
VI = 12 V to 22 V, f = 120 Hz
IO = 5 mA to 150 mA
IO = 10 mA
10
30
65
50
Input regulation voltage
mV
60
Ripple rejection
60
dB
Output regulation voltage
100
0.2
0.6
mV
Dropout voltage
V
IO = 150 mA
Output noise voltage
f = 10 Hz to 100 kHz
IO = 150 mA
700
10
1
µV
12
2
Input bias current
VI = 11 V to 26 V, IO = 10 mA, TJ = 0°C to 125°C
ENABLE ≥ 2 V
mA
0.5
(1) Pulse-testing techniques are used to maintain the junction temperature as close to the ambient temperature as possible. Thermal effects
must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor,
with equivalent series resistance of less than 0.4 Ω, across the output.
TL75xL12 Electrical Characteristics(1)
VI = 14 V, IO = 10 mA, TJ = 25°C (unless otherwise noted)
TL750L12
TL751L12
PARAMETER
TEST CONDITIONS
UNIT
MIN
11.52
11.4
TYP
MAX
12.48
12.6
30
TJ = 25°C
12
Output voltage
VI = 13 V to 26 V, IO = 0 to 150 mA
V
TJ = 0°C to 125°C
VI = 14 V to 19 V
VI = 13 V to 26 V
VI = 13 V to 23 V, f = 120 Hz
IO = 5 mA to 150 mA
IO = 10 mA
15
20
55
50
Input regulation voltage
mV
40
Ripple rejection
50
dB
Output regulation voltage
120
0.2
0.6
mV
Dropout voltage
V
IO = 150 mA
Output noise voltage
f = 10 Hz to 100 kHz
IO = 150 mA
700
10
1
µV
12
2
Input bias current
VI = 13 V to 26 V, IO = 10 mA, TJ = 0°C to 125°C
ENABLE ≥ 2 V
mA
0.5
(1) Pulse-testing techniques are used to maintain the junction temperature as close to the ambient temperature as possible. Thermal effects
must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor,
with equivalent series resistance of less than 0.4 Ω, across the output.
PARAMETER MEASUREMENT INFORMATION
The TL750L, TL751L series are low-dropout regulators. This means that capacitance loading is important to the
performance of the regulator because it is a vital part of the control loop. The capacitor value and its equivalent
series resistance (ESR) both affect the control loop and must be defined for the load range and temperature
range. Figure 1 shows the recommended range of ESR for a given load with a 10-µF capacitor on the output.
5
TL750L, TL751L SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS017S–SEPTEMBER 1987–REVISED AUGUST 2005
TYPICAL CHARACTERISTICS
TL750L05
EQUIVALENT SERIES RESISTANCE
vs
TRANSIENT INPUT VOLTAGE
vs
TIME
LOAD CURRENT
1.0
0.9
60
50
T
= 25°C
A
C
T
A
= 10-µF Tantalum Capacitor
= −40°C to 125°C
L
(−t/0.230)
V = 14 V + 46e
I
for t ≥ 5 ms
0.8
0.7
0.6
0.5
0.4
0.3
0.2
Potential Instability Region
40
30
t = 1 ms
r
20
10
Region of Best Stability
0.1
0.024
Potential Instability Region
0
0
0
100
200
300
400
500
600
0
10
80
120
150
t − Time − ms
I
L
− Load Current − mA
Figure 1.
Figure 2.
TL750L05
TL750L12
INPUT CURRENT
vs
INPUT CURRENT
vs
INPUT VOLTAGE
INPUT VOLTAGE
60
40
35
30
50
40
30
25
20
15
10
20
10
0
5
0
0
2
4
6
8
10
12
14
0
1
2
3
4
5
6
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 3.
Figure 4.
6
PACKAGE OPTION ADDENDUM
www.ti.com
10-Feb-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
SOIC
Drawing
5962-9166901Q2A
5962-9166901QPA
TL750L05CD
OBSOLETE
OBSOLETE
ACTIVE
FK
JG
D
20
8
TBD
TBD
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8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL750L05CDE4
TL750L05CDR
TL750L05CDRE4
TL750L05CKC
ACTIVE
ACTIVE
ACTIVE
NRND
SOIC
SOIC
D
D
8
8
8
3
3
3
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TO-220
TO-220
TO-220
KC
KC
KCS
50
50
50
Pb-Free
(RoHS)
CU SN
CU SN
CU SN
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
TL750L05CKCE3
TL750L05CKCS
NRND
Pb-Free
(RoHS)
ACTIVE
Pb-Free
(RoHS)
TL750L05CKTER
TL750L05CLP
NRND
PFM
KTE
LP
3
3
2000
1000
TBD
CU SNPB
CU SN
Level-1-220C-UNLIM
N / A for Pkg Type
ACTIVE
TO-92
Pb-Free
(RoHS)
TL750L05CLPE3
ACTIVE
TO-92
LP
3
1000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL750L05CLPM
TL750L05CLPR
OBSOLETE
ACTIVE
TO-92
TO-92
LP
LP
3
3
TBD
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CU SN
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2000
2000
Pb-Free
(RoHS)
N / A for Pkg Type
TL750L05CLPRE3
ACTIVE
TO-92
LP
3
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL750L05CP
TL750L05QD
TL750L05QDR
TL750L05QKC
TL750L05QLP
TL750L05QP
TL750L08CD
OBSOLETE
OBSOLETE
OBSOLETE
PDIP
SOIC
SOIC
P
D
8
8
8
3
3
8
8
TBD
TBD
TBD
TBD
TBD
TBD
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D
OBSOLETE TO-220
KC
LP
P
OBSOLETE
OBSOLETE
ACTIVE
TO-92
PDIP
SOIC
D
75 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
TL750L08CDE4
TL750L08CDR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
75 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
TL750L08CDRE4
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
TL750L08CKC
TL750L08CLP
OBSOLETE TO-220
KC
LP
3
3
TBD
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CU SN
Call TI
ACTIVE
TO-92
1000
1000
Pb-Free
(RoHS)
N / A for Pkg Type
TL750L08CLPE3
ACTIVE
TO-92
LP
3
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL750L08CP
TL750L08QD
OBSOLETE
OBSOLETE
PDIP
SOIC
P
D
8
8
TBD
TBD
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Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Feb-2007
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TL750L08QDR
TL750L08QKC
TL750L08QLP
TL750L10CD
OBSOLETE
SOIC
D
KC
LP
D
8
3
3
8
TBD
TBD
TBD
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OBSOLETE TO-220
OBSOLETE
ACTIVE
TO-92
SOIC
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL750L10CDE4
TL750L10CDR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL750L10CDRE4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL750L10CKC
TL750L10CLP
OBSOLETE TO-220
KC
LP
3
3
TBD
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ACTIVE
ACTIVE
ACTIVE
ACTIVE
TO-92
TO-92
TO-92
TO-92
1000
1000
2000
2000
Pb-Free
(RoHS)
N / A for Pkg Type
TL750L10CLPE3
TL750L10CLPR
TL750L10CLPRE3
LP
LP
LP
3
3
3
Pb-Free
(RoHS)
CU SN
CU SN
CU SN
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
Pb-Free
(RoHS)
Pb-Free
(RoHS)
TL750L10CP
TL750L10QD
TL750L10QDR
TL750L10QKC
TL750L10QLP
TL750L10QP
TL750L12CD
OBSOLETE
OBSOLETE
OBSOLETE
PDIP
SOIC
SOIC
P
D
8
8
8
3
3
8
8
TBD
TBD
TBD
TBD
TBD
TBD
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D
OBSOLETE TO-220
KC
LP
P
OBSOLETE
OBSOLETE
ACTIVE
TO-92
PDIP
SOIC
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL750L12CDE4
TL750L12CDR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL750L12CDRE4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL750L12CKC
TL750L12CLP
OBSOLETE TO-220
KC
LP
3
3
TBD
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CU SN
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ACTIVE
TO-92
1000
1000
Pb-Free
(RoHS)
N / A for Pkg Type
TL750L12CLPE3
ACTIVE
TO-92
LP
3
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL750L12CP
TL750L12QD
TL750L12QDR
TL750L12QKC
TL750L12QLP
TL750L12QP
TL751L05CD
OBSOLETE
OBSOLETE
OBSOLETE
PDIP
SOIC
SOIC
P
D
8
8
8
3
3
8
8
TBD
TBD
TBD
TBD
TBD
TBD
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D
OBSOLETE TO-220
KC
LP
D
OBSOLETE
OBSOLETE
ACTIVE
TO-92
SOIC
SOIC
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL751L05CDE4
ACTIVE
SOIC
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
10-Feb-2007
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TL751L05CDR
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL751L05CDRE4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL751L05CP
TL751L05MFKB
TL751L05MJGB
TL751L05QD
TL751L05QDR
TL751L05QP
TL751L10CD
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
PDIP
LCCC
CDIP
SOIC
SOIC
PDIP
SOIC
P
FK
JG
D
8
20
8
TBD
TBD
TBD
TBD
TBD
TBD
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8
D
8
P
8
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL751L10CDE4
TL751L10CDR
TL751L10CDRE4
TL751L10CP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
P
P
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL751L10CPE4
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL751L10QD
TL751L10QP
TL751L12CD
OBSOLETE
OBSOLETE
ACTIVE
SOIC
PDIP
SOIC
D
P
D
8
8
8
TBD
TBD
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75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL751L12CDE4
TL751L12CDR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL751L12CDRE4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL751L12CP
TL751L12MFKB
TL751L12MJGB
TL751L12QD
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
PDIP
LCCC
CDIP
SOIC
SOIC
PDIP
P
FK
JG
D
8
20
8
TBD
TBD
TBD
TBD
TBD
TBD
Call TI
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8
TL751L12QDR
TL751L12QP
D
8
P
8
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
10-Feb-2007
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 4
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPFM001E – OCTOBER 1994 – REVISED JANUARY 2001
KTE (R-PSFM-G3)
PowerFLEX PLASTIC FLANGE-MOUNT
0.375 (9,52)
0.365 (9,27)
0.080 (2,03)
0.070 (1,78)
0.360 (9,14)
0.350 (8,89)
0.050 (1,27)
0.040 (1,02)
0.220 (5,59)
NOM
0.010 (0,25) NOM
Thermal Tab
(See Note C)
0.360 (9,14)
0.350 (8,89)
0.295 (7,49)
NOM
0.320 (8,13)
0.310 (7,87)
0.420 (10,67)
0.410 (10,41)
1
3
0.025 (0,63)
0.031 (0,79)
Seating Plane
0.004 (0,10)
0.010 (0,25)
M
0.100 (2,54)
0.200 (5,08)
0.005 (0,13)
0.001 (0,03)
0.041 (1,04)
0.031 (0,79)
0.010 (0,25)
NOM
Gage Plane
3°–6°
0.010 (0,25)
4073375/F 12/00
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. The center lead is in electrical contact with the thermal tab.
D. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
E. Falls within JEDEC MO-169
PowerFLEX is a trademark of Texas Instruments.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSOT002A – OCTOBER 1994 – REVISED NOVEMBER 2001
LP (O-PBCY-W3)
PLASTIC CYLINDRICAL PACKAGE
0.205 (5,21)
0.175 (4,44)
0.165 (4,19)
0.125 (3,17)
DIA
0.210 (5,34)
0.170 (4,32)
Seating
Plane
0.157 (4,00) MAX
0.050 (1,27)
C
0.500 (12,70) MIN
0.022 (0,56)
0.016 (0,41)
0.016 (0,41)
0.014 (0,35)
0.104 (2,65)
FORMED LEAD OPTION
STRAIGHT LEAD OPTION
D
0.135 (3,43) MIN
0.105 (2,67)
0.095 (2,41)
0.055 (1,40)
0.045 (1,14)
1
2
3
0.105 (2,67)
0.080 (2,03)
0.105 (2,67)
0.080 (2,03)
4040001-2/C 10/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Lead dimensions are not controlled within this area
D. FAlls within JEDEC TO -226 Variation AA (TO-226 replaces TO-92)
E. Shipping Method:
Straight lead option available in bulk pack only.
Formed lead option available in tape & reel or ammo pack.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSOT002A – OCTOBER 1994 – REVISED NOVEMBER 2001
LP (O-PBCY-W3)
PLASTIC CYLINDRICAL PACKAGE
0.539 (13,70)
0.460 (11,70)
1.260 (32,00)
0.905 (23,00)
0.650 (16,50)
0.610 (15,50)
0.020 (0,50) MIN
0.098 (2,50)
0.384 (9,75)
0.335 (8,50)
0.748 (19,00)
0.217 (5,50)
0.748 (19,00)
0.689 (17,50)
0.433 (11,00)
0.335 (8,50)
0.114 (2,90)
0.094 (2,40)
0.114 (2,90)
0.094 (2,40)
0.169 (4,30)
0.146 (3,70)
DIA
0.266 (6,75)
0.234 (5,95)
0.512 (13,00)
0.488 (12,40)
TAPE & REEL
4040001-3/C 10/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Tape and Reel information for the Format Lead Option package.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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