8409801CAS2035 [TI]
HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDIP14, CERAMIC, DIP-14;
| 型号： | 8409801CAS2035 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDIP14, CERAMIC, DIP-14 CD 输入元件 逻辑集成电路 |
| 文件： | 总8页 (文件大小：130K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54HC04, SN74HC04
HEX INVERTERS
SCLS078B – DECEMBER 1982 – REVISED MAY 1997
SN54HC04 . . . J OR W PACKAGE
SN74HC04 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Ceramic Flat (W) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
1A
1Y
V
CC
1
2
3
4
5
6
7
14
13
12
11
6A
6Y
5A
2A
2Y
description
3A
10 5Y
These devices contain six independent inverters.
They perform the Boolean function Y = A in
positive logic.
9
8
3Y
4A
4Y
GND
The SN54HC04 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC04 is characterized for
operation from –40°C to 85°C.
SN54HC04 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
FUNCTION TABLE
(each inverter)
6Y
NC
5A
2A
NC
2Y
4
5
6
7
8
17
16
INPUT
A
OUTPUT
Y
15 NC
14
9 10 11 12 13
NC
3A
H
L
L
5Y
H
†
logic symbol
NC – No internal connection
2
1
1A
3
1
1Y
4
6
8
2A
5
2Y
3Y
4Y
3A
9
4A
11
10
12
5A
13
5Y
6Y
6A
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
logic diagram (positive logic)
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC04, SN74HC04
HEX INVERTERS
SCLS078B – DECEMBER 1982 – REVISED MAY 1997
†
absolute maximum ratings over operating free-air temperature range
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions
SN54HC04
SN74HC04
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
Supply voltage
2
1.5
3.15
4.2
0
5
6
2
1.5
3.15
4.2
0
5
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
High-level input voltage
= 4.5 V
= 6 V
V
V
IH
= 2 V
0.5
1.35
1.8
0.5
1.35
1.8
V
IL
Low-level input voltage
= 4.5 V
= 6 V
0
0
0
0
V
V
Input voltage
0
V
V
0
V
V
V
V
I
CC
CC
Output voltage
0
0
O
CC
CC
V
CC
V
CC
V
CC
= 2 V
0
1000
500
400
125
0
1000
500
400
85
t
Input transition (rise and fall) time
Operating free-air temperature
= 4.5 V
= 6 V
0
0
ns
t
0
0
T
–55
–40
°C
A
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC04, SN74HC04
HEX INVERTERS
SCLS078B – DECEMBER 1982 – REVISED MAY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HC04
SN74HC04
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
TYP
MAX
MIN
1.9
4.4
5.9
3.7
5.2
MAX
MIN
1.9
MAX
2 V
4.5 V
6 V
1.9 1.998
4.4 4.499
5.9 5.999
I
= –20 µA
4.4
OH
V
V = V or V
IH
5.9
V
OH
OL
I
IL
IL
I
I
= –4 mA
4.5 V
6 V
3.98
5.48
4.3
5.8
3.84
5.34
OH
= –5.2 mA
OH
2 V
0.002
0.001
0.001
0.17
0.1
0.1
0.1
0.1
0.1
0.1
I
= 20 µA
4.5 V
6 V
OL
V
V = V or V
0.1
0.1
0.1
V
I
IH
I
I
= 4 mA
4.5 V
6 V
0.26
0.26
±100
2
0.4
0.33
0.33
±1000
20
OL
= 5.2 mA
0.15
0.4
OL
I
I
V = V
I
or 0
6 V
±0.1
±1000
40
nA
µA
pF
I
CC
CC
V = V
I
or 0,
I
O
= 0
6 V
CC
C
2 V to 6 V
3
10
10
10
i
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T = 25°C
A
SN54HC04
MIN MAX
SN74HC04
MIN MAX
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
TYP
45
9
MAX
95
2 V
4.5 V
6 V
145
29
120
24
20
95
19
16
t
A
Y
Y
19
ns
pd
t
8
16
25
2 V
38
8
75
110
22
t
4.5 V
6 V
15
ns
6
13
19
operating characteristics, T = 25°C
A
PARAMETER
Power dissipation capacitance per inverter
TEST CONDITIONS
TYP
UNIT
C
No load
20
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC04, SN74HC04
HEX INVERTERS
SCLS078B – DECEMBER 1982 – REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
V
CC
From Output
Under Test
Test
Point
Input
50%
50%
0 V
C
= 50 pF
L
t
t
PLH
PHL
90%
(see Note A)
V
V
OH
In-Phase
Output
90%
t
50%
10%
50%
10%
LOAD CIRCUIT
OL
t
r
f
f
t
t
PLH
PHL
90%
V
CC
V
V
90%
t
90%
OH
Input
50%
10%
50%
10%
90%
t
Out-of-Phase
Output
50%
10%
50%
10%
0 V
OL
t
r
f
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
C includes probe and test-fixture capacitance.
L
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
D. and t are the same as t
t
.
pd
PLH
PHL
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
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BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
Product Folder:SN54HC04, Hex Inverters
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>> Semiconductor Home > Products > Digital Logic > Gates and Inverters > Inverters >
SN54HC04, Hex Inverters
Device Status: Active
> Description
> Features
> Datasheets
Parameter Name SN54HC04
Voltage Nodes (V) 6, 5, 2
Vcc range (V)
Input Level
2.0 to 6.0
CMOS
CMOS
6
> Pricing/Samples/Availability
> Application Notes
> Related Documents
> Training
Output Level
No. of Gates
Description
These devices contain six independent inverters. They perform the Boolean function Y = A\ in positive
logic.
The SN54HC04 is characterized for operation over the full military temperature range of -55°C to 125°C.
The SN74HC04 is characterized for operation from -40°C to 85°C.
Features
● Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink
Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard
Plastic (N) and Ceramic (J) 300-mil DIPs
To view the following documents, Acrobat Reader 3.x is required.
To download a document to your hard drive, right-click on the link and choose 'Save'.
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Product Folder:SN54HC04, Hex Inverters
Datasheets
Full datasheet in Acrobat PDF: scls078b.pdf (76 KB)
Full datasheet in Zipped PostScript: scls078b.psz (76 KB)
Pricing/Samples/Availability
Price/unit
USD
(100-999)
Temp
(ºC)
Pack
Qty
Availability /
Samples
Orderable Device Package Pins
Status
DSCC Number
Check stock or
order
-55 TO
125
FK
W
FK
J
84098012A
20
14
20
14
14
14
20
14
14
ACTIVE 7.83
ACTIVE 9.69
ACTIVE 8.94
ACTIVE 4.59
ACTIVE 13.11
ACTIVE 1.02
ACTIVE 7.83
ACTIVE 1.20
ACTIVE 9.69
1
Check stock or
order
-55 TO
125
8409801DA
1
1
1
1
1
1
1
1
Check stock or
order
-55 TO
125
JM38510/65701B2A
JM38510/65701BCA
JM38510/65701BDA
SN54HC04J
Check stock or
order
-55 TO
125
Check stock or
order
-55 TO
125
W
J
Check stock or
order
-55 TO
125
Check stock or
order
-55 TO
125
FK
J
SNJ54HC04FK
SNJ54HC04J
84098012A
Check stock or
order
-55 TO
125
8409801CAS2035
8409801DA
Check stock or
order
-55 TO
125
W
SNJ54HC04W
Application Reports
View Application Reports for Digital Logic
● CMOS Power Consumption And CPD Calculation (SCAA035B - Updated: 06/01/1997)
● Designing With Logic (SDYA009C - Updated: 06/01/1997)
● HCMOS Design Considerations (SCLA007 - Updated: 04/01/1996)
● Implications Of Slow Or Floating CMOS Inputs (SCBA004C - Updated: 02/01/1998)
● Input And Output Characteristics Of Digital Integrated Circuits (SDYA010 - Updated: 10/01/1996)
● Live Insertion (SDYA012 - Updated: 10/01/1996)
● SN54/74HCT CMOS Logic Family Applications And Restrictions (SCLA011 - Updated: 05/01/1996)
● Using High Speed CMOS And Advanced CMOS In Systems With Multiple Vcc (SCLA008 - Updated: 04/01/1996)
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Product Folder:SN54HC04, Hex Inverters
Related Documents
● Documentation Rules (SAP) And Ordering Information (SZZU001B, 4 KB - Updated: 05/06/1999)
● Logic Selection Guide Second Half 2000 (SDYU001N, 5035 KB - Updated: 04/17/2000)
● MicroStar Junior BGA Design Summary (SCET004, 284 KB - Updated: 07/28/2000)
● More Power In Less Space - Technical Article (SCAU001A, 850 KB - Updated: 03/01/1996)
Table Data Updated on: 9/7/2000
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