AM26C32IN-00 概述
LINE RECEIVER, PDIP16 线路驱动器或接收器
AM26C32IN-00 规格参数
生命周期: | Obsolete | 包装说明: | DIP, |
Reach Compliance Code: | unknown | ECCN代码: | EAR99 |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.59 |
输入特性: | DIFFERENTIAL SCHMITT TRIGGER | 接口集成电路类型: | LINE RECEIVER |
接口标准: | V.11; EIA-422-A; EIA-423-A | JESD-30 代码: | R-PDIP-T16 |
长度: | 19.305 mm | 功能数量: | 1 |
端子数量: | 16 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 输出特性: | 3-STATE |
输出极性: | TRUE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | DIP | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 认证状态: | Not Qualified |
最大接收延迟: | 30 ns | 接收器位数: | 4 |
座面最大高度: | 5.08 mm | 最大供电电压: | 5.5 V |
最小供电电压: | 4.5 V | 标称供电电压: | 5 V |
表面贴装: | NO | 技术: | BICMOS |
温度等级: | INDUSTRIAL | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
宽度: | 7.62 mm | Base Number Matches: | 1 |
AM26C32IN-00 数据手册
通过下载AM26C32IN-00数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载ꢀ ꢁꢂ ꢃꢄ ꢅꢂ
ꢆ ꢇꢀꢈꢉ ꢇꢊꢋ ꢌ ꢈꢍ ꢎꢎ ꢌꢉ ꢌꢏꢐ ꢍꢀ ꢋ ꢋ ꢍꢏꢌ ꢉ ꢌꢄ ꢌꢍ ꢑ ꢌ ꢉ
SLLS104I − DECEMBER 1990 − REVISED SEPTEMBER 2004
AM26C32C . . . D, N, OR NS PACKAGE
D
Meets or Exceeds the Requirements of
ANSI TIA/EIA-422-B, TIA/EIA-423-B, and ITU
Recommendation V.10 and V.11
AM26C32I . . . D, N, NS, OR PW PACKAGE
AM26C32Q . . . D PACKAGE
AM26C32M . . . J OR W PACKAGE
(TOP VIEW)
D
D
Low Power, I
= 10 mA Typ
CC
7-V Common-Mode Range With 200-mV
Sensitivity
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
V
CC
4B
4A
4Y
G
3Y
3A
3B
D
D
D
D
D
D
D
Input Hysteresis . . . 60 mV Typ
t
= 17 ns Typ
pd
Operates From a Single 5-V Supply
3-State Outputs
Input Fail-Safe Circuitry
Improved Replacements for AM26LS32
Available in Q-Temp Automotive
AM26C32M . . . FK PACKAGE
(TOP VIEW)
− High Reliability Automotive Applications
− Configuration Control/Print Support
− Qualification to Automotive Standards
3
2
1
20 19
18
description/ordering information
4A
4Y
NC
G
1Y
G
4
5
6
7
8
17
16
15
14
The AM26C32 is a quadruple differential line
receiver for balanced or unbalanced digital data
transmission. The enable function is common to
all four receivers and offers a choice of active-high
or active-low input. The 3-state outputs permit
connection directly to a bus-organized system.
Fail-safe design specifies that if the inputs are
open, the outputs always are high.
NC
2Y
2A
3Y
9 10 11 12 13
NC − No internal connection
The AM26C32 devices are manufactured using a BiCMOS process, which is a combination of bipolar and
CMOS transistors. This process provides the high voltage and current of bipolar with the low power of CMOS
to reduce the power consumption to about one-fifth that of the standard AM26LS32, while maintaining ac and
dc performance.
The AM26C32C is characterized for operation from 0°C to 70°C. The AM26C32I is characterized for operation
from −40°C to 85°C. The AM26C32Q is characterized for operation from −40°C to 125°C. The AM26C32M is
characterized for operation over the full military temperature range of −55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂꢃ ꢄꢅ ꢂ
ꢆꢇ ꢀ ꢈꢉ ꢇ ꢊꢋ ꢌ ꢈ ꢍ ꢎꢎ ꢌꢉ ꢌꢏ ꢐꢍ ꢀ ꢋ ꢋꢍ ꢏ ꢌ ꢉꢌ ꢄ ꢌꢍꢑ ꢌꢉ
SLLS104I − DECEMBER 1990 − REVISED SEPTEMBER 2004
description/ordering information (continued)
ORDERING INFORMATION
ORDERABLE
TOP-SIDE
MARKING
†
PACKAGE
T
A
PART NUMBER
AM26C32CN
AM26C32CD
AM26C32CDR
AM26C32CNSR
AM26C32IN
PDIP (N)
SOIC (D)
Tube of 25
Tube of 40
Reel of 2500
Reel of 2000
Tube of 25
Tube of 40
Reel of 2500
Reel of 2000
Tube of 90
Tube of 40
Tube of 25
Tube of 150
Tube of 55
AM26C32CN
0°C to 70°C
AM26C32C
SOP (NS)
PDIP (N)
26C32
AM26C32IN
AM26C32ID
SOIC (D)
AM26C32I
AM26C32IDR
AM26C32INSR
AM26C32IPW
AM26C32QD
AM26C32MJ
−40°C to 85°C
SOP (NS)
TSSOP (PW)
SOIC (D)
26C32I
26C32I
−40°C to 125°C
−55°C to 125°C
AM26C32QD
AM26C32MJ
AM26C32MW
AM26C32MFK
CDIP (J)
CFP (W)
AM26C32MW
AM26C32MFK
LCCC (FK)
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each receiver)
ENABLES
DIFFERENTIAL
INPUT
OUTPUT
Y
G
H
X
H
X
H
X
L
G
X
L
H
H
?
?
L
L
Z
V
ID
≥ V
IT+
X
L
V
IT−
< V < V
ID IT+
X
L
V
ID
≤ V
IT−
X
H
H = high level, L = low level, X = irrelevant
Z = high impedance (off), ? = indeterminate
2
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SLLS104I − DECEMBER 1990 − REVISED SEPTEMBER 2004
logic diagram (positive logic)
4
G
G
12
2
1
1A
1B
3
1Y
6
7
2A
2B
5
2Y
10
9
3A
3B
11
3Y
14
15
4A
4B
13
4Y
Pin numbers shown are for the D, J, N, NS, PW, and W packages.
schematics
EQUIVALENT OF A OR B INPUT
EQUIVALENT OF G OR G INPUT
TYPICAL OF ALL OUTPUTS
V
CC
V
CC
V
CC
1.7 kΩ
NOM
17 kΩ
NOM
Input
288 kΩ
NOM
Input
GND
Output
1.7 kΩ
NOM
V
CC
(A inputs)
or
GND (B inputs)
GND
GND
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLLS104I − DECEMBER 1990 − REVISED SEPTEMBER 2004
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage range, V : A or B inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −11 V to 14 V
I
G or G inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
CC
Differential input voltage range, V
Output voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −14 V to 14 V
ID
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
O
Package thermal impedance, θ (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential output voltage, V , are with respect to network GND. Currents into the device are positive
OD
and currents out of the device are negative.
2. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
JA
J
A
ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.
D
J
A
JA
J
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN NOM
MAX
UNIT
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
CC
High-level input voltage
Low-level input voltage
Common-mode input voltage
High-level output current
Low-level output current
V
IH
0.8
7
V
IL
V
IC
I
I
−6
6
mA
mA
OH
OL
AM26C32C
AM26C32I
AM26C32Q
AM26C32M
0
−40
−40
−55
70
85
125
125
T
A
Operating free-air temperature
°C
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLLS104I − DECEMBER 1990 − REVISED SEPTEMBER 2004
electrical characteristics over recommended ranges of V , V , and operating free-air
CC
IC
temperature (unless otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
0.2
UNIT
V
IC
V
IC
V
IC
V
IC
= −7 V to 7 V
= 0 to 5.5 V
= −7 V to 7 V
= 0 to 5.5 V
V
I
= V
(min),
= −440 µA
O
OH
V
IT+
Differential input high-threshold voltage
Differential input low-threshold voltage
V
0.1
OH
‡
−0.2
V
I
= 0.45 V,
= 8 mA
O
V
V
V
IT−
‡
−0.1
OL
Hysteresis voltage (V
IT+
− V
)
60
mV
V
hys
IT−
V
V
V
Enable input clamp voltage
High-level output voltage
Low-level output voltage
V
V
V
V
= 4.5 V,
I = −18 mA
−1.5
IK
CC
I
= 200 mV,
I
= −6 mA
= 6 mA
3.8
V
OH
OL
ID
ID
O
OH
OL
= −200 mV,
I
0.2
0.5
0.3
5
V
I
Off-state (high-impedance state) output current
= V
CC
or GND
µA
OZ
V = 10 V,
Other input at 0 V
Other input at 0 V
1.5
I
I
Line input current
mA
I
V = −10 V,
I
−2.5
20
I
I
High-level enable current
Low-level enable current
Input resistance
V = 2.7 V
I
µA
µA
kΩ
mA
IH
V = 0.4 V
I
−100
IL
r
One input to ground
= 5.5 V
12
17
10
i
I
Supply current
V
CC
15
CC
†
‡
All typical values are at V
CC
= 5 V, V = 0, and T = 25°C.
IC
A
The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode
input voltage.
switching characteristics over recommended ranges of operation conditions, C = 50 pF (unless
L
otherwise noted)
AM26C32C
AM26C32I
AM26C32Q
AM26C32M
TEST
CONDITIONS
PARAMETER
UNIT
†
†
MIN TYP
MAX
27
27
9
MIN TYP
MAX
27
27
10
9
t
t
t
t
t
t
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
Output transition time, low- to high-level output
Output transition time, high- to low-level output
Output enable time to high level
9
9
17
17
4
9
9
17
17
4
ns
ns
ns
ns
ns
ns
PLH
PHL
TLH
THL
PZH
PZL
See Figure 1
See Figure 1
See Figure 2
4
9
4
13
13
22
22
13
13
22
22
Output enable time to low level
t
Output disable time from high level
Output disable time from low level
13
13
22
22
13
13
26
25
ns
ns
PHZ
PLZ
See Figure 2
t
†
All typical values are at V
CC
= 5 V, T = 25°C.
A
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂꢃ ꢄꢅ ꢂ
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SLLS104I − DECEMBER 1990 − REVISED SEPTEMBER 2004
PARAMETER MEASUREMENT INFORMATION
t
t
THL
V
CC
TLH
V
OH
50%
90%
90%
Output
10%
10%
A
B
V
OL
Device
Under
Test
t
t
PHL
PLH
C
= 50 pF
L
2.5 V
Input
(see Note A)
0 V
−2.5 V
Input
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTE A: C includes probe and jig capacitance.
L
Figure 1. Switching Test Circuit and Voltage Waveforms
V
CC
S1
R
= 1 kΩ
G Input
G Input
A Input
L
Device
Under
Test
t
t
, t
Measurement: S1 to V
CC
Measurement: S1 to GND
PZL PLZ
V
ID
= 2.5 V
, t
PZH PHZ
B Input
C
= 50 pF
L
(see Note A)
TEST CIRCUIT
3 V
0 V
G
1.3 V
3 V
0 V
G
1.3 V
(see Note B)
t
t
t
t
PHZ
PZH
PHZ
PZH
V
V
OH
Output
(with V = 2.5 V)
ID
V
OH
−0.5 V
V
OH
−0.5 V
50%
OL
t
t
t
t
PLZ
PZL
PLZ
PZL
V
V
OH
Output
(with V = −2.5 V)
ID
50%
V
OL
+ 0.5 V
V
OL
+ 0.5 V
OL
VOLTAGE WAVEFORMS
NOTES: A.
C includes probe and jig capacitance.
L
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%, t = t = 6 ns.
r
f
Figure 2. Enable/Disable Time Test Circuit and Output Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9164001Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9164001Q2A
AM26C32
MFKB
5962-9164001QEA
5962-9164001QFA
ACTIVE
ACTIVE
CDIP
CFP
J
16
16
1
1
TBD
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9164001QE
A
AM26C32MJB
W
5962-9164001QF
A
AM26C32MWB
AM26C32-W
AM26C32CD
ACTIVE WAFERSALE
YS
D
0
3624
40
Call TI
Call TI
ACTIVE
SOIC
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AM26C32C
AM26C32CDBLE
AM26C32CDE4
OBSOLETE
ACTIVE
SSOP
SOIC
DB
D
16
16
TBD
Call TI
Call TI
0 to 70
0 to 70
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26C32C
AM26C32C
AM26C32C
AM26C32C
AM26C32C
AM26C32CN
AM26C32CN
26C32
AM26C32CDG4
AM26C32CDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
D
D
16
16
16
16
16
16
16
16
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
2500
2500
2500
25
Green (RoHS
& no Sb/Br)
AM26C32CDRE4
AM26C32CDRG4
AM26C32CN
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
N
Pb-Free
(RoHS)
AM26C32CNE4
AM26C32CNSR
AM26C32CNSRE4
AM26C32CNSRG4
N
25
Pb-Free
(RoHS)
N / A for Pkg Type
NS
NS
NS
2000
2000
2000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
SO
Green (RoHS
& no Sb/Br)
26C32
SO
Green (RoHS
& no Sb/Br)
26C32
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
AM26C32ID
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AM26C32I
AM26C32IDBLE
AM26C32IDE4
OBSOLETE
ACTIVE
SSOP
SOIC
DB
D
16
16
TBD
Call TI
Call TI
-40 to 85
-40 to 85
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26C32I
AM26C32I
AM26C32I
AM26C32I
AM26C32I
AM26C32IN
AM26C32IN
26C32I
AM26C32IDG4
AM26C32IDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
PDIP
D
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-55 to 125
2500
2500
2500
25
Green (RoHS
& no Sb/Br)
AM26C32IDRE4
AM26C32IDRG4
AM26C32IN
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
N
Pb-Free
(RoHS)
AM26C32INE4
AM26C32INSR
AM26C32INSRE4
AM26C32INSRG4
AM26C32IPW
PDIP
N
25
Pb-Free
(RoHS)
N / A for Pkg Type
SO
NS
NS
NS
PW
PW
PW
PW
PW
FK
2000
2000
2000
90
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
SO
Green (RoHS
& no Sb/Br)
26C32I
SO
Green (RoHS
& no Sb/Br)
26C32I
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
LCCC
Green (RoHS
& no Sb/Br)
26C32I
AM26C32IPWE4
AM26C32IPWG4
AM26C32IPWR
AM26C32IPWRG4
AM26C32MFKB
90
Green (RoHS
& no Sb/Br)
26C32I
90
Green (RoHS
& no Sb/Br)
26C32I
2000
2000
1
Green (RoHS
& no Sb/Br)
26C32I
Green (RoHS
& no Sb/Br)
26C32I
TBD
5962-
9164001Q2A
AM26C32
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-55 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
MFKB
AM26C32MJB
AM26C32MWB
ACTIVE
CDIP
CFP
J
16
16
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
5962-9164001QE
A
AM26C32MJB
ACTIVE
W
1
-55 to 125
5962-9164001QF
A
AM26C32MWB
AM26C32QD
ACTIVE
ACTIVE
SOIC
SOIC
D
D
16
16
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
AM26C32Q
AM26C32QDG4
Green (RoHS
& no Sb/Br)
26C32Q
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF AM26C32, AM26C32M :
Catalog: AM26C32
•
Enhanced Product: AM26C32-EP, AM26C32-EP
•
Military: AM26C32M
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
AM26C32CDR
AM26C32IDR
AM26C32IPWR
SOIC
SOIC
D
D
16
16
16
2500
2500
2000
330.0
330.0
330.0
16.4
16.4
12.4
6.5
6.5
6.9
10.3
10.3
5.6
2.1
2.1
1.6
8.0
8.0
8.0
16.0
16.0
12.0
Q1
Q1
Q1
TSSOP
PW
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
AM26C32CDR
AM26C32IDR
AM26C32IPWR
SOIC
SOIC
D
D
16
16
16
2500
2500
2000
333.2
333.2
367.0
345.9
345.9
367.0
28.6
28.6
35.0
TSSOP
PW
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
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supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
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Copyright © 2013, Texas Instruments Incorporated
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