AM26LS32AC_16 [TI]
QUADRUPLE DIFFERENTIAL LINE RECEIVERS;
| 型号： | AM26LS32AC_16 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE DIFFERENTIAL LINE RECEIVERS |
| 文件： | 总24页 (文件大小：1006K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
1
FEATURES
AM26LS32AC . . . D, N, NS, OR PW PACKAGE
AM26LS32AI, AM26LS33AC . . . D, OR N PACKAGE
AM26LS32AM, AM26LS33AM . . .J PACKAGE
(TOP VIEW)
2
•
AM26LS32A Devices Meet or Exceed the
Requirements of ANSI TIA/EIA-422-B,
TIA/EIA-423-B, and ITU Recommendations V.10
and V.11
•
•
AM26LS32A Devices Have ±7-V
Common-Mode Range With ±200-mV
Sensitivity
AM26LS33A Devices Have ±15-V
Common-Mode Range With ±500-mV
Sensitivity
•
•
•
•
•
•
•
Input Hysteresis . . . 50 mV Typical
Operate From a Single 5-V Supply
Low-Power Schottky Circuitry
3-State Outputs
Complementary Output-Enable Inputs
Input Impedance . . . 12 kΩ Minimum
Designed to Be Interchangeable With
Advanced Micro Devices AM26LS32™ and
AM26LS33™
DESCRIPTION
The AM26LS32A and AM26LS33A devices are quadruple differential line receivers for balanced and unbalanced
digital data transmission. The enable function is common to all four receivers and offers a choice of active-high
or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design
ensures that, if the inputs are open, the outputs always are high.
Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional
stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of
the bus line. The additional stage has increased propagation delay; however, this does not affect
interchangeability in most applications.
The AM26LS32AC and AM26LS33AC are characterized for operation from 0°C to 70°C. The AM26LS32AI is
characterized for operation from –40°C to 85°C. The AM26LS32AM and AM26LS33AM are characterized for
operation over the full military temperature range of –55°C to 125°C.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
AM26LS32, AM26LS33 are trademarks of Advanced Micro Devices, Inc..
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1980–2007, Texas Instruments Incorporated
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
FUNCTION TABLE
Each Receiver
ENABLES
DIFFERENTIAL
A–B
OUTPUT
Y
G
H
X
H
X
H
X
L
G
X
L
H
H
?
VID ≥ VIT+
X
L
VIT– ≤ VID ≤ VIT+
?
X
L
L
VID ≤ VIT–
L
X
H
X
L
Z
H
H
H
X
Open
LOGIC DIAGRAM (POSITIVE LOGIC)
4
G
12
G
2
1A
1B
3
1Y
2Y
1
6
7
2A
2B
5
11
13
10
9
3A
3B
3Y
4Y
14
15
4A
4B
Pin numbers are for D, N, NS, or PW packages only.
2
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
SCHEMATICS OF INPUTS AND OUTPUTS
85 Ω
8.3 kΩ
100 kΩ
960 Ω
20 kΩ
960 Ω
100 kΩ
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC
VI
Supply voltage(2)
Input voltage
7
±25
7
V
V
V
Any differential input
Other inputs
VID
Differential input voltage(3)
±25
Continuous total power dissipation
See Dissipation Ratings Table
D package
N package
NS package
PW package
FK package
73
67
θJA
Package thermal impedance(4)
°C/W
64
108
260
TC
Case temperature for 60 seconds
°C
°C
Lead temperature 1.6 mm (1/16 inch) from case for 10
seconds
D or N package
J package
260
300
Lead temperature 1.6 mm (1/16 inch) from case for 60
seconds
°C
°C
Tstg
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to the network ground terminal.
(3) Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 1980–2007, Texas Instruments Incorporated
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3
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
DISSIPATION RATINGS
DERATION
FACTOR
ABOVE TA = 25°C
T
A ≤ 25°C
TA = 70°C
POWER RATING
TA = 125°C
POWER RATING
PACKAGE
POWER RATING
FK
J
1375 mW
1375 mW
11.0 mW/°C
11.0 mW/°C
880 mW
880 mW
275 mW
275 mW
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
AM26LS32AC, AM26LS32AI,
AM26LS33AC
4.75
5
5
5.25
5.5
VCC
Supply voltage
V
AM26LS32AM, AM26LS33AM
4.5
2
VIH
VIL
High-level input voltage
Low-level input voltage
V
V
0.8
±7
AM26LS32A
AM26LS33A
VIC
Common-mode input voltage
V
±15
–440
8
IOH
IOL
High-level output current
Low-level output current
μA
mA
AM26LS32AC, AM26LS33AC
AM26LS32AI
0
–40
–55
70
TA
Operating free-air temperature
85
°C
AM26LS32AM, AM26LS33AM
125
ELECTRICAL CHARACTERISTICS
over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX UNIT
AM26LS32A
0.2
V
Positive-going
input threshold voltage
VIT+
VO = VOHmin, IOH = –440 μA
AM26LS33A
AM26LS32A
AM26LS33A
0.5
–0.2(2)
–0.5(2)
Negative-going
input threshold voltage
VIT–
VO = 0.45 V , IOL = 8 mA
V
Hysteresis voltage
Vhys
VIK
50
mV
(VIT+ – VIT–
)
Enable-input clamp voltage VCC = MIN,
II = –18 mA
–1.5
V
AM26LS32AC,
AM26LS33AC
2.7
2.5
VCC = MIN, VID = 1 V,
VI(G) = 0.8 V, IOH = –440 μA
VOH
High-level output voltage
Low-level output voltage
V
AM26LS32AM,
AM26LS32AI,
AM26LS33AM
IOL= 4 mA
IOL= 8 mA
VO = 2.4 V
0.4
0.45
20
VCC = MIN, VID = –1 V,
VI(G) = 0.8 V
VOL
V
Off-state
IOZ
(high-impedance state)
output current
VCC = MAX
μA
VO = 0.4 V
–20
1.2
Other input at –10 V to
15 V
VI = 15 V,
II
Line input current
mA
Other input at –15 V to
10 V
VI = –15 V,
–1.7
II(EN)
IH
Enable input current
VI = 5.5 V
VI = 2.7 V
100
20
μA
μA
High-level enable current
(1) All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
(2) The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for
threshold levels only.
4
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
ELECTRICAL CHARACTERISTICS (continued)
over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX UNIT
IL
ri
Low-level enable current
Input resistance
VI = 0.4 V
–0.36
mA
VIC = –15 V to 15 V,
One input to ac ground
12
15
kΩ
Short-circuit output
current(3)
IOS
ICC
VCC = MAX
VCC = MAX,
–15
–85
70
mA
mA
Supply current
All outputs disabled
52
(3) Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
SWITCHING CHARACTERISTICS
VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX
UNIT
Propagation delay time, low-to-high-level
output
tPLH
tPHL
20
35
CL = 15 pF,
See Figure 1
ns
Propagation delay time, high-to-low-level
output
22
35
tPZH
tPZL
tPHZ
tPLZ
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
17
20
21
30
22
25
30
40
CL = 15 pF,
CL = 15 pF,
See Figure 1
See Figure 1
ns
ns
(1) All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
Copyright © 1980–2007, Texas Instruments Incorporated
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5
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
PARAMETER MEASUREMENT INFORMATION
V
CC
Test
R
= 2 kΩ
L
Point
2.5 V
S1
Input
00
From Output
Under Test
C
–2.5 V
5 kΩ
t
t
PHL
PLH
L
See Note B
S2
(see Note A)
V
OH
Output
1.3 V
1.3 V
S1 and S2 Closed
V
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS FOR t , t
PLH PHL
≤5 ns
≤5 ns
≤5 ns
≤5 ns
3 V
3 V
90%
90%
90%
1.3 V1.3 V
90%
Enable G
Enable G
10%
1.3 V1.3 V
10%
90%
10%
90%
10%
90%
0
0
See Note C
See Note C
3 V
3 V
90%
1.3 V
1.3 V
1.3 V
10%
1.3 V
Enable G
Enable G
10%
10%
10%
t
0
0
S1 Closed
S2 Closed
t
t
PZH
PZL
0.5 V
V
OH
≈1.4 V
S1 Open
Output
PLZ
1.3 V
1.3 V
Output
S1 Closed
S2 Open
S2 Closed
≈1.4 V
S1 Closed
S2 Closed
V
OL
0.5 V
t
PHZ
VOLTAGE WAVEFORMS FOR t , t
PHZ PZH
VOLTAGE WAVEFORMS FOR t , t
PLZ PZL
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G high; G is tested with G low.
Figure 1. Test Circuit and Voltage Waveforms
6
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
I
= –440 μA
OH
High-Level Output Current, I
(mA)
Free-Air Temperature, T (°C)
OH
A
Figure 2.
Figure 3.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
Low-Level Output Current, I (mA)
OL
Free-Air Temperature, T (°C)
A
Figure 4.
Figure 5.
Copyright © 1980–2007, Texas Instruments Incorporated
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7
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Load = 8 kΩ to GND
Load = 8 kΩ to GND
Enable G Voltage (V)
Enable G Voltage (V)
Figure 6.
Figure 7.
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Load = 1 kΩ to V
CC
Load = 1 kΩ to V
CC
Enable G Voltage (V)
Enable G Voltage (V)
Figure 8.
Figure 9.
8
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (continued)
AM26LS32A
OUTPUT VOLTAGE
vs
AM26LS33A
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
DIFFERENTIAL INPUT VOLTAGE
Differential Input Voltage, V (mV)
ID
Differential Input Voltage, V (mV)
ID
Figure 10.
Figure 11.
INPUT CURRENT
vs
INPUT VOLTAGE
Input Voltage, V (V)
I
The unshaded area shows requirements of
paragraph 4.2.1 of ANSI Standards
EIA/TIA-422-B and EIA/TIA-423-B.
Figure 12.
Copyright © 1980–2007, Texas Instruments Incorporated
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9
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E–OCTOBER 1980–REVISED OCTOBER 2007
APPLICATION INFORMATION
Figure 13. Circuit with Multiple Receivers
10
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
5962-7802003M2A
5962-7802003MEA
5962-7802003MFA
5962-7802004M2A
5962-7802004MEA
5962-7802004MFA
AM26LS32ACD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
16
16
20
16
16
16
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
CFP
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
W
D
SOIC
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
AM26LS32ACDE4
AM26LS32ACDG4
AM26LS32ACDR
AM26LS32ACDRE4
AM26LS32ACDRG4
AM26LS32ACN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
D
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
AM26LS32ACNE4
AM26LS32ACNSR
AM26LS32ACNSRG4
AM26LS32ACPW
AM26LS32ACPWE4
AM26LS32ACPWG4
AM26LS32ACPWR
AM26LS32ACPWRE4
AM26LS32ACPWRG4
AM26LS32AID
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SO
NS
NS
PW
PW
PW
PW
PW
PW
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
SOIC
SOIC
SOIC
SOIC
SOIC
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
AM26LS32AIDE4
AM26LS32AIDG4
AM26LS32AIDR
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
AM26LS32AIDRE4
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2010
Orderable Device
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
AM26LS32AIDRG4
AM26LS32AIN
SOIC
D
16
16
16
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
PDIP
N
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
POST-PLATE N / A for Pkg Type
AM26LS32AINE4
25
Pb-Free
(RoHS)
AM26LS32AMFKB
AM26LS32AMJ
AM26LS32AMJB
AM26LS32AMWB
AM26LS33ACD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CDIP
CFP
FK
J
20
16
16
16
16
1
1
1
1
TBD
TBD
TBD
TBD
A42
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
J
W
D
SOIC
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
AM26LS33ACDE4
AM26LS33ACDG4
AM26LS33ACDR
AM26LS33ACDRE4
AM26LS33ACDRG4
AM26LS33ACN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
D
D
N
N
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
POST-PLATE N / A for Pkg Type
AM26LS33ACNE4
25
Pb-Free
(RoHS)
AM26LS33AMFKB
AM26LS33AMJ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CDIP
CFP
FK
J
20
16
16
16
1
1
1
1
TBD
TBD
TBD
TBD
A42
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
AM26LS33AMJB
AM26LS33AMWB
J
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2010
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF AM26LS32A, AM26LS32AM, AM26LS33A, AM26LS33AM :
Enhanced Product: AM26LS32AM-EP
•
NOTE: Qualified Version Definitions:
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
AM26LS32ACDR
AM26LS32ACDR
AM26LS32ACNSR
AM26LS32ACPWR
AM26LS32AIDR
AM26LS33ACDR
SOIC
SOIC
SO
D
D
16
16
16
16
16
16
2500
2500
2000
2000
2500
2500
330.0
330.0
330.0
330.0
330.0
330.0
16.4
16.4
16.4
12.4
16.4
16.4
6.5
6.5
8.2
6.9
6.5
6.5
10.3
10.3
10.5
5.6
2.1
2.1
2.5
1.6
2.1
2.1
8.0
8.0
12.0
8.0
8.0
8.0
16.0
16.0
16.0
12.0
16.0
16.0
Q1
Q1
Q1
Q1
Q1
Q1
NS
PW
D
TSSOP
SOIC
SOIC
10.3
10.3
D
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Jul-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
AM26LS32ACDR
AM26LS32ACDR
AM26LS32ACNSR
AM26LS32ACPWR
AM26LS32AIDR
AM26LS33ACDR
SOIC
SOIC
SO
D
D
16
16
16
16
16
16
2500
2500
2000
2000
2500
2500
333.2
346.0
346.0
346.0
333.2
333.2
345.9
346.0
346.0
346.0
345.9
345.9
28.6
33.0
33.0
29.0
28.6
28.6
NS
PW
D
TSSOP
SOIC
SOIC
D
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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