AM26LV32CNSR [TI]
LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER; 低电压高速四路差动线路接收器
| 型号： | AM26LV32CNSR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER |
| 文件： | 总18页 (文件大小：368K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
†
D OR NS PACKAGE
Switching Rates up to 32 MHz
(TOP VIEW)
Operates from a Single 3.3-V Supply
Ultra-Low Power Dissipation . . . 27 mW Typ
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
V
CC
Open-Circuit, Short-Circuit, and Terminated
Fail-Safe
4B
4A
4Y
G
3Y
3A
3B
–0.3-V to 5.5-V Common-Mode Range With
±200 mV Sensitivity
Accepts 5-V Logic Inputs With a 3.3-V V
Input Hysteresis . . . 50 mV Typ
CC
235 mW With Four Receivers at 32 MHz
†
TheNSpackageisonlyavailable
left-ended taped and reeled.
Pin-to-Pin Compatible With AM26C32,
AM26LS32, and MB570
description
The AM26LV32, BiCMOS, quadruple, differential line receiver with 3-state outputs is designed to be similar to
TIA/EIA-422-B and ITU Recommendation V.11 receivers with reduced common-mode voltage range due to
reduced supply voltage.
The device is optimized for balanced bus transmission at switching rates up to 32 MHz. The enable function
is common to all four receivers and offers a choice of active-high or active-low inputs. The 3-state outputs permit
connection directly to a bus-organized system. Each device features receiver high input impedance and input
hysteresis for increased noise immunity, and input sensitivity of ±200 mV over a common-mode input voltage
rangefrom–0.3Vto5.5V. Whentheinputsareopencircuited, theoutputsareinthehighlogicstate. Thisdevice
is designed using the Texas Instruments (TI ) proprietary LinIMPACT-C60 technology, facilitating ultra-low
power consumption without sacrificing speed.
This device offers optimum performance when used with the AM26LV31 quadruple line drivers.
The AM26LV32C is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each receiver)
ENABLES
DIFFERENTIAL
INPUT
OUTPUT
G
G
H
X
X
L
H
H
V
ID
≥ 0.2 V
H
X
X
L
?
?
–0.2 V < V < 0.2 V
ID
H
X
X
L
L
L
V
ID
≤ –0.2 V
Open, shorted, or
H
X
X
L
H
H
‡
terminated
X
L
H
Z
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
‡
See application information attached.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinIMPACT-C60 and TI are trademarks of Texas Instruments.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
†
logic symbol
logic diagram (positive logic)
4
G
12
4
≥ 1
G
G
G
EN
12
2
1A
3
5
1Y
2Y
3Y
4Y
1
2
1
1B
1A
1B
3
1Y
6
2A
6
2A
2B
3A
5
2Y
3Y
4Y
7
10
7
2B
11
13
9
14
3B
4A
10
3A
11
13
15
9
3B
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
14
4A
15
4B
schematics of equivalent inputs and outputs
EQUIVALENT OF EACH INPUT (A, B)
EQUIVALENT OF EACH
TYPICAL OF ALL OUTPUTS (Y)
ENABLE INPUT (G, G)
V
Y
V
V
CC
CC
CC
7.2 kΩ
100 Ω
1.5 kΩ
Enable
G, G
A, B
15 kΩ
1.5 kΩ
7.2 kΩ
GND
GND
GND
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
CC
Input voltage range, V (A or B inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –4 V to 8 V
I
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12 V
ID
Enable input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Output voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
O
Maximum output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
O
JA
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the GND terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions
MIN NOM
MAX
UNIT
Supply voltage, V
CC
3
2
3.3
3.6
V
V
V
V
High-level input voltage, V
IH(EN)
Low-level input voltage, V
0.8
5.5
±5.8
–5
IL(EN)
Common-mode input voltage, V
IC
–0.3
Differential input voltage, V
ID
OH
OL
High-level output current, I
mA
mA
°C
Low-level output current, I
5
Operating free-air temperature, T
AM26LV32C
0
70
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
electrical characteristics over recommended supply-voltage and operating free-air temperature
ranges (unless otherwise noted)
†
PARAMETER
Differential input high-threshold voltage
Differential input low-threshold voltage
Enable input clamp voltage
High-level output voltage
Low-level output voltage
High-impedance-state output current
High-level enable input current
Low-level enable input current
Input resistance
TEST CONDITIONS
MIN TYP
MAX
UNIT
V
V
V
V
V
V
0.2
IT+
IT–
IK
–0.2
V
I = –18 mA
–0.8
3.2
–1.5
V
I
V
V
V
V
V
= 200 mV,
I
I
= –5 mA
= 5 mA
2.4
V
OH
OL
ID
OH
= –200 mV,
0.17
0.5
±50
10
V
ID
OL
I
I
I
= 0 to V
CC
µA
OZ
O
= 0 or 3 V,
= 3.6 V,
V = 5.5 V
I
IH(E)
IL(E)
CC
CC
µA
V = 0 V
I
–10
r
7
12
kΩ
µA
mA
pF
I
I
I
Input current
V = 5.5 V or –0.3 V, All other inputs GND
±700
I
I
Supply current
V
= V or GND, No load, line inputs open
CC
8
17
CC
I(E)
One channel
‡
C
Power dissipation capacitance
150
pd
†
‡
All typical values are at V
= 3.3 V and T = 25°C.
CC
A
C
determines the no-load dynamic current: I = C × V
× f + I
.
CC
pd
S
pd
CC
switching characteristics, V
= 3.3 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
8
TYP
16
16
5
MAX
20
UNIT
ns
t
t
t
t
t
t
t
t
t
t
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
PLH
PHL
t
See Figure 1
8
20
ns
Transistion time (t or t )
See Figure 1
See Figure 2
See Figure 3
See Figure 2
See Figure 3
ns
r
f
Output-enable time to high level
Output-enable time to low level
Output-disable time from high level
Output-disable time from low level
Pulse skew
17
10
20
16
4
40
40
40
40
6
ns
PZH
PZL
PHZ
PLZ
sk(p)
sk(o)
ns
ns
ns
§
¶
ns
Pulse skew
4
6
ns
#
Pulse skew (device to device)
6
9
ns
sk(pp)
§
¶
#
t
t
t
is |t
– t | of each channel of the same device.
PLH PHL
sk(p)
sk(o)
sk(pp)
is the maximum difference in propagation delay times between any two channels of the same device switching in the same direction.
is the maximum difference in propagation delay times between any two channels of any two devices switching in the same direction.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
PARAMETER MEASUREMENT INFORMATION
A
B
Generator
(see Note B)
Y
A
B
2 V
1 V
V
O
Input
C
= 15 pF
L
50 Ω
50 Ω
(see Note A)
t
t
PHL
PLH
V
V
OH
90%
90%
V
CC
Output
50%
10%
50%
10%
OL
G
G
t
t
f
r
(see Note C)
NOTES: A.
C includes probe and jig capacitance.
L
B. The input pulse is supplied by a generator having the following characteristics: Z = 50 Ω, PRR = 10 MHz, t and t (10% to 90%)
O
r
f
≤ 2 ns, 50% duty cycle.
C. To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 1. t
and t
Test Circuit and Voltage Waveforms
PLH
PHL
A
B
Y
V
O
V
ID
= 1 V
C
= 15 pF
(see Note A)
L
R
= 2 kΩ
L
G
Generator
(see Note B)
G
50 Ω
V
CC
(see Note C)
V
CC
Input
50%
50%
0 V
t
t
PHZ
PZH
V
OH
V
OH
– 0.3 V
Output
V
off
≈ 0
NOTES: A.
C includes probe and jig capacitance.
L
B. The input pulse is supplied by a generator having the following characteristics: Z = 50 Ω, PRR = 10 MHz, t and t (10% to 90%)
O
r
f
≤ 2 ns, 50% duty cycle.
C. To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 2. t
and t
Test Circuit and Voltage Waveforms
PZH
PHZ
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
PARAMETER MEASUREMENT INFORMATION
V
CC
R
= 2 kΩ
L
A
B
Y
V
O
V
ID
= 1 V
C
= 15 pF
L
(see Note A)
G
Generator
(see Note B)
G
50 Ω
V
CC
(see Note C)
V
CC
Input
50%
50%
0 V
t
t
PLZ
PZL
V
off
≈ V
CC
Output
V
OL
+ 0.3 V
V
OL
NOTES: A.
C includes probe and jig capacitance.
L
B. The input pulse is supplied by a generator having the following characteristics: Z = 50 Ω, PRR = 10 MHz, t and t (10% to 90%)
O
r
f
≤ 2 ns, 50% duty cycle.
C. To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 3. t
and t
Test Circuit and Voltage Waveforms
PZL
PLZ
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
APPLICATION INFORMATION
fail-safe conditions
The AM26LV32 quadruple differential line receiver is designed to function properly when appropriately
connected to active drivers. Applications do not always have ideal situations where all bits are being used, the
receiver inputs are never left floating, and fault conditions don’t exist. In actuality, most applications have the
capabilityto either place the drivers in a high-impedance mode or power down the drivers altogether, and cables
may be purposely (or inadvertently) disconnected, both of which lead to floating receiver inputs. Furthermore,
even though measures are taken to avoid fault conditions like a short between the differential signals, this does
occur. The AM26LV32 has an internal fail-safe circuitry which prevents the device from putting an unknown
voltage signal at the receiver outputs. In the following three cases, a high-state is produced at the respective
output:
1. Open fail-safe – Unused input pins are left open. Do not tie unused pins to ground or any other
voltage. Internal circuitry places the output in the high state.
2. 100-ohm terminated fail-safe – Disconnected cables, drivers in high-impedance state, or
powered-down drivers will not cause the AM26LV32 to malfunction. The outputs will remain in
a high state under these conditions. When the drivers are either turned-off or placed into the
high-impedancestate, thereceiverinputmaystillbeabletopickupnoiseduetothecableacting
as an antenna. To avoid having a large differential voltage being generated, the use of
twisted-pair cable will induce the noise as a common-mode signal and will be rejected.
3. Shorted fail-safe – Fault conditions that short the differential input pairs together will not cause
incorrect data at the outputs. A differential voltage (V ) of 0 V will force a high state at the
ID
outputs. Shorted fail-safe, however, is not supported across the recommended common-mode
input voltage (V ) range. An unwanted state can be induced to all outputs when an input is
IC
shorted and is biased with a voltage between –0.3 V and 5.5 V. The shorted fail-safe circuitry
will function properly when an input is shorted, but with no external common-mode voltage
applied.
fail-safe precautions
The internal fail-safe circuitry was designed such that the input common-mode (V ) and differential
IC
(V )voltages must be observed. In order to ensure the outputs of unused or inactive receivers remain in a high
ID
state when the inputs are open-circuited, shorted, or terminated, extra precaution must be taken on the active
signal. In applications where the drivers are placed in a high-impedance mode or are powered-down, it is
recommended that for 1, 2, or 3 active receiver inputs, the low-level input voltage (V ) should be greater than
IL
0.4 V. As in all data transmission applications, it is necessary to provide a return ground path between the two
remote grounds (driver and receiver ground references) to avoid ground differences. Table 1 and Figures 4
through 7 are examples of active input voltages with their respective waveforms and the effect each have on
unused or inactive outputs. Note that the active receivers behave as expected, regardless of the input levels.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
APPLICATION INFORMATION
Table 1. Active Receiver Inputs vs Outputs
1, 2, OR 3
ACTIVE INPUTS
3, 2, OR 1 UNUSED
OR INACTIVE
OUTPUTS
SEE
FIGURE
1, 2, OR 3
ACTIVE OUTPUTS
†
V
IL
†
V
IC
V
ID
900 mV
–100 mV
600 mV
0
200 mV
200 mV
800 mV
800 mV
1 V
0 V
4
5
6
7
Known state
Known state
Known state
Known state
High state
?
High state
?
1 V
400 mV
†
Measured with respect to ground.
Produces a High State at
Unused or Inactive Outputs
V
ID
= 200 mV
V
IC
= 1V
V
IL
= 900 mV
0V
Figure 4. Waveform One
An Unknown State is Produced
at Unused or Inactive Outputs
V
IC
= 0V
V
IL
= –100 mV
V = 200 mV
ID
Figure 5. Waveform Two
V
ID
= 800 mV
Produces a High State at
Unused or Inactive Outputs
V
IC
= 1V
V
IL
= 600 mV
0V
Figure 6. Waveform Three
An Unknown State is Produced
at Unused or Inactive Outputs
V
ID
= 800 mV
0V
V
IL
= 0V
V
IC
= 400 mV
Figure 7. Waveform Four
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
APPLICATION INFORMATION
In most applications, it is not customary to have a common-mode input close to ground and to have a differential
voltage larger than 2 V. Since the common-mode input voltage is typically around 1.5 V, a 2-V V would result
ID
in a V of 0.5 V, thus satisfying the recommended V level of greater than 0.4 V.
IL
IL
Figure8plotssevendifferentinputthresholdcurvesfromavarietyofproductionlotsandshowshowthefail-safe
circuitry behaves with the input common-mode voltage levels. These input threshold curves are representative
samples of production devices. The curves specifically illustrate a typical range of input threshold variation. The
AM26LV32 is specified with ±200 mV of input sensitivity to account for the variance in input threshold. Each data
point represents the input’s ability to produce a known state at the output for a given V and V . Applying a
IC
ID
differential voltage at or above a certain point on a curve would produce a known state at the output. Applying
a differential voltage less than a certain point on a curve would activate the fail-safe circuit and the output would
be in a high state. For example, inspecting the top input threshold curve reveals that for a V
around 87 mV. Applying 90 mV of differential voltage to this particular production lot generates a known receiver
1.6 V, V yields
IC
ID
output voltage. Applying a V of 80 mV activates the input fail-safe circuitry and the receiver output is placed
ID
in the high state. Texas Instruments specifies the input threshold at ±200 mV, since normal process variations
affect this parameter. Note that at common-mode input voltages around 0.2 V, the input differential voltages are
low compared to their respective data points. This phenomenon points to the fact that the inputs are very
sensitive to small differential voltages around 0.2 V V . It is recommended that V levels be kept greater than
IC
IC
0.5 V to avoid this increased sensitivity at V
0.2 V. In most applications, since V typically is 1.5 V, the
IC
IC
fail-safe circuitry functions properly to provide a high state at the receiver output.
Most
Applications
100
90
80
70
60
Not
Recommended
50
40
30
20
10
0
Increased Receiver Input Sensitivity
0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 2.2 2.4
–1 –0.8 –0.6 –0.4 –0.2
0
1
2
V
IC
– Common-Mode Input Voltage – V
Figure 8. V Versus V Receiver Sensitivity Levels
IC
ID
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
APPLICATION INFORMATION
Figure 9 represents a typical application where two receivers are not used. In this case, there is no need to worry
about the output voltages of the unused receivers since they are not connected in the system architecture.
AM26LV32
Connector
R
R
T
T
System
Unused Circuit
Figure 9. Typical Application with Unused Receivers
Figure 10 shows a common application where one or more drivers are either disabled or powered down. To
ensuretheinactivereceiveroutputsareinahighstate, theactivereceiverinputsmusthaveV >0.4VandV
0.5 V.
>
IL
IC
Driver
AM26LV32
Connector
Connector
R
R
R
R
T
T
T
T
Enable
Cable
System
Disable or
Power Off
Figure 10. Typical Application Where Two or More Drivers are Disabled
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
APPLICATION INFORMATION
Figure 11 is an alternative application design to replace the application in Figure 10. This design uses two
AM26LV32 devices, instead of one. However, this design does not require the input levels be monitored to
ensure the outputs are in the correct state, only that they comply to the RS-232 standard.
Driver
AM26LV32
Connector
Connector
R
R
T
T
Enable
Cable
Unused Circuit
Disable or
Power Off
System
AM26LV32
R
R
T
T
Unused Circuit
Figure 11. Alternative Solution for Figure 10
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
APPLICATION INFORMATION
Figures 12 and 13 show typical applications where a disconnected cable occurs. Figure 12 illustrates a typical
application where a cable is disconnected. Similar to Figure 10, the active input levels must be monitored to
make sure the inactive receiver outputs are in a high state. An alternative solution is shown in Figure 13.
Driver
AM26LV32
Connector
Connector
R
R
R
R
T
T
T
T
Cable
System
Unplugged
Cable
Figure 12. Typical Application Where Two or More Drivers are Disconnected
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
APPLICATION INFORMATION
Figure13isanalternativesolutionsothereceiverinputsdonothavetobemonitored. Thissolutionalsorequires
the use of two AM26LV32 devices, instead of one.
Driver
AM26LV32
Connector
Connector
R
R
T
T
Cable
Unused Circuit
System
AM26LV32
Unplugged
Cable
R
R
T
T
Unused Circuit
Figure 13. Alternative Solution to Figure 12
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
APPLICATION INFORMATION
When designing a system using the AM26LV32, the device provides a robust solution where fail-safe and fault
conditions are of concern. The RS-422-like inputs accept common-mode input levels from –0.3 V to 5.5 V with
a specified sensitivity of ±200mV. As previously shown, care must be taken with active input levels since they
can affect the outputs of unused or inactive bits. However, most applications meet or exceed the requirements
to allow the device to perform properly.
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
PACKAGING INFORMATION
Orderable Device
AM26LV32CD
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
40
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
AM26LV32CDR
SOIC
D
16
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
AM26LV32CNSLE
AM26LV32CNSR
OBSOLETE
ACTIVE
SO
SO
NS
NS
16
16
None
Call TI
Call TI
2000
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
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Use of such information may require a license from a third party under the patents or other intellectual property
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Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
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