ATL432LIBQDBZRQ1 [TI]
汽车类高带宽低 IQ 可编程并联稳压器(引脚排列:RKA) | DBZ | 3 | -40 to 125;型号: | ATL432LIBQDBZRQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 汽车类高带宽低 IQ 可编程并联稳压器(引脚排列:RKA) | DBZ | 3 | -40 to 125 光电二极管 稳压器 |
文件: | 总37页 (文件大小:1680K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ATL431LI-Q1
ATL432LI-Q1
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
ATL431LI-Q1/ATL432LI-Q1 高带宽、低 IQ 可编程并联稳压器
1 特性
3 说明
1
•
符合汽车类 应用要求
具有符合 AEC-Q100 标准的下列特性:
ATL43xLI-Q1 是一款可调节三端并联稳压器,在适用
的汽车级、商用级和军用级温度范围内具有额定的热稳
定性。可通过两个外部电阻器将输出电压设置为介于
Vref(约为 2.5V)和 36V 之间的任意值。该器件的输
出阻抗典型值为 0.3Ω,其有源输出电路可提供快速导
通特性,从而可在板载稳压、可调节电源和开关电源等
多种 应用中完美地替代齐纳二极管。这款器件是
TL431LI-Q1 和 TL432LI-Q1 的引脚对引脚替代品,且
最低工作电流更低,有助于降低系统功耗。ATL432LI-
Q1 具有与 ATL431LI-Q1 完全相同的功能和电气规
格,但是具有不同的 DBZ 封装引脚排布。
•
–
器件温度等级 1:–40°C 至 +125°C 的环境工作
温度范围
•
25°C 下的基准电压容差
–
–
0.5%(B 级)
1%(A 级)
•
•
•
•
•
•
最低输出电压典型值:2.5V
可调输出电压:Vref 至 36V
工作温度范围:−40°C 至 +125°C
27mV 最大温漂
输出阻抗典型值 0.3Ω
灌电流能力
ATL431LI-Q1 具有 A、B 两个等级,初始容差(在
25°C 下)分别为 1% 和 0.5%。ATL43xLI-Q1 的额定
工作温度范围为 –40°C 至 +125°C,其低输出温漂可
确保在整个温度范围内保持良好稳定性。
–
–
Imin = 0.08mA(最大值)
IKA = 15mA(最大值)
•
•
基准输入电流 IREF:0.4μA(最大值)
器件信息(1)
整个温度范围内的基准输入电流偏差 II(dev):0.3μA
(最大值)
器件型号
ATL43xLI
封装(引脚)
SOT-23 (3)
封装尺寸(标称值)
2.90mm x 1.30mm
2 应用
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
•
•
•
•
•
逆变器和电机控制
直流/直流转换器
LED 照明
车载充电器 (OBC)
信息娱乐系统和仪表组
简化原理图
Input
V
KA
I
KA
V
ref
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SNVSBB0
ATL431LI-Q1
ATL432LI-Q1
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
www.ti.com.cn
目录
9.3 Feature Description................................................. 13
9.4 Device Functional Modes........................................ 13
10 Applications and Implementation...................... 14
10.1 Application Information.......................................... 14
10.2 Typical Applications .............................................. 14
10.3 System Examples ................................................. 24
11 Power Supply Recommendations ..................... 27
12 Layout................................................................... 27
12.1 Layout Guidelines ................................................. 27
12.2 Layout Example .................................................... 27
13 器件和文档支持 ..................................................... 28
13.1 器件支持................................................................ 28
13.2 文档支持................................................................ 28
13.3 相关链接................................................................ 28
13.4 接收文档更新通知 ................................................. 28
13.5 支持资源................................................................ 28
13.6 商标....................................................................... 28
13.7 静电放电警告......................................................... 28
13.8 Glossary................................................................ 29
14 机械、封装和可订购信息....................................... 29
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Typical Characteristics.............................................. 6
Parameter Measurement Information .................. 9
8.1 Temperature Coefficient............................................ 9
8.2 Dynamic Impedance ............................................... 10
Detailed Description ............................................ 11
9.1 Overview ................................................................. 11
9.2 Functional Block Diagram ....................................... 11
8
9
4 修订历史记录
注:之前版本的页码可能与当前版本有所不同。
Changes from Original (May 2019) to Revision A
Page
•
将器件状态从“预告信息”更改为“生产数据”.............................................................................................................................. 1
2
Copyright © 2019, Texas Instruments Incorporated
ATL431LI-Q1
ATL432LI-Q1
www.ti.com.cn
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
5 Device Comparison Table
DEVICE PINOUT
INITIAL ACCURACY
OPERATING FREE-AIR TEMPERATURE (TA)
ATL431LI-Q1
ATL432LI-Q1
A: 1%
B: 0.5%
Q: -40°C to 125°C
6 Pin Configuration and Functions
ATL431LI-Q1 DBZ Package
3-Pin SOT-23
ATL432LI-Q1 DBZ Package
3-Pin SOT-23
Top View
Top View
1
2
CATHODE
REF
1
2
REF
ANODE
3
ANODE
3
CATHODE
Pin Functions
PIN
NAME
ATL431LI-Q1
ATL432LI-Q1
TYPE
DESCRIPTION
DBZ
DBZ
ANODE
3
1
2
3
2
1
O
I/O
I
Common pin, normally connected to ground
Shunt Current/Voltage input
CATHODE
REF
Threshold relative to common anode
Copyright © 2019, Texas Instruments Incorporated
3
ATL431LI-Q1
ATL432LI-Q1
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
37
UNIT
V
VKA
IKA
Cathode Voltage(2)
Continuos Cathode Current Range
Reference Input Current
–10
–5
18
mA
mA
C
II(ref)
TJ
10
Operating Junction Temperature Range
Storage Temperature Range
–40
–65
150
150
Tstg
C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to ANODE, unless otherwise noted.
7.2 ESD Ratings
VALUE
±4000
±1000
UNIT
Human body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
Electrostatic
discharge
V(ESD)
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification
7.3 Recommended Operating Conditions
MIN
MAX
36
UNIT
V
VKA
IKA
TA
Cathode Voltage
VREF
0.08
–40
Continuous Cathode Current Range
Operating Free-Air Temperature(1)
15
mA
C
ATL43xLIxQ
125
(1) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ can affect reliability. See the Semiconductor and IC
Package Thermal Metrics Application Report for more information.
7.4 Thermal Information
ATL43xLI
THERMAL METRIC(1)
DBZ
3 PINS
371.7
145.9
104.7
23.9
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
C/W
C/W
C/W
C/W
C/W
Junction-to-top characterization parameter
Juction-to-board characterization parameter
ψJB
102.9
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics Application
Report.
4
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ATL431LI-Q1
ATL432LI-Q1
www.ti.com.cn
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
7.5 Electrical Characteristics
over recommended operating conditions, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CIRCUIT
TEST CONDITIONS
ATL43xLIAx devices
MIN TYP MAX
2475 2500 2525
2487 2500 2512
UNIT
mV
VREF
Reference Voltage
See 图 17
VKA = Vref, IKA = 1 mA
ATL43xLIBx devices
mV
Deviation of reference
input voltage over full
temperature range
VI(dev)
See 图 17
See 图 18
VKA = Vref, IKA = 1 mA
ATL43xLIxQ devices
10
27
mV
(1)
Ratio of change in
reference voltage to the
change in cathode
voltage
ΔVKA = 10 V - Vref
ΔVKA = 36 V - 10 V
–1.4 –2.7
mV/V
mV/V
µA
ΔVref
ΔVKA
/
IKA = 1 mA
–1
–2
Iref
Reference Input Current See 图 18
IKA = 1 mA, R1 = 10kΩ, R2 = ∞
IKA = 1 mA, R1 = 10kΩ, R2 = ∞
0.2
0.4
Deviation of reference
II(dev)
input current over full
See 图 18
See 图 17
0.1
0.3
µA
µA
(1)
temperature range
Minimum cathode
current for regulation
Imin
Ioff
|ZKA
VKA = Vref
65
80
1
Off-state cathode
current
See 图 19
See 图 17
VKA = 36 V, Vref = 0
0.1
µA
(2)
|
Dynamic Impedance
VKA = Vref, IKA = 1 mA to 15 mA
0.65 0.75
Ω
(1) The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the
rated temperature range. For more details on VI(dev) and how it relates to the average temperature coefficient, see the Temperature
Coefficient section.
(2) The dynamic impedance is defined by |ZKA| = ΔVKA/ΔIKA. For more details on |ZKA| and how it relates to Vout, see the Temperature
Coefficient section.
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ATL432LI-Q1
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
www.ti.com.cn
7.6 Typical Characteristics
Data at high and low temperatures are applicable only within the recommended operating free-air temperature
ranges of the various devices.
0.5
0.4
0.3
0.2
0.1
0
2520
2515
2510
2505
2500
2495
2490
2485
2480
2475
IKA = 1 mA
-50 -25
0
25
50
TA - Free-Air Temperature - °C
75 100 125
-40
-20
0
20
40
TA (èC)
60
80
100 120 140
图 2. Reference Current versus Free-Air Temperature
图 1. Reference Voltage versus Free-Air Temperature
200
15
VKA = Vref
TA = 25°C
VKA = Vref
TA = 25°C
12
175
150
125
9
6
Imin
100
75
50
25
0
3
0
-25
-50
-3
0
0.5
1
VKA - Cathode Voltage -V
1.5
2
2.5
3
0
0.5
1
VKA - Cathode Voltage - V
1.5
2
2.5
D003
D004
图 3. Cathode Current versus Cathode Voltage
图 4. Cathode Current versus Cathode Voltage
0.02
-0.35
VKA = 3 V to 36 V
-0.4
0.016
0.012
0.008
0.004
0
-0.45
-0.5
-0.55
-0.6
-0.65
-0.7
-0.75
-0.8
-40 -20
0 20 40 60 80 100 120 140
TA - Free-Air Temperature - °C
-50 -25
0
25
50
Temperature (°C)
75 100 125
D006
图 5. Off-State Cathode Current
图 6. Ratio of Delta Reference Voltage to Delta Cathode
versus Free-Air Temperature
Voltage versus Free-Air Temperature
6
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ATL431LI-Q1
ATL432LI-Q1
www.ti.com.cn
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
Typical Characteristics (接下页)
75
200
160
120
80
I
= 10 mA
KA
T = 25°C
A
60
45
30
15
Output
232 Ω
I
KA
15 kΩ
9 µF
40
+
−
AV
Phase
0
0
10M
8.25 kΩ
100
1k
10k 100k
f - Frequency - Hz
1M
D000
GND
图 7. Small-Signal Voltage Amplification
图 8. Test Circuit for Voltage Amplification
versus Frequency
100
1 kΩ
IKA = 1 mA
TA = 25°C
Output
50
30
20
I
KA
10
5
50 Ω
−
+
3
2
1
GND
0.5
0.3
0.2
0.1
1k
10k 100k
f - Frequency - Hz
1M
图 9. Reference Impedance versus Frequency
图 10. Test Circuit for Reference Impedance
6
220 Ω
TA = 25èC
Input
Output
5
4
Pulse
50 Ω
Generator
f = 100 kHz
3
Output
2
1
0
GND
-1
0
1
2
3
4
5
6
7
t - Time - ms
puls
图 12. Test Circuit for Pulse Response
图 11. Pulse Response
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7
ATL431LI-Q1
ATL432LI-Q1
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
www.ti.com.cn
Typical Characteristics (接下页)
150 Ω
15
A VKA = Vref
B VKA = 5 V
C VKA = 10 V
I
13
KA
Stable Region
+
−
V
BATT
11
9
C
L
7
TEST CIRCUIT FOR CURVE A
5
3
I
KA
R1 = 10 kΩ
150 Ω
1
0.001
0.01
0.1
1
CL - Load Capacitance - µF
10
C
L
ATL4
+
−
The areas under the curves represent conditions that may cause the
device to oscillate. For curves B and C, R2 and V+ are adjusted to
establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL
then are adjusted to determine the ranges of stability.
R2
V
BATT
图 13. Stability Boundary Conditions for All ATL431LI-Q1,
ATL432LI-Q1 Devices Above 1 mA
TEST CIRCUIT FOR CURVES B, C, AND D
图 14. Test Circuit for Stability Boundary Conditions
150 Ω
1
A VKA = Vref
B VKA = 5 V
C VKA = 10 V
I
KA
+
−
0.8
V
BATT
C
L
0.6
0.4
TEST CIRCUIT FOR CURVE A
Stable Region
I
KA
0.2
R1 = 10 kΩ
150 Ω
C
L
0
0.001
+
−
0.01
0.1
1
CL - Load Capacitance - µF
10
R2
V
BATT
ATL4
The areas in-between the curves represent conditions that may cause
the device to oscillate. For curves B and C, R2 and V+ are adjusted
to establish the initial VKA and IKA conditions, with CL = 0. VBATT and
CL then are adjusted to determine the ranges of stability.
图 15. Stability Boundary Conditions for All ATL431LI-Q1,
ATL432LI-Q1 Devices Below 1 mA
TEST CIRCUIT FOR CURVES B, C, AND D
图 16. Test Circuit for Stability Boundary Conditions
8
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ATL431LI-Q1
ATL432LI-Q1
www.ti.com.cn
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
8 Parameter Measurement Information
Input
V
KA
I
KA
V
ref
图 17. Test Circuit for VKA = Vref
Input
R1
V
KA
I
KA
I
ref
R2
V
ref
R1
R2
æ
ö
V
KA
= V
ref ç
1 +
+ I × R1
ref
÷
è
ø
图 18. Test Circuit for VKA > Vref
Input
V
KA
I
off
图 19. Test Circuit for Ioff
8.1 Temperature Coefficient
The deviation of the reference voltage, Vref, over the full temperature range is known as VI(dev). The parameter of
VI(dev) can be used to find the temperature coefficient of the device. The average full-range temperature
coefficient of the reference input voltage, αVref, is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the
lower temperature. The full-range temperature coefficient is an average and, therefore, any subsection of the
rated operating temperature range can yield a value that is greater or less than the average. For more details on
temperature coefficient, refer to the Voltage Reference Selection Basics White Paper.
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ATL431LI-Q1
ATL432LI-Q1
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
www.ti.com.cn
8.2 Dynamic Impedance
DVKA
DIKA
ZKA
=
The dynamic impedance is defined as:
. When the device is operating with two external resistors
DV
z' =
(see 图 18), the total dynamic impedance of the circuit is given by:
I , which is approximately equal to
R1
≈
’
ZKA 1+
∆
÷
◊
R2
«
.
The VKA of the ATL431LI-Q1 can be affected by the dynamic impedance. The ATL431LI-Q1 test current Itest for
VKA is specified in the Electrical Characteristics. Any deviation from Itest can cause deviation on the output VKA. 图
20 shows the effect of the dynamic impedance on the VKA
.
Itest
IKA
IKA(min)
0
VKA (V)
图 20. Dynamic Impedance
10
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ATL431LI-Q1
ATL432LI-Q1
www.ti.com.cn
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
9 Detailed Description
9.1 Overview
This standard device has proven ubiquity and versatility across a wide range of applications, ranging from power
to signal path. This is due to its key components containing an accurate voltage reference and op amp, which
are very fundamental analog building blocks. The ATL431LI-Q1 is used in conjunction with the key components
to behave as the following:
•
•
•
•
Single voltage reference
Error amplifier
Voltage clamp
Comparator with integrated reference
ATL431LI-Q1 can be operated and adjusted to cathode voltages from 2.5 V to 36 V, making this part optimal for
a wide range of end equipments in industrial, auto, telecom, and computing. For this device to behave as a shunt
regulator or error amplifier, >80 µA (Imin(maximum)) must be supplied in to the cathode pin. Under this condition,
feedback can be applied from the Cathode and Ref pins to create a replica of the internal reference voltage.
Various reference voltage options can be purchased with initial tolerances (at 25°C) of 0.5% and 1%. These
reference options are denoted by B (0.5%) and A (1.0%) after the ATL431LI-Q1 or ATL432LI-Q1. ATL431LI-Q1
and ATL432LI-Q1 are both functionally the same, but have different pinout options. The ATL43xLI-Q1 devices
are characterized for operation from –40°C to +125°C.
9.2 Functional Block Diagram
CATHODE
+
_
REF
V
ref
ANODE
图 21. Equivalent Schematic
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ATL432LI-Q1
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Functional Block Diagram (接下页)
CATHODE
REF
ANODE
图 22. Detailed Schematic
12
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ATL432LI-Q1
www.ti.com.cn
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
9.3 Feature Description
The ATL431LI-Q1 consists of an internal reference and amplifier that outputs a sink current based on the
difference between the reference pin and the virtual internal pin. The sink current is produced by the internal
Darlington pair, shown in 图 21. A Darlington pair is used for this device to be able to sink a maximum current of
15 mA.
When operated with enough voltage headroom (≥ 2.5 V) and cathode current (IKA), the ATL431LI-Q1 forces the
reference pin to 2.5 V. However, the reference pin cannot be left floating, as it needs IREF ≥ 0.4 µA (see the
Specifications). This is because the reference pin is driven into an NPN, which needs base current to operate
properly.
When feedback is applied from the Cathode and Reference pins, the ATL431LI-Q1 behaves as a Zener diode,
regulating to a constant voltage dependent on current being supplied into the cathode. This is due to the internal
amplifier and reference entering the proper operating regions. The same amount of current needed in the above
feedback situation must be applied to this device in open loop, servo, or error amplifying implementations for it to
be in the proper linear region giving ATL431LI-Q1 enough gain.
Unlike many linear regulators, ATL431LI-Q1 is internally compensated to be stable without an output capacitor
between the cathode and anode. However, if it is desired to use an output capacitor 图 13 can be used as a
guide to assist in choosing the correct capacitor to maintain stability.
9.4 Device Functional Modes
9.4.1 Open Loop (Comparator)
When the cathode/output voltage or current of ATL431LI-Q1 is not being fed back to the reference/input pin in
any form, this device is operating in open loop. With proper cathode current (Ika) applied to this device, the
ATL431LI-Q1 has the characteristics shown in 图 21. With such high gain in this configuration, the ATL431LI-Q1
is typically used as a comparator. With the reference integrated makes ATL431LI-Q1 the preferred choice when
users are trying to monitor a certain level of a single signal.
9.4.2 Closed Loop
When the cathode/output voltage or current of the ATL431LI-Q1 is being fed back to the reference/input pin in
any form, this device is operating in closed loop. The majority of applications involving ATL431LI-Q1 use it in this
manner to regulate a fixed voltage or current. The feedback enables this device to behave as an error amplifier,
computing a portion of the output voltage and adjusting it to maintain the desired regulation. This is done by
relating the output voltage back to the reference pin in a manner to make it equal to the internal reference
voltage, which can be accomplished via resistive or direct feedback.
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ATL431LI-Q1
ATL432LI-Q1
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
www.ti.com.cn
10 Applications and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
As this device has many applications and setups, there are many situations that this data sheet cannot
characterize in detail. The linked application note will help the designer make the best choices when using this
part.
Setting the Shunt Voltage on an Adjustable Shunt Regulator Application Note assists with setting the shunt
voltage to achieve optimum accuracy for this device.
10.2 Typical Applications
10.2.1 Comparator With Integrated Reference
Vsup
Rsup
Vout
CATHODE
R1
VL
RIN
REF
V
IN
+
R2
2.5V
ANODE
图 23. Comparator Application Schematic
14
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Typical Applications (接下页)
10.2.2 Design Requirements
For this design example, use the parameters listed in 表 1 as the input parameters.
表 1. Design Parameters
DESIGN PARAMETER
Input Voltage Range
Input Resistance
EXAMPLE VALUE
0 V to 5 V
10 kΩ
Supply Voltage
24 V
Cathode Current (Ik)
Output Voltage Level
Logic Input Thresholds VIH/VIL
5 mA
~2 V – VSUP
VL
10.2.3 Detailed Design Procedure
When using the ATL431LI-Q1 as a comparator with reference, determine the following:
•
•
•
•
Input voltage range
Reference voltage accuracy
Output logic input high and low level thresholds
Current source resistance
10.2.3.1 Basic Operation
In the configuration shown in 图 23, the ATL431LI-Q1 behaves as a comparator, comparing the VREF pin voltage
to the internal virtual reference voltage. When provided a proper cathode current (IK), ATL431LI-Q1 has enough
open-loop gain to provide a quick response. This can be seen in 图 24 where the RSUP = 10 kΩ (IKA = 500 µA)
situation responds much slower than RSUP = 1 kΩ (IKA = 5 mA). With the ATL431LI-Q1 max operating current
(IMIN) being 1 mA, operation below that can result in low gain, leading to a slow response.
10.2.3.1.1 Overdrive
Slow or inaccurate responses can also occur when the reference pin is not provided enough overdrive voltage.
This is the amount of voltage that is higher than the internal virtual reference. The internal virtual reference
voltage is within the range of 2.5 V ±(0.5% or 1.0%) depending on which version is being used. The more
overdrive voltage provided, the faster the ATL431LI-Q1 will respond.
For applications where ATL431LI-Q1 is being used as a comparator, it is best to set the trip point to greater than
the positive expected error (that is +1.0% for the A version). For fast response, setting the trip point to >10% of
the internal VREF suffices.
For minimal voltage drop or difference from Vin to the ref pin, TI recommends to use an input resistor <10 kΩ to
provide Iref.
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10.2.3.2 Output Voltage and Logic Input Level
For ATL431LI-Q1 to properly be used as a comparator, the logic output must be readable by the receiving logic
device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted
by VIH and VIL.
As seen in 图 24, the output low level voltage of the ATL431LI-Q1 in open-loop/comparator mode is
approximately 2 V, which is typically sufficient for 5 V supplied logic. However, this does not work for 3.3 V and
1.8 V supplied logic. To accommodate this, a resistive divider can be tied to the output to attenuate the output
voltage to a voltage legible to the receiving low voltage logic device.
The output high voltage of the ATL431 is equal to VSUP due to ATL431LI-Q1 being open-collector. If VSUP is
much higher than the maximum input voltage tolerance of the receiving logic, the output must be attenuated to
accommodate the reliability of the outgoing logic.
When using a resistive divider on the output, make sure the sum of the resistive divider (R1 and R2 in 图 23) is
much greater than RSUP to not interfere with the ability of the ATL431LI-Q1 to pull close to VSUP when turning off.
10.2.3.2.1 Input Resistance
The ATL431LI-Q1 requires an input resistance in this application to source the reference current (IREF) needed
from this device to be in the proper operating regions while turning on. The actual voltage seen at the ref pin is
VREF = VIN - IREF × RIN because IREF can be as high as 4 µA. TI recommends to use a resistance small enough
that mitigates the error that IREF creates from VIN.
10.2.4 Application Curves
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
Vin
Vka(Rsup=10kW)
Vka(Rsup=1kW)
0.5
0
-0.5
-0.001
-0.0006
-0.0002
0.0002
0.0006
0.001
Time (s)
D001
图 24. Output Response With Various Cathode Currents
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10.2.5 Precision LED Lighting Current Sink Regulator
VCC
VCC
R1 =
IOUT
IKA
hFE
VREF
IOUT
=
RS
VCC
IOUT
R1
ATL431LI-Q1
RS
GND
图 25. LED Lighting Current Sink Regulator
10.2.5.1 Design Requirements
For this design example, use the parameters listed in 表 1 as the input parameters.
表 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Supply Voltage (VI(BATT)
)
5 V
Sink Current (IO)
100 mA
5 mA
Cathode Current (Ik)
10.2.5.2 Detailed Design Procedure
When using the ATL43xLI-Q1 as a constant current sink, determine the following:
•
•
•
Output current range
Output current accuracy
Power consumption for the ATL43xLI-Q1
10.2.5.2.1 Basic Operation
In the configuration shown, the ATL43xLI-Q1 acts as a control component within a feedback loop of the constant
current sink. Working with an external passing component such as a BJT, the ATL43xLI-Q1 provides precision
current sink with accuracy set by itself and the sense resistor RS. The LEDs are lit based on the desired current
sink and regulated for accurate brightness and color.
10.2.5.2.1.1 Output Current Range and Accuracy
The output current range of the circuit is determined by the equation shown in the configuration. Keep in mind
that the VREF equals to 2.500 V. When choosing the sense resistor RS, it needs to generate 2.500 V for the
TL43xLI-Q1 when IO reaches the target current. If the overhead voltage of 2.500 V is not acceptable, consider
lower voltage reference devices such as the TLV43x-Q1 or TLVH43x-Q1.
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The output current accuracy is determined by both the accuracy of the ATL43xLI-Q1 chosen, as well as the
accuracy of the sense resistor RS. The internal virtual reference voltage of ATL43xLI-Q1 is within the range of
2.500 V ±(0.5% or 1.0%), depending on which version is being used. Another consideration for the output current
accuracy is the temperature coefficient of the ATL43xLI-Q1 and RS. Refer to the for the specification of these
parameters.
10.2.5.2.2 Power Consumption
For the ATL43xLI-Q1 to properly be used as a control component in this circuit, the minimum operating current
needs to be reached. This is accomplished by setting the external biasing resistor in series with the ATL43xLI-
Q1.
To achieve lower power consumption, the ATL43xLI-Q1 is used due to its 65 µA typical minimum cathode
current, Imin
.
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10.2.6 Shunt Regulator/Reference
RSUP
R1
V
SUP
V
O
=
1 +
V
)
ref
(
R2
R1
0.1%
CATHODE
ATL431LI-Q1
REF
V
ref
CL
ANODE
R2
0.1%
图 26. Shunt Regulator Schematic
10.2.6.1 Design Requirements
For this design example, use the parameters listed in 表 1 as the input parameters.
表 3. Design Parameters
DESIGN PARAMETER
Reference Initial Accuracy
Supply Voltage
EXAMPLE VALUE
1.0%
24 V
Cathode Current (Ik)
5 mA
Output Voltage Level
2.5 V–36 V
2 µF
Load Capacitance
Feedback Resistor Values and Accuracy (R1 and R2)
10 kΩ
10.2.6.2 Detailed Design Procedure
When using ATL431LI-Q1 as a shunt regulator, determine the following:
•
•
•
•
•
•
Input voltage range
Temperature range
Total accuracy
Cathode current
Reference initial accuracy
Output capacitance
10.2.6.2.1 Programming Output/Cathode Voltage
To program the cathode voltage to a regulated voltage, a resistive bridge must be shunted between the cathode
and anode pins with the mid point tied to the reference pin. This can be seen in 图 26 with R1 and R2 being the
resistive bridge. The cathode/output voltage in the shunt regulator configuration can be approximated by the
equation shown in 图 26. The cathode voltage can be more accuratel, which can be determined by taking in to
account the cathode current:
Vo = (1+R1/R2) × VREF-IREF × R1
(1)
For this equation to be valid, the ATL431LI-Q1 must be fully biased so that it has enough open loop gain to
mitigate any gain error. This can be done by meeting the Imin spec denoted in the Specifications.
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10.2.6.2.2 Total Accuracy
When programming the output above unity gain (VKA = VREF), the ATL431LI-Q1 is susceptible to other errors that
can effect the overall accuracy beyond VREF. These errors include:
•
•
•
•
R1 and R2 accuracies
VI(dev): Change in reference voltage over temperature
ΔVREF / ΔVKA: Change in reference voltage to the change in cathode voltage
|zKA|: Dynamic impedance, causing a change in cathode voltage with cathode current
Worst case cathode voltage can be determined taking all of the variables in to account. The Setting the Shunt
Voltage on an Adjustable Shunt Regulator Application Note assists designers in setting the shunt voltage to
achieve optimum accuracy for this device.
10.2.6.2.3 Stability
Though ATL431LI-Q1 is stable with no capacitive load, the device that receives the output voltage of the shunt
regulator can present a capacitive load that is within the ATL431LI-Q1 region of stability, shown in 图 13. Also,
designers can use capacitive loads to improve the transient response or for power supply decoupling. When
using additional capacitance between Cathode and Anode, see 图 13. Also, Understanding Stability Boundary
Conditions Charts in TL431, TL432 Data Sheet Application Note provides a deeper understanding of the stability
characteristics of this device and aids the user in making the right choices when choosing a load capacitor.
10.2.6.2.4 Start-Up Time
As shown in 图 27, the ATL431LI-Q1 has a fast response up to approximately 2 V and then slowly charges to its
programmed value. This is due to the compensation capacitance (shown in 图 13) the ATL43xLI-Q1 has to meet
its stability criteria. Despite the secondary delay, ATL43xLI-Q1 still has a fast response suitable for many clamp
applications.
10.2.6.3 Application Curves
27
Vsup
24
Vka=Vref
R1=10kW & R2=10kW
R1=38kW & R2=10kW
21
18
15
12
9
6
3
0
-3
-6
-5E-6
-3E-6
-1E-6
1E-6
3E-6
5E-6
Time (s)
D001
图 27. ATL43xLI-Q1 Start-Up Response
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10.2.7 Isolated Flyback with Optocoupler
VOUT
VIN AC
VDD
VPC
VSC
VDD
HV
UCC28740
PWM Controller
UCC24636
SR Controller
VS
FB
DRV
DRV
TBLK
CS
ATL431LI-Q1
GND
图 28. Isolated Flyback with Optocoupler
10.2.7.1 Design Requirements
The ATL431LI-Q1 is used in the feedback network on the secondary side for a isolated flyback with optocoupler
design. 图 28 shows the simplified flyback converter that used the ATL431LI-Q1. For this design example, use
the parameters in 表 4 as the input parameters.
表 4. Design Parameters
DESIGN PARAMETER
Voltage Output
EXAMPLE VALUE
20 V
Feedback Network Quiescent Current (Iq)
<40 mW
10.2.7.1.1 Detailed Design Procedure
In this example, a simplified design procedure will be discussed. The compensation network for the feedback
network is beyond the scope of this section. Details on compensation network can be found in Compensation
Design with TL431 for UCC28600 Application Report.
The goal of this design is to design a low standby current feedback network to meet the Europe CoC Tier 2 and
United States DoE Level VI requirements. To meet the design requirements, the system standby power needs to
be below 75 mW. To meet this, the feedback network needs to consume less than 40 mW to allow margin for the
power losses on the primary side controller and passive components. This can pose a challenge in systems
greater than 10 V.
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VOUT
Rs
Iq
Iq
IKA
R1
IRE
F
ATL431LI-Q1
R2
图 29. Feedback Quiescent Current
10.2.7.1.1.1 ATL431LI-Q1 Biasing
图 29 shows the simplified version of the feedback network. The standby Iq of the system is dependent on two
paths: the ATL431LI-Q1 biasing path and the resistor feedback path. With the given design requirements, the
total current through the feedback network cannot exceed 2 mA.
The design goal is to take full advantage of the Imin to set the IKA of the ATL431LI-Q1. The benefit of the
ATL431LI-Q1 is its low Imin of 80 µA which allows the IKA to be lower at a full load condition compared to typical
TL431LI-Q1 devices. This helps lower the IKA at the no-load condition which is higher than the full load condition
due to the dynamic changes in the IKA as the system load varies. The IKA at no-load, IOPTNL, is dependent the
value of Rs which is the biasing resistor. Rs is very application-specific and is dependent on variables such as
the CTR of the optocoupler, voltage, and current at no-load. This can be seen in 公式 2. It is possible to lower
IOPTNL to a value of 1.5 mA for a power loss of 30 mW by using an optocoupler with a high CTR.
Rs ö (VOUT - VOPTNL - 2V) / IOPTNL
VOPTNL = Optocoupler Voltage at No -Load Conditions
IOPTNL = Optocoupler Current at No -Load Conditions
(2)
10.2.7.1.1.2 Resistor Feedback Network
The feedback resistors set the output voltage of the secondary side and consume the same Iq at a fixed voltage.
The design goal for the feedback resistor path is to minimize the resistor error while maintaining a low Iq. For this
system example, the feedback network path in this design consumes 0.5 mA to allow enough current for
ATL431LI-Q1 biasing. The resistors, R1 and R2, are sized based on a 0.5 mA budget for Iq and Iref. By using the
resistor values from 公式 3 and 公式 4, the total power consumption is 10 mW. This can be further decreased by
using larger resistors.
R1 = (VOUT - VREF) / IFB
R1 = (20 V - 2.5 V) / 0.5mA
R1 = 35kW
(3)
(4)
R2 = VREF / (IFB -IREF
)
R2 = 2.5 V / (0.5mA - 0.4mA)
R2 = 5.004kW
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10.2.8 Adjustable Reference for Tracking LDO
10.2.8.1 Design Requirements
The ATL431LI-Q1 is used as a reference voltage to help regulate a supply voltage off an LDO. By adjusting the
cathode voltage, the output voltage of the LDO can vary. The TPS7B4250-Q1 is a voltage-tracking LDO with an
adjustable pin which needs a precise reference voltage to change the regulate output voltage.
表 5. Design Parameters
DESIGN PARAMETER
Input Voltage
EXAMPLE VALUE
4 V to 40 V
ADJ Reference Voltage
Output Voltage
2.500 V–18 V
2.500 V–18 V
50 mA
Output Current Rating
Output Capacitor Range
Output Capacitor ESR Range
1 µF to 50 µF
1 mΩ to 20 Ω
10.2.8.2 Detailed Design Procedure
The goal of this design is to create a precision and stable output stage using an LDO that requires an external
voltage reference such as the TPS7B4250-Q1. To begin the design process, the input and desired output voltage
range is required. The ATL431LI-Q1 can be adjusted between 2.5 V and 36 V so it covers most of the output
voltage rating of TPS7B42500-Q1. For reference voltage under 2.5 V, the TLV431-Q1 voltage reference can be
used. The input and output capacitor must also be taken into consideration for decoupling and stability.
VOUT
2.2 µF
VIN
1 µF
Vreg
Vbat
TPS7B4250-Q1
ADJ/EN
GND
ATL431LI-Q1
0.1 µF
图 30. Feedback Quiescent Current
10.2.8.2.1 External Capacitors
An input capacitor, CI, is recommended to buffer line influences. Connect the capacitors close to the IC pins.
The output capacitor for the TPS7B4250-Q1 device is required for stability. Without the output capacitor, the
regulator oscillates. The actual size and type of the output capacitor can vary based on the application load and
temperature range. The effective series resistance (ESR) of the capacitor is also a factor in the IC stability. The
worst case is determined at the minimum ambient temperature and maximum load expected. To ensure stability
of TPS7B4250-Q1 device, the device requires an output capacitor between 1 µF and 50 µF with an ESR range
between 0.001 Ω and 20 Ω that can cover most types of capacitor ESR variation under the recommend operating
conditions. As a result, the output capacitor selection is flexible.
The capacitor must also be rated at all ambient temperature expected in the system. To maintain regulator
stability down to –40°C, use a capacitor rated at that temperature.
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10.3 System Examples
V
I(BATT)
R
2N222
(see Note A)
2N222
30 Ω
4.7 kΩ
0.01 µF
ATL431LI-Q1
V
O
R1
0.1%
R2
R1
R2
æ
ö
V
=
1 +
V
ref
O
ç
÷
0.1%
è
ø
R should provide cathode current ≥ 80 µA to the ATL431LI-Q1 at minimum V(BATT)
.
图 31. Precision High-Current Series Regulator
V
I(BATT)
IN
OUT
uA7805
V
O
Common
ATL431LI-Q1
R1
R2
R1
V
1
V
ref
=
+
(
(
O
+
Vref 5 V
Minimum V
=
O
R2
图 32. Output Control of a Three-Terminal Fixed Regulator
V
V
O
I(BATT)
R1
R2
R1
V
1
V
(
ref
=
+
(
O
ATL431LI-Q1
R2
图 33. High-Current Shunt Regulator
V
I(BATT)
V
O
R1
ATL431LI-Q1
C
(see Note A)
R2
Refer to the stability boundary conditions in 图 13 to determine allowable values for C.
图 34. Crowbar Circuit
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System Examples (接下页)
IN
OUT
LM317
Adjust
V
V ≈5 V, 1.5 A
O
I(BATT)
8.2 kΩ
243 Ω
0.1%
ATL431LI-Q1
243 Ω
0.1%
图 35. Precision 5-V, 1.5-A Regulator
V
V ≈5 V
O
I(BATT)
R
b
(see Note A)
27.4 kΩ
0.1%
ATL431LI-Q1
27.4 kΩ
0.1%
Rb should provide cathode current ≥80 µA to the ATL431LI-Q1.
图 36. Efficient 5-V Low-Dropout (LDO) Regulator Configuration
12 V
V
CC
6.8 kΩ
10 kΩ
5 V
−
10 kΩ
+
0.1%
TL598
X
Not
ATL431LI-Q1
Used
10 kΩ
0.1%
Feedback
图 37. PWM Converter With Reference
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System Examples (接下页)
R3
(see Note A)
V
I(BATT)
R4
R1B
R2B
R1A
(see Note A)
R1B
R2B
Low Limit = 1 +
High Limit = 1 +
Vref
ATL431LI-Q1
R1A
R2A
Vref
LED on When Low Limit < V
< High Limit
I(BATT)
R2A
Select R3 and R4 to provide the desired LED intensity and cathode current ≥80 µA to the ATL431LI-Q1 at the
available VI(BATT)
.
图 38. Voltage Monitor
650
12 V
R
2 k
ATL431LI-Q1
C
ꢀ
ꢁ
12 V
12 V – V
On
Delay = R × C × ln
!
!
Off
ref
"
#
图 39. Delay Timer
R
CL
I
O
0.1%
Vref
RCL
V
I(BATT)
Iout
R1
+ IKA
=
=
VI(BATT
R1
)
ATL431LI-Q1
I
O
I
+
KA
h
FE
图 40. Precision Current Limiter
V
I(BATT)
I
O
Vref
RS
I
=
O
ATL431LI-Q1
R
S
0.1%
图 41. Precision Constant-Current Sink
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11 Power Supply Recommendations
When using ATL43xLI-Q1 as a Linear Regulator to supply a load, designers typically uses a bypass capacitor on
the output/cathode pin. When doing this, be sure that the capacitance is within the stability criteria shown in 图
13.
To not exceed the maximum cathode current, be sure that the supply voltage is current limited. Also, be sure to
limit the current being driven into the Ref pin, so you do not exceed its absolute maximum rating.
For applications shunting high currents, pay attention to the cathode and anode trace lengths, adjusting the width
of the traces to have the proper current density.
12 Layout
12.1 Layout Guidelines
Bypass capacitors must be placed as close to the part as possible. Current-carrying traces need to have widths
appropriate for the amount of current they are carrying; in the case of the ATL43xLI-Q1, these currents are low.
12.2 Layout Example
ATL432LI-Q1
(TOP VIEW)
Rref
REF
Vin
1
2
ANODE
3
Rsup
CATHODE
GND
Vsup
CL
GND
图 42. DBZ Layout Example
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13 器件和文档支持
13.1 器件支持
13.1.1 器件命名规则
TI 通过分配后缀和前缀来区分 ATL43xLI-Q1 系列的所有组合。更多详细信息和可以订购的组合请参见“封装选项附
录”。
ATL431LI X X XXX X XX
Initial
Accuracy
B: 0.5%
A: 1%
Operating Free-Air Package
Temperature Type
Package
Quantity Qualification
R: Tape & Reel
Product
1: ATL431LI
2: ATL432LI*
*(Cathode and REF
pins are switched)
Q: -40°C to 125°C
DBZ: SOT-23-3
Q1: AEC-Q100
13.2 文档支持
13.2.1 相关文档
请参阅如下相关文档:
德州仪器 (TI),《在可调节并联稳压器上设置并联电压》
13.3 相关链接
下表列出了快速访问链接。类别包括技术文档、支持和社区资源、工具和软件,以及立即订购快速访问。
表 6. 相关链接
器件
产品文件夹
单击此处
单击此处
立即订购
单击此处
单击此处
技术文档
单击此处
单击此处
工具与软件
单击此处
单击此处
支持和社区
单击此处
单击此处
ATL431LI-Q1
ATL432LI-Q1
13.4 接收文档更新通知
要接收文档更新通知,请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册,即可每周接收产品
信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
13.5 支持资源
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.6 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.7 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
28
版权 © 2019, Texas Instruments Incorporated
ATL431LI-Q1
ATL432LI-Q1
www.ti.com.cn
ZHCSJP0A –MAY 2019–REVISED NOVEMBER 2019
13.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。
版权 © 2019, Texas Instruments Incorporated
29
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
ATL431LIAQDBZRQ1
ATL431LIBQDBZRQ1
ATL432LIAQDBZRQ1
ATL432LIBQDBZRQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
DBZ
DBZ
DBZ
DBZ
3
3
3
3
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
22XP
22ZP
23AP
23BP
NIPDAU
NIPDAU
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
ATL431LIAQDBZRQ1
ATL431LIBQDBZRQ1
ATL432LIAQDBZRQ1
ATL432LIBQDBZRQ1
SOT-23
SOT-23
SOT-23
SOT-23
DBZ
DBZ
DBZ
DBZ
3
3
3
3
3000
3000
3000
3000
178.0
178.0
178.0
178.0
9.0
9.0
9.0
9.0
3.15
3.15
3.15
3.15
2.77
2.77
2.77
2.77
1.22
1.22
1.22
1.22
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
ATL431LIAQDBZRQ1
ATL431LIBQDBZRQ1
ATL432LIAQDBZRQ1
ATL432LIBQDBZRQ1
SOT-23
SOT-23
SOT-23
SOT-23
DBZ
DBZ
DBZ
DBZ
3
3
3
3
3000
3000
3000
3000
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
18.0
18.0
18.0
18.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.12 MAX
1.4
1.2
B
A
0.1 C
PIN 1
INDEX AREA
1
0.95
(0.125)
3.04
2.80
1.9
3
(0.15)
NOTE 4
2
0.5
0.3
3X
0.10
0.01
(0.95)
TYP
0.2
C A B
0.25
GAGE PLANE
0.20
0.08
TYP
0.6
0.2
TYP
SEATING PLANE
0 -8 TYP
4214838/D 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214838/D 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/D 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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