BQ2002ESN-SITR [TI]
暂无描述;型号: | BQ2002ESN-SITR |
厂家: | TEXAS INSTRUMENTS |
描述: | 暂无描述 电池 |
文件: | 总12页 (文件大小:135K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
bq2002/F
NiCd/NiMH Fast-Charge Management ICs
Features
General Description
Fast charge is terminated by any of
the following:
➤
Fast charge of nickel cadmium
The bq2002 and bq2002/F Fast-Charge
ICs are low-cost CMOS battery-charge
controllers providing reliable charge
termination for both NiCd and NiMH
battery applications. Controlling a
current-limited or constant-current
supply allows the bq2002/F to be the
basis for a cost-effective stand-alone or
system-integrated charger. The
bq2002/F integrates fast charge with
optional top-off and pulsed-trickle con-
trol in a single IC for charging one or
more NiCd or NiMH battery cells.
n
n
n
n
n
Peak voltage detection (PVD)
Negative delta voltage (-∆V)
Maximum voltage
or nickel-metal hydride batter-
ies
➤
➤
Direct LED output displays
charge status
Maximum temperature
Maximum time
Fast-charge termination by -∆V,
maximum voltage, maximum
temperature, and maximum
time
After fast charge, the bq2002/F op-
tionally tops-off and pulse-trickles the
battery per the pre-configured limits.
Fast charge may be inhibited using
the INH pin. The bq2002/F may also
be placed in low-standby-power mode
to reduce system power consumption.
➤
Internal band-gap voltage ref-
erence
Fast charge is initiated on application
of the charging supply or battery re-
placement. For safety, fast charge is
inhibited if the battery temperature
and voltage are outside configured
limits.
➤
➤
Optional top-off charge
Selectable pulse trickle charge
rates
The bq2002F differs from the
bq2002 only in that a slightly differ-
ent set of fast-charge and top-off
time limits is available. All differ-
ences between the two ICs are illus-
trated in Table 1.
➤
➤
Low-power mode
8-pin 300-mil DIP or 150-mil
SOIC
Pin Connections
Pin Names
TS
Temperature sense input
Supply voltage input
Charge inhibit input
Charge control output
TM
Timer mode select input
Charging status output
Battery voltage input
System ground
TM
LED
BAT
1
2
3
4
8
7
6
5
CC
VCC
INH
CC
LED
BAT
VSS
INH
V
CC
V
SS
TS
8-Pin DIP or
Narrow SOIC
PN-200201.eps
bq2002/F Selection Guide
Part No.
TCO
HTF
LTF
PVD Fast Charge
tMTO
160
80
40
160
100
55
Top-Off
C/32
C/16
None
C/32
C/16
Maintenance
C/64
-∆V
✔
✔
C/2
1C
2C
C/2
1C
2C
0.5 ∗ VCC
bq2002
None None
None None
C/64
C/32
C/64
C/64
✔
✔
✔
✔
0.5 ∗ VCC
bq2002F
None
C/32
SLUS131–JANUARY 1999 D
1
bq2002/F
Charge control output
CC
Pin Descriptions
An open-drain output used to control the
charging current to the battery. CC switch-
ing to high impedance (Z) enables charging
current to flow, and low to inhibit charging
current. CC is modulated to provide top-off,
if enabled, and pulse trickle.
Timer mode input
TM
A three-level input that controls the settings
for the fast charge safety timer, voltage ter-
mination mode, top-off, pulse-trickle, and
voltage hold-off time.
Charging output status
LED
BAT
Functional Description
Open-drain output that indicates the charging
status.
Figure 2 shows a state diagram and Figure 3 shows a
block diagram of the bq2002/F.
Battery input voltage
Battery Voltage and Temperature
Measurements
The battery voltage sense input. The input to
this pin is created by a high-impedance re-
sistor divider network connected between
the positive and negative terminals of the
battery.
Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
the battery sense input, BAT, should represent a
single-cell potential for the battery under charge.
resistor-divider ratio of
A
System ground
VSS
TS
RB1
RB2
Temperature sense input
= N - 1
Input for an external battery temperature
monitoring thermistor.
is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat-
tery terminal. See Figure 1.
Supply voltage input
5.0V 20% power input.
Charge inhibit input
VCC
INH
Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1 MΩ.
When high, INH suspends the fast charge in
progress. When returned low, the IC re-
sumes operation at the point where initially
suspended.
A ground-referenced negative temperature coefficient
thermistor placed near the battery may be used as a low-
cost temperature-to-voltage transducer. The temperature
sense voltage input at TS is developed using a resistor-
thermistor network between VCC and VSS. See Figure 1.
V
CC
PACK +
RT
V
RB1
RB2
R3
R4
CC
BAT
TM
T
S
N
T
bq2002/F
bq2002/F
C
V
SS
V
SS
BAT pin connection
Mid-level
setting for TM
NTC = negative temperature coefficient thermistor.
Thermistor connection
Fg2002/F01.eps
Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration
2
bq2002/F
Chip on
4.0V
Battery
Voltage?
V
CC
V
> 2V
BAT
V
< 2V
BAT
V
> V /2
V < V /2
TS CC
TS
CC
Battery
Temperature?
V
CC
2V
V
V
> 2V
BAT
TS
< V /2
CC
((PVD or - V or
Maximum Time-Out)
and TM = high)
Fast
LED = Low
Trickle
LED = Z
Top-off
LED = Z
Maximum Time-Out
(PVD or - V or
Maximum Time-Out)
and TM = high
or
V
V
> 2V
BAT
TS
or
< V /2
CC
SD2002/F01
Figure 2. State Diagram
Clock
Phase
OSC
Generator
TM
Sample
History
Timing
Control
Voltage
Reference
INH
A to D
Converter
PVD, -∆V
ALU
Charge-Control
State Machine
MCV
Check
BAT
Power
Down
Power-On
Reset
TCO
Check
CC
LED
V
CC
TS
V
SS
Bd2002f.eps
Figure 3. Block Diagram
3
bq2002/F
V
CC
= 0
Fast Charging
Top-Off
(optional)
Pulse-Trickle
Fast Charging
286
s
s
286
CC Output
See
Table1
s
4576
Charge initiated by application of power
Charge initiated by battery replacement
LED
TD2002F1.eps
Figure 4. Charge Cycle Phases
If the battery voltage or temperature is outside of these
limits, the IC pulse-trickle charges until the next new
charge cycle begins.
Starting A Charge Cycle
Either of two events starts a charge cycle (see Figure 4):
1. Application of power to VCC or
Fast charge continues until termination by one or more of
the five possible termination conditions:
2. Voltage at the BAT pin falling through the maximum
cell voltage VMCV where
n
n
n
n
n
Peak voltage detection (PVD)
Negative delta voltage (-∆V)
Maximum voltage
VMCV = 2V 5%.
If the battery is within the configured temperature and
voltage limits, the IC begins fast charge. The valid bat-
tery voltage range is VBAT < VMCV. The valid tempera-
ture range is VTS > VTCO where
Maximum temperature
Maximum time
VTCO = 0.5 ∗ VCC 5%.
Table 1. Fast-Charge Safety Time/Hold-Off Table
Typical Fast-Charge
and Top-Off
Time Limits
Pulse-
Trickle
Period
(ms)
Corresponding
Fast-Charge
Rate
(minutes)
Typical PVD
Pulse-
and -∆V Hold-Off Top-Off Trickle
bq2002
bq2002F
160
TM
Mid
Low
High
Termination
PVD
Time (seconds)
Rate
Rate
C/64
C/64
C/32
C/2
1C
2C
160
80
600
300
150
C/32
9.15
18.3
18.3
PVD
100
C/16
-∆V
40
40
Disabled
Notes:
Typical conditions = 25°C, VCC = 5.0V.
Mid = 0.5 VCC 5V
*
Tolerance on all timing is 20%.
4
bq2002/F
pin is modulated at a duty cycle of 286µs active for
every 4290µs inactive. This modulation results in an
average rate 1/16th that of the fast charge rate. Maxi-
mum voltage, time, and temperature are the only ter-
mination methods enabled during top-off.
PVD and -∆V Termination
There are two modes for voltage termination depending
on the state of TM. For -∆V (TM = high), if VBAT is
lower than any previously measured value by 12mV
3mV, fast charge is terminated. For PVD (TM = low or
mid), a decrease of 2.5mV 2.5mV terminates fast
charge. The PVD and -∆V tests are valid in the range
1V < VBAT < 2V.
Pulse-Trickle Charge
Pulse-trickle is used to compensate for self-discharge
while the battery is idle in the charger. The battery is
pulse-trickle charged by driving the CC pin active for a
period of 286µs for every 18.0ms of inactivity for 1C and
2C selections, and 286µs for every 8.86ms of inactivity
for C/2 selection. This results in a trickle rate of C/64
for the top-off enabled mode and C/32 otherwise.
Voltage Sampling
Voltage is sampled at the BAT pin for PVD and -∆V ter-
mination once every 17s. The sample is an average of
voltage measurements taken 57µs apart. The IC takes
32 measurements in PVD mode and 16 measurements
in -∆V mode. The resulting sample periods (9.17 and
18.18ms, respectively) filter out harmonics centered
around 55 and 109Hz. This technique minimizes the ef-
fect of any AC line ripple that may feed through the
power supply from either 50 or 60Hz AC sources. Toler-
ance on all timing is 20%.
TM Pin
The TM pin is a three-level pin used to select the
charge timer, top-off, voltage termination mode, trickle
rate, and voltage hold-off period options. Table 1 de-
scribes the states selected by the TM pin. The mid-
level selection input is developed by a resistor di-
vider between VCC and ground that fixes the voltage
on TM at VCC/2 0.5V. See Figure 4.
Voltage Termination Hold-off
A hold-off period occurs at the start of fast charging.
During the hold-off time, the PVD and -∆V terminations
are disabled. This avoids premature termination on the
voltage spikes sometimes produced by older batteries
when fast-charge current is first applied. Maximum
voltage and temperature terminations are not affected
by the hold-off period.
Charge Status Indication
A fast charge in progress is uniquely indicated when the
LED pin goes low. The LED pin is driven to the high-Z
state for all conditions other than fast charge. Figure 2
outlines the state of the LED pin during charge.
Charge Inhibit
Maximum Voltage, Temperature, and Time
Fast charge and top-off may be inhibited by using the
INH pin. When high, INH suspends all fast charge and
top-off activity and the internal charge timer. INH
freezes the current state of LED until inhibit is re-
moved. Temperature monitoring is not affected by the
INH pin. During charge inhibit, the bq2002/F continues
to pulse-trickle charge the battery per the TM selection.
When INH returns low, charge control and the charge
timer resume from the point where INH became active.
Any time the voltage on the BAT pin exceeds the maxi-
mum cell voltage,VMCV, fast charge or optional top-off
charge is terminated.
Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold VTCO
.
Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/2, 1C, and 2C. Maximum time-out termina-
tion is enforced on the fast-charge phase, then reset, and
enforced again on the top-off phase, if selected. There is
no time limit on the trickle-charge phase.
Low-Power Mode
The IC enters a low-power state when VBAT is driven
above the power-down threshold (VPD) where
VPD = VCC - (1V 0.5V)
Top-off Charge
Both the CC pin and the LED pin are driven to the
high-Z state. The operating current is reduced to less
than 1µA in this mode. When VBAT returns to a value
below VPD, the IC pulse-trickle charges until the next
new charge cycle begins.
An optional top-off charge phase may be selected to
follow fast charge termination for 1C and C/2 rates.
This phase may be necessary on NiMH or other bat-
tery chemistries that have a tendency to terminate
charge prior to reaching full capacity. With top-off en-
abled, charging continues at a reduced rate after
fast-charge termination for a period of time selected
by the TM pin. (See Table 1.) During top-off, the CC
5
bq2002/F
Absolute Maximum Ratings
Symbol
VCC
Parameter
VCC relative to VSS
Minimum
Maximum
Unit
Notes
-0.3
+7.0
V
DC voltage applied on any pin
excluding VCC relative to VSS
VT
-0.3
+7.0
V
TOPR
Operating ambient temperature
Storage temperature
0
-40
-
+70
+85
°C
°C
°C
°C
Commercial
TSTG
TSOLDER
TBIAS
Soldering temperature
+260
+85
10 sec max.
Temperature under bias
-40
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional opera-
tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo-
sure to conditions beyond the operational limits for extended periods of time may affect device reliability.
DC Thresholds (T = 0 to 70°C; V
20%)
CC
A
Symbol
Parameter
Rating
Tolerance
Unit
Notes
VTS ≤ VTCO inhibits/terminates
fast charge and top-off
0.5 VCC
*
VTCO
Temperature cutoff
V
5%
VBAT ≥ VMCV inhibits/terminates
fast charge and top-off
VMCV
-∆V
Maximum cell voltage
2
V
5%
3
BAT input change for
-∆V detection
-12
-2.5
mV
mV
BAT input change for
PVD detection
PVD
2.5
6
bq2002/F
Recommended DC Operating Conditions (T = 0 to 70°C)
A
Symbol
VCC
Condition
Supply voltage
Minimum
Typical
Maximum
Unit
V
Notes
4.0
1
5.0
6.0
2
VDET
VBAT
VTS
-∆V, PVD detect voltage
Battery input
-
-
-
-
-
V
0
VCC
VCC
-
V
Thermistor input
Logic input high
Logic input high
0.5
0.5
V
VTS < 0.5V prohibited
V
INH
TM
VIH
V
CC - 0.5
-
V
VCC
2
VCC
- 0.5
+ 0.5
VIM
Logic input mid
-
V
TM
2
Logic input low
Logic input low
Logic output low
-
-
-
-
-
-
0.1
0.5
0.8
V
V
V
INH
VIL
TM
VOL
LED, CC, IOL = 10mA
VBAT ≥ VPD max. powers
down bq2002/F;
VPD
VCC - 1.5
VCC - 0.5
Power down
-
V
V
BAT < VPD min. =
normal operation.
Outputs unloaded,
µA
µA
ICC
Supply current
-
-
250
VCC = 5.1V
ISB
IOL
IL
Standby current
LED, CC sink
Input leakage
-
10
-
-
-
-
1
-
VCC = 5.1V, VBAT = VPD
mA @VOL = VSS + 0.8V
1
µA
µA
INH, CC, V = VSS to VCC
LED, CC
Output leakage in
high-Z state
IOZ
-5
-
-
Note:
All voltages relative to VSS.
7
bq2002/F
Impedance
Symbol
Parameter
Minimum
Typical
Maximum
Unit
MΩ
MΩ
RBAT
RTS
Battery input impedance
TS input impedance
50
50
-
-
-
-
Timing (TA = 0 to +70°C; VCC 10%)
Symbol
dFCV
Parameter
Minimum Typical Maximum
-20 20
Unit
Notes
Base time variation
-
%
Note:
Typical is at TA = 25°C, VCC = 5.0V.
8
bq2002/F
(
)
8-Pin DIP PN
(
)
8-Pin PN 0.300" DIP
Inches
Millimeters
Dimension
Min.
Max.
0.180
0.040
0.022
0.065
0.013
0.380
0.325
0.280
0.370
0.110
0.150
0.040
Min.
4.06
0.38
0.38
1.40
0.20
8.89
7.62
5.84
7.62
2.29
2.92
0.51
Max.
4.57
1.02
0.56
1.65
0.33
9.65
8.26
7.11
9.40
2.79
3.81
1.02
D
A
A1
B
0.160
0.015
0.015
0.055
0.008
0.350
0.300
0.230
0.300
0.090
0.115
0.020
B1
C
E1
E
A
B1
D
A1
E
L
E1
e
C
G
B
S
L
e
G
S
9
bq2002/F
8-Pin SOIC Narrow (SN)
(
)
8-Pin SN 0.150" SOIC
Inches
Millimeters
Min.
Dimension
Min.
Max.
0.070
0.010
0.020
0.010
0.200
0.160
0.055
0.245
0.035
Max.
1.78
0.25
0.51
0.25
5.08
4.06
1.40
6.22
0.89
A
A1
B
0.060
0.004
0.013
0.007
0.185
0.150
0.045
0.225
0.015
1.52
0.10
0.33
0.18
4.70
3.81
1.14
5.72
0.38
C
D
E
e
H
L
10
bq2002/F
Data Sheet Revision History
Change No.
Page No.
Description
Nature of Change
Was: Table 1 gave the bq2002/F Operational Summary.
Is: Figure 2 gives the bq2002/F Operational Summary.
1
3
Changed table to figure.
Added column and values.
1
2
3
5
All
1
Added Termination column to table and Top-off values.
Revised and expanded this data sheet to include bq2002F
Addition of selection guide
Notes:
Change 1 = Sept. 1996 B changes from July 1994.
Change 2 = Aug. 1997 C changes from Sept. 1996 B.
Change 3 = Jan. 1999 D changes from Aug. 1997 C.
Ordering Information
bq2002/F
Package Option:
PN = 8-pin plastic DIP
SN = 8-pin narrow SOIC
Device:
bq2002 Fast-Charge IC
bq2002F Fast-Charge IC
11
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Copyright © 1999, Texas Instruments Incorporated
12
相关型号:
BQ2002ESNTRG4
NiCd/NiMH Charge Controller with Negative dV and Peak Voltage Detection Termination 8-SOIC 0 to 70
TI
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