BQ21040 [TI]
单节锂电池充电芯片;
| 型号： | BQ21040 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 单节锂电池充电芯片 电池 |
| 文件： | 总31页 (文件大小：4097K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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bq21040
ZHCSEZ6C –APRIL 2016–REVISED AUGUST 2017
bq21040 0.8A、单输入、单节锂离子和锂聚合物电池充电器
1 特性
3 说明
1
•
充电中
bq21040 器件是一款面向空间受限类便携式应用的高
度集成锂离子和锂聚合物线性 电池充电器的理想选
择。此器件可由一个 USB 端口或交流适配器供电运
行。具有输入过压保护的高输入电压范围支持低成本、
未稳压的适配器。
–
–
–
–
充电电压精度为 1%
10% 充电电流精度
低电池泄漏电流 (1µA)
可通过外部电阻编程设定的充电电流最高可达
800mA
bq21040 具有一个可为电池充电的单电源输出。如果
在 10 小时的安全定时器期间内平均系统负载无法让电
池充满电，则可以使系统负载与电池并联。
–
4.2V 锂离子和锂聚合物充电器
•
保护
–
–
–
–
–
–
30V 额定输入电压；具有 6.6V 输入过压保护
电池充电经历以下三个阶段：调节，恒定电流和恒定电
压。在所有充电阶段，内部控制环路都会监控 IC 结
温，当其超过内部温度阈值时，它会减少充电电流。
输入电压动态电源管理
125°C 热调节；150°C 热关断保护
OUT 短路保护和 ISET 短路检测
通过负温度系数 (NTC) 实现过热感测保护
10 小时固定安全定时器
充电器功率级和充电电流感测功能均完全集成。该充电
器具有高精度电流和电压调节环路功能、充电状态显
示，和充电终止功能。预充电电流阈值和终止电流阈值
分别固定为 20% 和 10%。快速充电电流值可通过一个
外部电阻进行编程。
•
系统
–
–
状态指示 - 充电/完成
采用小型小外形尺寸晶体管 (SOT)-23 封装
器件信息(1)
2 应用
器件型号
bq21040
封装
封装尺寸（标称值）
•
•
•
•
电子销售点 (EPOS)
SOT-23 (6)
3.00mm x 1.75mm
医疗内窥镜
(1) 要了解所有可用封装，请参阅数据表末尾的可订购产品附录。
BLE 扬声器和耳机
低功耗手持器件
简化电路原理图
bq21040
VIN
VOUT
VIN
BAT
TEMP
System
Load
PACK+
1 µF
1 µF
+
œ
RCHG
NTC
ISET
TS
RISET
PACKœ
GND
CHG
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLUSCE2
bq21040
ZHCSEZ6C –APRIL 2016–REVISED AUGUST 2017
www.ti.com.cn
目录
8.3 Feature Description................................................. 10
8.4 Device Functional Modes........................................ 13
Application and Implementation ........................ 17
9.1 Application Information............................................ 17
9.2 Typical Application .................................................. 17
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison ............................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
7.1 Absolute Maximum Ratings ...................................... 3
7.2 ESD Ratings ............................................................ 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 4
7.6 Timing Requirements................................................ 6
9
10 Power Supply Recommendations ..................... 22
11 Layout................................................................... 22
11.1 Layout Guidelines ................................................. 22
11.2 Layout Example .................................................... 22
11.3 Thermal Considerations........................................ 23
12 器件和文档支持 ..................................................... 24
12.1 接收文档更新通知 ................................................. 24
12.2 社区资源................................................................ 24
12.3 商标....................................................................... 24
12.4 静电放电警告......................................................... 24
12.5 Glossary................................................................ 24
13 机械、封装和可订购信息....................................... 24
7.7 Typical Operational Characteristics (Protection
Circuits Waveforms)................................................... 7
8
Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 9
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision B (May 2017) to Revision C
Page
•
•
•
•
•
•
•
•
•
•
•
•
已更改 简化电路原理图 .......................................................................................................................................................... 1
Changed 250 kΩ to 237 kΩ in TS pin description.................................................................................................................. 3
Changed RTS max from 25.8 kΩ to 258 kΩ............................................................................................................................ 4
Changed Low temperature charging to Normal temperature charging in VTS-0C Test Conditions.......................................... 6
Changed low temperature charging to normal temperature charging in VHYS-0C Test Conditions ......................................... 6
Changed High temperature charging to Normal temperature charging in VTS-45C Test Conditions ....................................... 6
Changed high temperature charging to normal temperature charging in VHYS-45C Test Conditions ...................................... 6
已删除 Load Regulation graph .............................................................................................................................................. 7
已删除 Line Regulation graph ................................................................................................................................................ 7
已更改 图 6 .......................................................................................................................................................................... 11
已删除 The bq21040 does not have a safety timer. in Timers ............................................................................................. 15
已更改 图 10 ........................................................................................................................................................................ 17
Changes from Revision A (April 2016) to Revision B
Page
•
•
更改了电气特性 表中的最小值和最大值，更改了快速充电电流系数 KISET 的最小值和最大值 ............................................. 1
已添加 接收文档更新通知 部分............................................................................................................................................... 1
2
Copyright © 2016–2017, Texas Instruments Incorporated
bq21040
www.ti.com.cn
ZHCSEZ6C –APRIL 2016–REVISED AUGUST 2017
5
Device Comparison
PART NO.
VO(REG)
VOVP
TS
PACKAGE
bq21040
4.20 V
6.6 V
TS
3.00 mm × 1.75 mm × 1.45 mm SOT-23
6 Pin Configuration and Functions
DBV Package
6-Pin SOT-23
Top View
TS
OUT
CHG
1
6
5
4
VIN
2
3
GND
ISET
Pin Functions
PIN
I/O
DESCRIPTION
NAME
CHG
NO.
3
Low (FET on) indicates charging and Open Drain (FET off) indicates no Charging or Charge
complete.
O
—
I
GND
ISET
5
Ground terminal
Programs the Fast-charge current setting. External resistor from ISET to VSS defines fast charge
current value. Range is 10.8kΩ (50mA) to 675Ω (800mA).
4
Battery connection. System load may be connected. Expected range of bypass capacitors 1μF to
10μF.
OUT
2
1
6
O
Temperature sense terminal connected to bq21040 -10k at 25°C NTC thermistor, in the battery
pack. Floating T terminal or pulling High puts part in TTDM “Charger” Mode and disable TS
monitoring, Timers and Termination. Pulling terminal Low disables the IC. If NTC sensing is not
needed, connect this terminal to VSS through an external 10 kΩ resistor. A 237 kΩ from TS to
ground will prevent IC entering TTDM mode when battery with thermistor is removed.
TS
I
Input power, connected to external DC supply (AC adapter or USB port). Expected range of
VIN
I
bypass capacitors 1μF to 10μF, connect from IN to VSS
.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
(2)
MIN
–0.3
–0.3
–0.3
MAX
30
UNIT
V
IN (with respect to VSS)
Input voltage
OUT (with respect to VSS)
7
V
PRE-TERM, ISET, ISET2, TS, /CHG (with respect to VSS)
7
V
Input current
IN
1.25
1.25
15
A
Output current (continuous)
Output sink current
OUT
CHG
A
mA
°C
°C
Junction temperature, TJ
Storage temperature, Tstg
–40
–65
150
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal unless otherwise noted.
Copyright © 2016–2017, Texas Instruments Incorporated
3
bq21040
ZHCSEZ6C –APRIL 2016–REVISED AUGUST 2017
www.ti.com.cn
7.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±1000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(2)
±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
3.5
NOM
MAX
28
UNIT
V
IN voltage range
VIN
IN operating voltage range, restricted by VDPM and VOVP
Input current, IN terminal
4.45
6.45
0.8
V
IIN
A
IOUT
TJ
Current, OUT terminal
0.8
A
Junction temperature
0
0.675
1.66
125
10.8
258
°C
kΩ
kΩ
RISET
RTS
Fast-charge current programming resistor
10k NTC thermistor range without entering TTDM
7.4 Thermal Information
bq21040
THERMAL METRIC(1)
DBV (SOT-23)
6 PINS
130.8
75.2
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
45.5
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
31.8
ψJB
45.5
RθJC(bot)
n/a
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
UVLO
Undervoltage lockout exit
VIN: 0 V to 4 V
VIN: 0 V to 4 V, VUVLO_FALL
VUVLO_RISE – VHYS-UVLO
3.15
175
3.3
3.45
280
V
=
VHYS-UVLO
Hysteresis on VUVLO_RISE falling
Input power good detection
227
mV
(Input power good if VIN > VOUT + VIN-
DT); VOUT = 3.6 V, VIN: 3.5 V to 4 V
VIN-DT
30
80
31
145
6.8
mV
mV
V
threshold is VOUT
+
VIN-DT
VHYS-INDT
VOVP
Hysteresis on VIN-DT falling
VOUT = 3.6 V, VIN: 4 V to 3.5 V
Input overvoltage protection
threshold
VIN: 5 V to 12 V
6.5
6.65
95
VHYS-OVP
Hysteresis on OVP
VIN: 11 V to 5 V
mV
Adaptor low input voltage
protection. Restricts lout at VIN-
DPM
Feature active in adaptor mode; Limit
Input Current to 50 mA; VOUT = 3.5 V;
RISET = 825
VIN-DPM
4.24
4.3
4.46
500
V
ISET SHORT CIRCUIT TEST
Highest resistance considered a
RISET: 250 Ω to 540 Ω, Iout latches off.
Cycle power to reset
RISET_SHORT
fault (short). Monitored for
IOUT>90mA
Ω
4
Copyright © 2016–2017, Texas Instruments Incorporated
bq21040
www.ti.com.cn
ZHCSEZ6C –APRIL 2016–REVISED AUGUST 2017
Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Maximum OUT current limit
regulation (clamp)
VIN = 5 V, VOUT = 3.6 V, RISET: 250 Ω to
540 Ω, Iout latches off after tDGL-SHORT
IOUT_CL
1.05
1.4
A
BATTERY SHORT PROTECTION
OUT terminal short-circuit detection
threshold/precharge threshold
VOUT(SC)
Vout:3V to 0.5V, no deglitch
0.75
10
0.8
77
15
0.85
20
V
Recovery ≥ VOUT(SC) + VOUT(SC-HYS)
Rising, no deglitch
;
VOUT(SC-HYS)
IOUT(SC)
OUT terminal short hysteresis
mV
mA
Source current to OUT terminal
during short-circuit detection
QUIESCENT CURRENT
IOUT(PDWN)
IOUT(DONE)
IIN(STDBY)
ICC
Battery current into OUT terminal
VIN = 0V
1
6
µA
µA
µA
µA
OUT pin current, charging
terminated
VIN = 6 V, VBAT > VBAT(REG), net current
is into OUT pin
Standby current into IN pin
TS = Low, VIN ≤ 6 V
125
1000
TS = Low, VIN = 6 V, no load on OUT
pin, VBAT > VBAT(REG)
Active supply current, IN pin
BATTERY CHARGER FAST-CHARGE
VOUT(REG)
Battery regulation voltage
VREG = 4.2 V, IL = 25 mA, VIN = 5.5 V
4.16
10
4.2
4.23
800
V
Programmed output fast charge
current range
VOUT(REG) > VOUT > VLOWV; VIN = 5 V,
RISET = 0.675 to 52 kΩ
IOUT(RANGE)
mA
Adjust VIN down until IOUT = 0.5 A, VOUT
= 4.15 V, RISET = 1.08kΩ
VDO(IN-OUT)
IOUT
Drop-Out, VIN – VOUT
325
550
mV
A
KISET/
RISET
KISET/
RISET
KISET/
RISET
Output fast charge formula
VOUT(REG) > VOUT > VLOWV; VIN = 5 V
KISET (60mA < I <1000mA)
KISET (25mA < I < 60mA)
KISET (10mA < I < 25mA)
490
470
340
540
527
520
590
605
685
KISET
Fast charge current factor
AΩ
PRECHARGE
Pre-charge to fast-charge transition
threshold
VLOWV
2.4
18
2.5
20
2.6
V
Pre-charge
Default pre-charge current
VBAT < VLOWV, ICHG = 50 mA
22 %ISET
TERMINATION
Termination Threshold Current,
default setting
%IOUT-
CC
%TERM
VOUT > VRCH; RISET = 1 kΩ
9
10
11
RECHARGE OR REFRESH
VIN = 5 V, VTS = 0.5 V, VOUT = 4.25 V to VO(REG)
-
VO(REG)
95 mV
-
VO(REG)
70 mV
-
VRCH
Recharge detection threshold
mV
VRCH
120 mV
BATT DETECT
VREG-BD
IBD-SINK
VOUT Reduced regulation during
battery detect
VO(REG)
450 mV
-
VO(REG)
400 mV
- VO(REG) -
mV
mA
V
350 mV
VIN = 5 V, VTS = 0.5 V, battery absent
Sink current during VREG-BD
7
10
VO(REG)
150 mV
- VO(REG) - VO(REG) -
VBD-HI
High battery detection threshold
100 mV
50 mV
VIN = 5 V, VTS = 0.5 V, battery absent
VREG-
BD+0.50
VREG-
BD+0.1 BD+0.15
VREG-
VBD-LO
Low battery detection threshold
V
BATTERY-PACK NTC MONITOR
INTC 50µA
NTC bias current
48
27
50
30
53
34
µA
µA
10K NTC bias current when
charging is disabled
INTC-DIS-10K
VTS = 0 V
INTC is reduced prior to entering
INTC-FLDBK -10K TTDM to keep cold thermistor from VTS = 1.525 V
entering TTDM
4
5
6.5
µA
Copyright © 2016–2017, Texas Instruments Incorporated
5
bq21040
ZHCSEZ6C –APRIL 2016–REVISED AUGUST 2017
www.ti.com.cn
Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Termination and timer disable
mode-Threshold-Enter
VTTDM(TS)
VTS: 0.5 V to 1.7 V; timer held in reset
1550
1600
1650
mV
IHYS-TTDM(TS)
VCLAMP(TS)
Hysteresis exiting TTDM
VTS: 1.7 V to 0.5 V; timer enabled
VTS = Open (float)
100
mV
mV
TS maximum voltage clamp
1800
1220
1950
2000
TS voltage where INTC is reduce to INTC adjustment (90 to 10%; 45 to 6.6
keep thermistor from entering
TTDM
VTS_I-FLDBK
µs) takes place near this spec
threshold. VTS: 1.425 V to 1.525 V
1475
mV
CTS
Optional capacitance – ESD
0.22
µF
Normal temperature charging to
pending; VTS: 1 V to 1.5 V
VTS-0C
Low temperature CHG pending
1250
1280
mV
Charge pending to normal temperature
charging; VTS: 1.5 V to 1 V
VHYS-0C
VTS-45C
Hysteresis at 0°C
100
275
mV
mV
Normal temperature charging to
pending; VTS: 0.5 V to 0.2 V
High temperature CHG disable
Hysteresis at 45°C
260
80
290
96
Charge pending to normal temperature
charging; VTS: 0.2 V to 0.5 V
VHYS-45C
20
88
12
mV
mV
mV
VTS-EN-10K
Charge enable threshold (10k NTC) VTS: 0 V to 0.175 V
HYS below VTS-EN-10k to disable
VTS: 0.125 V to 0 V
VTS-DIS_HYS-10K
(10k NTC)
THERMAL REGULATION
TJ(REG)
Temperature regulation limit
125
155
20
TJ(OFF)
Thermal shutdown temperature
Thermal shutdown hysteresis
°C
TJ(OFF-HYS)
CHG INDICATION
Output Low Voltage-CHG FET on -
first charge after power-up
VOL
ISINK = 5 mA
V CHG = 5 V
0.4
1
V
ILEAK
Leakage current into IC
µA
7.6 Timing Requirements
MIN NOM
MAX UNIT
INPUT
tDGL(OVP_SET)
tDGL(OVP_REC)
ISET SHORT CIRCUIT TEST
Deglitch time transition from ISET short Clear fault by disconnecting IN or cycling
to IOUT disable (high / low) TS
PRECHARGE – SET INTERNALLY
Deglitch time on pre-charge to fast-
Input over-voltage blanking time
VIN: 5 V to 12 V
113
30
µs
µs
Deglitch time exiting OVP
Time measured from VIN: 12V to 5V
tDGL_SHORT
1
ms
tDGL1(LOWV)
70
32
µs
charge transition
Deglitch time on fast-charge to pre-
charge transition
tDGL2(LOWV)
ms
TERMINATION
tDGL(TERM)
Deglitch time, termination detected
29
29
ms
ms
RECHARGE OR REFRESH
Deglitch time, recharge threshold
detected
VIN = 5 V, VTS = 0.5 V, VOUT: 4.25 V to 3.5
V in 1 µs; tDGL(RCHG) is time to ISET ramp
tDGL1(RCHG)
BATTERY DETECT ROUTINE
tDGL(HI/LOW REG) Regulation time at VREG or VREG-BD
BATTERY-PACK NTC MONITOR; TS TERMINAL
25
30
ms
ms
tDGL(TS)
Deglitch for TS thresholds: 0/45C.
Battery charging
6
Copyright © 2016–2017, Texas Instruments Incorporated
bq21040
www.ti.com.cn
ZHCSEZ6C –APRIL 2016–REVISED AUGUST 2017
7.7 Typical Operational Characteristics (Protection Circuits Waveforms)
SETUP: bq21040 typical applications schematic; VIN = 5V, VBAT = 3.6V (unless otherwise indicated)
4.212
546
V
at 0°C
R
= 100 Ω
O
OUT
Kiset
544
542
540
4.21
4.208
4.206
4.204
4.202
4.2
Low to High Currents
(may occur in recharge to fast charge transion)
V
at 25°C
at 85°C
O
538
536
534
High to Low Currents
(may occur in Voltage Regulation - Taper Current)
V
O
532
4.198
4.196
530
528
.15
4.5
5
5.5
6
6.5
0
0.2
0.4
0.6
0.8
V - Input Voltage DC - V
I
I
- Output Current - A
O
图 2. Line Regulation
图 1. Kiset for Low and High Currents
4.2
363.4
363.2
4.199
I
at 25°C
V
at 25°C
O
reg
363
4.198
4.197
V
at 85°C
reg
362.8
I
at 85°C
O
362.6
4.196
4.195
4.194
4.193
4.192
362.4
362.2
V
at 0°C
reg
I
at 0°C
O
362
361.8
2.5
3
3.5
4
4.5
0
0.2
0.4
0.6
0.8
1
I
- Output current - A
V
- Output Voltage - V
O
O
图 4. Current Regulation Over Temperature
图 3. Load Regulation Over Temperature
版权 © 2016–2017, Texas Instruments Incorporated
7
bq21040
ZHCSEZ6C –APRIL 2016–REVISED AUGUST 2017
www.ti.com.cn
8 Detailed Description
8.1 Overview
The bq21040 is a highly integrated single cell Li-Ion and Li-Pol charger. The charger can be used to charge a
battery, power a system or both. The charger has three phases of charging: Pre-charge to recover a fully
discharged battery, fast-charge constant current to supply the buck charge safely and voltage regulation to safely
reach full capacity. The charger is very flexible, allowing programming of the fast-charge current. This charger is
designed to work with a USB connection or Adaptor (DC out). The charger also checks to see if a battery is
present.
The charger also comes with a full set of safety features: Temperature Sensing Standard, Over-Voltage
Protection, DPM-IN, Safety Timers, and ISET short protection. All of these features and more are described in
detail below.
The charger is designed for a single power path from the input to the output to charge a single cell Li-Ion or
Li-Pol battery pack. Upon application of a 5VDC power source the ISET and OUT short checks are performed to
assure a proper charge cycle.
If the battery voltage is below the LOWV threshold, the battery is considered discharged and a preconditioning
cycle begins. The amount of the current goes into the battery during this phase is called pre-charge current. It is
fixed to 20% of the fast charge current.
Once the battery voltage has charged to the VLOWV threshold, fast charge is initiated and the fast charge
current is applied. The fast charge constant current is programmed using the ISET terminal. The constant current
provides the bulk of the charge. Power dissipation in the IC is greatest in fast charge with a lower battery voltage.
If the IC reaches 125°C the IC enters thermal regulation, slows the timer clock by half and reduce the charge
current as needed to keep the temperature from rising any further. 图 5 shows the charging profile with thermal
regulation. Typically under normal operating conditions, the IC’s junction temperature is less than 125°C and
thermal regulation is not entered.
Once the cell has charged to the regulation voltage the voltage loop takes control and holds the battery at the
regulation voltage until the current tapers to the termination threshold. The termination current is set to 10% of
the fast charge current. The CHG terminal is low (LED on) during the first charge cycle only and turns off once
the termination threshold is reached, regardless if termination, for charge current, is enabled or disabled.
8
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8.2 Functional Block Diagram
Internal Charge Current Sense
w/Multiple Outputs
IN
OUT
+
-
80 mV
Input
Power
Detect
IN
OUT
-
+
-
+
-
OUT
IN,DPM
VO,REG
+
Charge
Pump
IOUT x 1.5V
540 AΩ
TjC
-
Fast Charge
Pre-Charge
125 CREF
+
ISET
IN
+
-
1.5V
Pre-CHG Reference
75uA
Term Reference
TjC
+
_
+
_
150 CREF
Charge
Pump
Thermal Shutdown
+
_
IN
+
_
X2 Gain (1:2)
Term: Pre-CHGX2
OVPREF
CHG
On During 1st
Charge Only
VREF_0C_COLD
_
+
ON
OFF:
TS_0C
CHARGE
CONTROL
VREF_45C_HOT
_
+
TS_45C
_
+
TTDM MODE
TS
TS Cold Temperature
Sink Current
TS Disable
Sink Current
VTTDM
45uA
V
CLAMP
+
20uA
+
_
_
5uA
45uA
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8.3 Feature Description
Thermal
Regulation
Phase
Current
Regulation
Phase
Voltage Regulation and
Charge Termination
Phase
Pre-
Conditioning
Phase
DONE
V
O(REG)
I
O(OUT)
Battery Current,
I
FAST-CHARGE
CURRENT
(OUT)
Battery
Voltage,
V
(OUT)
Charge
Complete
Status,
Charger
Off
PRE-CHARGE
CURRENT AND
TERMINATION
THRESHOLD
V
O(LOWV)
I
(TERM)
I
O(PRECHG)
T
(THREG)
0A
Temperature, Tj
T
DONE
(CHG)
T
(PRECHG)
图 5. Charging Profile With Thermal Regulation
8.3.1 Power-Down or Undervoltage Lockout (UVLO)
The bq21040 is in power-down mode if the IN terminal voltage is less than UVLO. The part is considered “dead”
and all the terminals are high impedance. Once the IN voltage rises above the UVLO threshold the IC will enter
Sleep Mode or Active mode depending on the OUT terminal (battery) voltage.
8.3.2 Power-up
The IC is alive after the IN voltage ramps above UVLO (see sleep mode), resets all logic and timers, and starts
to perform many of the continuous monitoring routines. Typically the input voltage quickly rises through the
UVLO and sleep states where the IC declares power good, starts the qualification charge at 100mA starts the
safety timer and enables the CHG terminal. See 图 6.
8.3.3 Sleep Mode
If the IN terminal voltage is between than VOUT+VDT and UVLO, the charge current is disabled, the safety timer
counting stops (not reset) and the CHG terminal is high impedance. As the input voltage rises and the charger
exits sleep mode, the safety timer continues to count, charge is enabled and the CHG terminal returns to its
previous state. See 图 7.
8.3.4 New Charge Cycle
A new charge cycle is started when a good power source is applied, performing a chip disable/enable (TS
terminal), exiting Termination and Timer Disable Mode (TTDM), detecting a battery insertion or the OUT voltage
dropping below the VRCH threshold. The CHG terminal is active low only during the first charge cycle, therefore
exiting TTDM or a dropping below VRCH will not turn on the CHG terminal FET, if the CHG terminal is already
high impedance.
10
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V
TS
1.8V
Normal
Operation
Cold
Fault
TTDM
Mode
Normal
Operation
TTDM
Mode
Cold
Fault
Normal
Operation
HOT
Fault
Normal
Operation
Disabled
Disabled
t
DGL(TTDM)
t
DGL(TTDM)
Enter
Enter
t
DGL(TTDM)
Exit
TTDM
t < t
Exit
DGL(TTDM)
TTDM
HYS
t
DGL(TS)
t
DGL(TS)
t
DGL(TS)
0°C
0°C
HYS
t
DGL(TS)
t
t
DGL(TS)
DGL(TS)
45°C
HYS
45°C
Dots Show Threshold Trip Points
followed by a deglitch time before
transitioning into a new mode.
EN
DIS
HYS
0V
t
Drawing Not to Scale
图 6. TS Battery Temperature Bias Threshold and Deglitch Timers
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Apply Input
Power
Is power good?
VBAT + VDT < VOVP &
VUVLO < VIN
No
Yes
No
Is chip enabled?
VTS > VEN
Yes
Set the Current Limit to 100 mA
and Start Charge Perform ISET &
OUT short tests
Yes
Set the charge current based on
ISET
Yes
Return to Charge
图 7. bq21040 Power-Up Flow Diagram
8.3.5 Overvoltage-Protection (OVP) – Continuously Monitored
If the input source applies an overvoltage, the pass FET, if previously on, turns off after a deglitch, tBLK(OVP). The
timer ends and the CHG terminal goes to a high impedance state. After the overvoltage returns to a normal
voltage, the timer continues, charge continues, and the CHG terminal goes low after a 25ms deglitch.
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8.3.6 CHG Terminal Indication
The charge terminal has an internal open drain FET which is on (pulls down to VSS) during the first charge only
(independent of TTDM) and is turned off once the battery reaches voltage regulation and the charge current
tapers to the termination threshold set by the PRE-TERM resistor. The bq21040 does not terminate charge,
however, the CHG terminal will turn off once the battery current reaches 10% of the programmed charge current.
The charge terminal is high impedance in sleep mode and OVP and returns to its previous state once the
condition is removed.
Cycling input power, pulling the TS terminal low and releasing or entering pre-charge mode causes the CHG
terminal to go reset (go low if power is good and a discharged battery is attached) and is considered the start of
a first charge.
8.4 Device Functional Modes
8.4.1 CHG LED Pull-up Source
For host monitoring, a pullup resistor is used between the STATUS terminal and the VCC of the host and for a
visual indication a resistor in series with an LED is connected between the STATUS terminal and a power
source. If the CHG source is capable of exceeding 7 V, a 6.2-V Zener should be used to clamp the voltage. If the
source is the OUT terminal, note that as the battery changes voltage, and the brightness of the LEDs vary.
表 1. Charging States and CHG LED
CHARGING STATE
First charge after VIN applied
Refresh charge
OVP
CHG FET/LED
ON
OFF
SLEEP
TEMP FAULT
ON for 1st Charge
8.4.2 IN-DPM (VIN-DPM or IN-DPM)
The IN-DPM feature is used to detect an input source voltage that is folding back (voltage dropping), reaching its
current limit due to excessive load. When the input voltage drops to the VIN-DPM threshold the internal pass FET
starts to reduce the current until there is no further drop in voltage at the input. This would prevent a source with
voltage less than VIN-DPM to power the out terminal. This works well with current limited adaptors and USB ports
as long as the nominal voltage is above 4.3 V. This is an added safety feature that helps protect the source from
excessive loads.
8.4.3 OUT
The Charger’s OUT terminal provides current to the battery and to the system, if present. This IC can be used to
charge the battery plus power the system, charge just the battery or just power the system (TTDM) assuming the
loads do not exceed the available current. The OUT terminal is a current limited source and is inherently
protected against shorts. If the system load ever exceeds the output programmed current threshold, the output
will be discharged unless there is sufficient capacitance or a charged battery present to supplement the
excessive load.
8.4.4 ISET
An external resistor is used to Program the Output Current (50 to 800 mA) and can be used as a current monitor.
RISET = KISET / IOUT
where
•
•
IOUT is the desired fast charge current;
KISET is a gain factor found in the electrical specification
(1)
For greater accuracy at lower currents, part of the sense FET is disabled to give better resolution. 图 1 shows the
transition from low current to higher current. Going from higher currents to low currents, there is hysteresis and
the transition occurs around 0.15 A.
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The ISET resistor is short protected and will detect a resistance lower than ≉340 Ω. The detection requires at
least 80mA of output current. If a “short” is detected, then the IC will latch off and can only be reset by cycling the
power. The OUT current is internally clamped to a maximum current between 1.05 A and 1.4 A and is
independent of the ISET short detection circuitry, as shown in 图 8. Also, see 图 23 and 图 24.
1.8
1.6
1.4
IOUT Internal Clamp Range
1.2
1
0.8
IOUT Programmed
max
0.6
ISET Short
Fault
0.4
Range
Non Restricted
Operating Area
min
0.2
0
100
1000
10000
ISET - W
图 8. Programmed/Clamped Out Current
8.4.5 TS
The TS function is designed to follow the temperature sensing standard for Li-Ion and Li-Pol batteries. There are
two thresholds, 45°C and 0°C. Normal operation occurs between 0°C and 45°C.
The TS feature is implemented using an internal 50μA current source to bias the thermistor (designed for use
with a 10k NTC β = 3370 (SEMITEC 103AT-2 or Mitsubishi TH05-3H103F) connected from the TS terminal to
VSS. If this feature is not needed, a fixed 10kΩ can be placed between TS and VSS to allow normal operation.
This may be done if the host is monitoring the thermistor and then the host would determine when to pull the TS
terminal low to disable charge.
The TS terminal has two additional features, when the TS terminal is pulled low or floated/driven high. A low
disables charge (similar to a high on the BAT_EN feature) and a high puts the charger in TTDM.
Above 45°C or below 0°C the charge is disabled. Once the thermistor reaches ≉–10°C the TS current folds back
to keep a cold thermistor (between –10°C and –50°C) from placing the IC in the TTDM mode. If the TS terminal
is pulled low into disable mode, the current is reduce to ≉30μA, see 图 6. Since the ITS curent is fixed along with
the temperature thresholds, it is not possible to use thermistor values other than the 10k NTC (at 25°C).
8.4.6 Termination and Timer Disable Mode (TTDM) - TS Terminal High
The battery charger is in TTDM when the TS terminal goes high from removing the thermistor (removing battery
pack/floating the TS terminal) or by pulling the TS terminal up to the TTDM threshold.
When entering TTDM, the 10 hour safety timer is held in reset and termination is disabled. A battery detect
routine is run to see if the battery was removed or not. If the battery was removed then the CHG terminal will go
to its high impedance state if not already there. If a battery is detected the CHG terminal does not change states
until the current tapers to the termination threshold, where the CHG terminal goes to its high impedance state if
not already there (the regulated output will remain on).
The charging profile does not change (still has pre-charge, fast-charge constant current and constant voltage
modes). This implies the battery is still charged safely and the current is allowed to taper to zero.
14
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When coming out of TTDM, the battery detect routine is run and if a battery is detected, then a new charge cycle
begins and the CHG LED turns on.
If TTDM is not desired upon removing the battery with the thermistor, one can add a 237k resistor between TS
and VSS to disable TTDM. This keeps the current source from driving the TS terminal into TTDM. This creates
≉0.1°C error at hot and a ≉3°C error at cold.
8.4.7 Timers
The pre-charge timer is set to 30 minutes. The pre-charge current, can be programmed to off-set any system
load, making sure that the 30 minutes is adequate.
The fast charge timer is fixed at 10 hours and can be increased real time by going into thermal regulation, IN-
DPM or if in USB current limit. The timer clock slows by a factor of 2, resulting in a clock than counts half as fast
when in these modes. If either the 30 minute or ten hour timer times out, the charging is terminated and the CHG
terminal goes high impedance if not already in that state. The fast charge timer is reset by disabling the IC,
cycling power or going into and out of TTDM.
8.4.8 Termination
Once the OUT terminal goes above VRCH, (reaches voltage regulation) and the current tapers down to the
termination threshold (10% of the fast charge current), the CHG terminal goes high impedance and a battery
detect route is run to determine if the battery was removed or the battery is full. If the battery is present, the
charge current will terminate. If the battery was removed along with the thermistor, then the TS terminal is driven
high and the charge enters TTDM. If the battery was removed and the TS terminal is held in the active region,
then the battery detect routine will continue until a battery is inserted.
8.4.9 Battery Detect Routine
The battery detect routine should check for a missing battery while keeping the OUT terminal at a useable
voltage. Whenever the battery is missing the CHG terminal should be high impedance.
The battery detect routine is run when entering and exiting TTDM to verify if battery is present, or run all the time
if battery is missing and not in TTDM. On power-up, if battery voltage is greater than VRCH threshold, a battery
detect routine is run to determine if a battery is present.
The battery detect routine is disabled while the IC is in TTDM, or has a TS fault. See 图 9 for the Battery Detect
Flow Diagram.
8.4.10 Refresh Threshold
After termination, if the OUT terminal voltage drops to VRCH (100mV below regulation) then a new charge is
initiated, but the CHG terminal remains at a high impedance (off).
8.4.11 Starting a Charge on a Full Battery
The termination threshold is raised by ≉14%, for the first minute of a charge cycle so if a full battery is removed
and reinserted or a new charge cycle is initiated, that the new charge terminates (less than 1 minute). Batteries
that have relaxed many hours may take several minutes to taper to the termination threshold and terminate
charge.
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Start
BATT_DETECT
Start 25ms timer
No
Timer Expired?
Yes
Battery Present
Turn off Sink Current
Return to flow
Yes
Is VOUT<VREG-100mV?
No
Set OUT REG
to VREG-400mV
Enable sink current
Reset & Start 25ms timer
No
Timer Expired?
Yes
Yes
Battery Present
Turn off Sink Current
Return to flow
Is VOUT>VREG-300mV?
No
Battery Absent
Don’t Signal Charge
Turn off Sink Current
Return to Flow
图 9. Battery Detect Routine (bq21040)
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9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The bq21040 device is a highly integrated Li-Ion and Li-Pol linear charger device targeted at space-limited
portable applications. The device operates from either a USB port or AC adapter. The high input voltage range
with input overvoltage protection supports low-cost unregulated adapters. This device has a single power output
that charges the battery. A system load can be placed in parallel with the battery as long as the average system
load does not keep the battery from charging fully during the 10 hour safety timer.
9.2 Typical Application
IOUT_FAST_CHG = 540mA; IOUT_PRE_CHG = 108mA; IOUT_TERM = 54mA
bq21040
VIN
VOUT
TS
VIN
BAT
TEMP
System
Load
PACK+
1 µF
1 µF
+
RCHG
œ
NTC
ISET
RISET
PACKœ
GND
CHG
Copyright © 2016, Texas Instruments Incorporated
图 10. Typical Application Circuit
9.2.1 Design Requirements
•
•
•
•
•
Supply voltage = 5 V
Fast charge current: IOUT-FC = 540 mA; ISET-terminal 2
Termination Current Threshold: %IOUT-FC = 10% of Fast Charge or about 54mA
Pre-Charge Current by default is twice the termination Current or about 108mA
TS – Battery Temperature Sense = 10k NTC (103AT)
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Typical Application (接下页)
9.2.2 Detailed Design Procedure
9.2.2.1 Calculations
9.2.2.1.1 Program the Fast Charge Current, ISET:
RISET = [K(ISET) / I(OUT)
]
(2)
From the Electrical Characteristics table:
•
•
K(SET) = 540AΩ
RISET = [540AΩ/0.54A] = 1.0 kΩ
Selecting the closest standard value, use a 1.0 kΩ resistor between ISET (terminal 16) and Vss.
9.2.2.1.2 Pre-Charge and Termination Current Thresholds, ITERM, and PRE-CHG
TERM = I(OUT) × 10%IOUT-FC
(3)
(4)
TERM = 540mA × 10% = 54mA
One can calculate the pre-charge current by using 20% of the fast charge current (factor of 2 difference).
PRE-Charge = I(OUT) × 20%IOUT-FC
(5)
(6)
PRE-Charge = 540mA × 20% = 108mA
9.2.2.1.3 TS Function
Use a 10k NTC thermistor in the battery pack (103AT).
To Disable the temp sense function, use a fixed 10k resistor between the TS (terminal 1) and Vss.
9.2.2.1.4 CHG
LED Status: connect a 1.5kΩ resistor in series with a LED between the OUT terminal and the CHG terminal.
Processor Monitoring: Connect a pull-up resistor between the processor’s power rail and the CHG terminal.
9.2.2.2 Selecting In and Out Terminal Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power terminal,
input and output terminals. Using the values shown on the application diagram, is recommended. After
evaluation of these voltage signals with real system operational conditions, one can determine if capacitance
values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast
high amplitude pulsed load applications. Note if designed for high input voltage sources (bad adaptors or wrong
adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values
so a 16V capacitor may be adequate for a 30V transient (verify tested rating with capacitor manufacturer).
18
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Typical Application (接下页)
9.2.3 Application Curves
SETUP: bq21040 typical applications schematic; VIN = 5V, VBAT = 3.6V (unless otherwise indicated)
图 11. Power-Up Timing
图 12. Power-Up Timing – No Battery or Load in TTDM
图 13. Start-Up in Thermal Regulation
图 14. TS Entering and Leaving Cold Temperature
图 15. OVP 8-V Adaptor — Hot Plug
图 16. OVP From Normal Power-Up
Operation – VIN 0 V → 6 V → 7 V → 6 V→ 0 V
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Typical Application (接下页)
.
Fixed 10kΩ resistor, between TS and GND.
图 17. TS Enable and Disable
图 18. Power-Up Timing with No Battery and No Load –
Battery Detection
图 19. Battery Removal – GND Removed 1st, 42-Ω Load
图 20. Battery Removal With OUT and
TS Disconnect 1st, With 100-Ω Load
Continuous battery detection when not in TTDM
CH4: IOUT (1A/Div)
Battery voltage swept from 0V to 4.25V to 3.9V.
图 21. Battery Removal With Fixed TS = 0.5 V
图 22. Battery Charge Profile
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Typical Application (接下页)
CH4: IOUT (1A/Div)
CH4: IOUT (0.2A/Div)
图 23. ISET Shorted During Normal Operation
图 24. ISET Shorted Prior to USB Power-up
CH4: IOUT (0.2A/Div)
图 25. DPM – Adaptor Current Limits – VIN Regulated
图 26. DPM – USB Current Limits – VIN Regulated to 4.4 V
The IC temperature rises to 125°C and enters thermal
regulation. Charge current is reduced to regulate the IC at
125°C. VIN is reduced, the IC temperature drops, the charge
current returns to the programmed value
VIN swept from 5 V to 3.9 V to 5 V
VBAT = 4 V
.
图 28. Entering and Exiting UVLO
图 27. Charge Cycle With Thermal Regulation
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10 Power Supply Recommendations
The devices are designed to operate from an input voltage supply range between 3.5 V and 28 V and current
capability of at least the maximum designed charge current. This input supply should be well regulated. If located
more than a few inches from the bq21040 IN and GND terminals, a larger capacitor is recommended.
11 Layout
11.1 Layout Guidelines
To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq21040, with short
trace runs to both IN, OUT, and GND (thermal pad).
•
All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
•
•
The high current charge paths into IN terminal and from the OUT terminal must be sized appropriately for the
maximum charge current in order to avoid voltage drops in these traces
The bq21040 is packaged in a thermally-enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. It is
best to use multiple 10mil vias in the power pad of the IC and close enough to conduct the heat to the bottom
ground plane. The bottom ground place should avoid traces that “cut off” the thermal path. The thinner the
PCB the less temperature rise. The EVM PCB has a thickness of 0.031 inches and uses 2 oz. (2.8mil thick)
copper on top and bottom, and is a good example of optimal thermal performance.
11.2 Layout Example
图 29. Board Layout
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11.3 Thermal Considerations
The bq21040 is packaged in a thermally-enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad should
be directly connected to the VSS terminal. The most common measure of package thermal performance is
thermal impedance (RθJA) measured (or modeled) from the chip junction to the air surrounding the package
surface (ambient). The mathematical expression for ψJT is:
ψJT = (TJ – T) / P
where
•
•
•
TJ = Chip junction temperature
P = Device power dissipation
T = Case temperature
(7)
Factors that can influence the measurement and calculation of ψJT include:
1. Whether or not the device is board mounted
2. Trace size, composition, thickness, and geometry
3. Orientation of the device (horizontal or vertical)
4. Volume of the ambient air surrounding the device under test and airflow
5. Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-Ion and Li-Pol batteries the maximum power dissipation is typically seen at the
beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack
voltage increases to ≉3.4V within the first 2 minutes. The thermal time constant of the assembly typically takes a
few minutes to heat up so when doing maximum power dissipation calculations, 3.4V is a good minimum voltage
to use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of
the PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of
time. The fast charge current will start to taper off if the part goes into thermal regulation.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged:
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT)
(8)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or
higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop
is always active.
11.3.1 Leakage Current Effects on Battery Capacity
To determine how fast a leakage current on the battery will discharge the battery is an easy calculation. The time
from full to discharge can be calculated by dividing the Amp-Hour Capacity of the battery by the leakage current.
For a 0.75AHr battery and a 10μA leakage current (750 mAHr / 0.010 mA = 75000 hours), it would take 75k
hours or 8.8 years to discharge. In reality the self discharge of the cell would be much faster so the 10μA
leakage would be considered negligible.
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12 器件和文档支持
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收到任意产品信息更改每周摘要。有关更改的详细信息，请查看任意已修订文档中包含的修订历史记录。
12.2 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
12.3 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页中包括机械封装、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据发生变化时，
我们可能不会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本，请参阅左侧的导航栏。
24
版权 © 2016–2017, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
14-Aug-2017
PACKAGING INFORMATION
Orderable Device
BQ21040DBVR
BQ21040DBVT
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOT-23
SOT-23
DBV
6
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
130E
130E
ACTIVE
DBV
250
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
0 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
14-Aug-2017
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ21040DBVR
BQ21040DBVT
SOT-23
SOT-23
DBV
DBV
6
6
3000
250
178.0
178.0
9.0
9.0
3.23
3.23
3.17
3.17
1.37
1.37
4.0
4.0
8.0
8.0
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Aug-2017
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
BQ21040DBVR
BQ21040DBVT
SOT-23
SOT-23
DBV
DBV
6
6
3000
250
180.0
180.0
180.0
180.0
18.0
18.0
Pack Materials-Page 2
IMPORTANT NOTICE
重要声明
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TI 可能明确指定某些产品具备某些特定资格（例如 Q100、军用级或增强型产品）。设计人员同意，其具备一切必要专业知识，可以为自己的
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