BQ24061DRCTG4中文资料_数据手册_规格书

bq2406x

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SLUS689A–JUNE 2006–REVISED OCTOBER 2006

1A SINGLE-CHIP Li-Ion/Li-Pol CHARGE MANAGEMENT IC

WITH THERMAL REGULATION

FEATURES

DESCRIPTION

•

Ideal for Low-Dropout Designs for Single-Cell

Li-Ion or Li-Pol Packs in Space Limited

Applications

The bq2406x series are highly integrated Li-Ion and

Li-Pol linear chargers, targeted at space-limited

portable applications. The bq2406x series offers a

variety of safety features and functional options,

while still implementing a complete charging system

in a small package. The battery is charged in three

phases: conditioning, constant or thermally regulated

current, and constant voltage. Charge is terminated

•

Integrated Power FET and Current Sensor for

up to 1-A Charge Applications

Reverse Leakage Protection Prevents Battery

Drainage

based

on

minimum

current.

An

internal

backup

•

±0.5% Voltage Regulation Accuracy

programmable charge timer provides

a

Thermal Regulation Maximizes Charge Rate

safety feature for charge termination and is

dynamically adjusted during the thermal regulation

phase. The bq2406x automatically re-starts the

charge if the battery voltage falls below an internal

threshold; sleep mode is set when the external input

supply is removed. Multiple versions of this device

family enable easy design of the bq2406x in cradle

chargers or in the end equipment, while using low

cost or high-end AC adapters.

Charge Termination by Minimum Current and

Time

•

Precharge Conditioning With Safety Timer

Status Outputs for LED or System Interface

Indicate Charge, Fault, and Power Good

Outputs

•

Short-Circuit and Thermal Protection

Automatic Sleep Mode for Low Power

Consumption

Pin Out

(Top View)

•

Small 3×3 mm MLP Package

bq24061

Selectable Battery Insertion and Battery

Absent Detection

10

9

1

2

OUT

BAT

CE

IN

TMR

•

Input Overvoltage Protection

– 6.5 V and 10.5 V Options

8

7

6

3

4

5

STAT1

STAT2

V_SS

PG

APPLICATIONS

ISET

•

PDA, MP3 Players, Digital Cameras

•

Internet Appliances and Handheld Devices

TYPICAL APPLICATION CIRCUIT

Li-lon or Li-Pol

Battery Pack

bq24061

Input Power

Pack+

+

1

2

10

9

IN

OUT

BAT

R

TMR

4.7 mF

TMR

49.9 kW

Pack-

4.7 mF

1.5 kW 1.5 kW

3

8

STAT1

STAT2

CE

7

6

4

5

PG

V

SS

ISET

R

SET

1.13 kW

Typical Application for Charging Between 350 mA and 1 A.

Charge Enable and

Input Power Status

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains

PRODUCTION DATA information current as of publication date.

Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

bq2406x

www.ti.com

SLUS689A–JUNE 2006–REVISED OCTOBER 2006

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTIONS

Safety

Timer

Enable

Power

Good

Status

Pack Voltage

Detection

(Absent)

Charge Input Over Termination

IC

Enable

Pack

Temp

Devices^(1)(2)(3)

Marking

Voltage

Enable

TMR pin

TE pin

With timer

enabled

4.2 V

6.5 V

TMR pin

PG pin

No

TS pin

No

bq24060

bq24061

bq24063

bq24064

BPG

BPH

With timer

enabled

4.2 V

6.5 V

CE pin

No

With termination

enabled

4.2 V

6.5 V

No

Preview

BSA

With timer

enabled

4.2 V

10.5 V

TMR pin

PG pin

TS pin

(1) The bq2406x are only available taped and reeled. Add suffix R to the part number for quantities of 3,000 devices per reel (e.g.,

bq24060BPGR). Add suffix T to the part number for quantities of 250 devices per reel (e.g., bq24060DRCT).

(2) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for

use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including

bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

Web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

bq2406x

Supply voltage (IN with respect to Vss)

Input voltage on IN, STATx, PG, TS, CE, TE, TMR (all with respect to Vss)

Input voltage on OUT, BAT, ISET (all with respect to Vss)

Output sink current (STATx) + PG

–0.3 V to 18 V⁽²⁾

–0.3 V to V(IN)

–0.3 V to 7 V

15 mA

Output current (OUT pin)

1.5 A

T_A

Operating free-air temperature range

Storage temperature range

–40°C to 155°C

–65°C to 150°C

–40°C to 150°C

T_stg

T_J

Junction temperature range

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability

(2) The bq2406x device can withstand up to 26 V for a maximum of 87 hours.

RECOMMENDED OPERATING CONDITIONS

MIN

3.5

4.35

0

TYP

MAX UNIT

V_(IN)

T_J

Supply voltage range

Junction temperature

Battery absent detection not functional

Battery absent detection functional

4.35

16.5

125

V

°C

R_TMR33K ≤ R_TMR≤ 100K

DISSIPATION RATINGS⁽¹⁾

PACKAGE

θ_JC(°C/W)

θ_JA(°C/W)

10-pin DRC

3.21

46.87

(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu

pad on the board. This is connected to the ground plane by a 2×3 via matrix.

2

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SLUS689A–JUNE 2006–REVISED OCTOBER 2006

ELECTRICAL CHARACTERISTICS

over recommended operating, T_J= 0 –125°C range, See the Application Circuits section, typical values at T_J= 25°C (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN TYP MAX UNIT

POWER DOWN THRESHOLD – UNDERVOLTAGE LOCKOUT

V(IN) = 0 V, increase V(OUT): 0 → 3 V OR

V(OUT) = 0 V, increase V(IN): 0 → 3 V,

CE = LO

V_(UVLO)

Power down threshold

1.5

3.0

V

(1)

INPUT POWER DETECTION, CE = HI or LOW, V(IN) > 3.5 V

V_IN(DT)

Input power detection threshold

V_(IN)detected at [V(IN) – V(OUT)] > V_IN(DT)

Input power not detected at

130

mV

V_HYS(INDT)

Input power detection hysteresis

30

[V_(IN)– V_(OUT)]< [V_IN(DT)– V_HYS(INDT)

]

Deglitch time, input power detected

status

PG:HI → LO, Thermal regulation loop not active,

R_TMR= 50 KΩ or V_(TMR)= OPEN

T_DGL(INDT1)

T_DGL(NOIN)

1.5

3.5

10

ms

Delay time, input power not detected

status

PG: LO →HI after T_DGL(NOIN)

µs

Charger turned off after T_DLY(CHGOFF), Measured

from PG: LO → HI; Timer reset after

T_DLY(CHGOFF)

T_DLY(CHGOFF)Charger off delay

28

32

ms

INPUT OVERVOLTAGE PROTECTION

bq24060/61/63

6.2

6.5

7.0

V_(OVP)

Input overvoltage detection threshold

V(IN) increasing

bq24064

V

10.2 10.5 11.7

bq24060/61/63

0.1

0.3

0.2

0.5

V_HYS(OVP)

Input overvoltage hysteresis

V(IN) decreasing

bq24064

CE = HI or LO, Measured from V(IN) > V_(OVP)to

PG: LO → HI; VIN increasing

T_DGL(OVDET)

Input overvoltage detection delay

10

100

µs

CE = HI or LO, Measured from V(IN) < V_(OVP)

to PG: HI → LO; V(IN) decreasing

T_DGL(OVNDET)Input overvoltage not detected delay

QUIESCENT CURRENT

V_(IN)= 6 V

100

300

4

200

Input power detected, CE =

HI

I_CC(CHGOFF)

IN pin quiescent current, charger off

IN pin quiescent current, charger on

µA

V_(IN)= 16.5 V

I_CC(CHGON)

I_BAT(DONE)

Input power detected, CE = LO, V_BAT= 4.5 V

6

5

mA

Battery leakage current after termination Input power detected, charge terminated,

into IC CE = LO

1

µA

Battery leakage current into IC, charger Input power detected, CE = HI OR

I_BAT(CHGOFF)

5

µA

off

input power not detected, CE = LO

TS PIN COMPARATOR

V_(TS1)

V_(TS2)

Lower voltage temperature threshold

Hot detected at V(TS) < V_(TS1); NTC thermistor

Cold detected at V(TS) > V_(TS2); NTC thermistor

Temp OK at V(TS) > [ V_(TS1)+ V_HYS(TS)] OR

29

60

30

61

31 %V(IN)

62 %V(IN)

Upper voltage temperature threshold

V_HYS(TS)

Hysteresis

2

%V(IN)

V_(TS)< [ V_(TS2)– V_HYS(TS)

]

CE INPUT

V_IL

Input (low) voltage

Input (high) voltage

V(CE) increasing

V(CE) decreasing

0

1

V

V_IH

2.0

STAT1, STAT2 AND PG OUTPUTS , V(IN) ≥ V_O(REG)+ V_(DO-MAX)

V_OLOutput (low) saturation voltage Ioutput = 5 mA (sink)

THERMAL SHUTDOWN

0.5

V

T_(SHUT)

Temperature trip

Thermal hysteresis

Junction temperature, temp rising

Junction temperature

155

20

°C

T_(SHUTHYS)

(1) Specified by design, not production tested.

3

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SLUS689A–JUNE 2006–REVISED OCTOBER 2006

ELECTRICAL CHARACTERISTICS (Continued)

over recommended operating, T_J= 0–125°C range, See the Application Circuits section, typical values at T_J= 25°C (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VOLTAGE REGULATION, V(IN) ≥ V_O(REG)+ V_(DO-MAX), I_(TERM)< I_(OUT)< I_O(OUT), CHARGER ENABLED, NO FAULT CONDITIONS

DETECTED

V_O(REG)

V_O(TOL)

V_(DO)

Output voltage

bq24060/61/63/64

4.20

V

T_A= 25°C

–0.5%

–1%

0.5%

1%

Voltage regulation accuracy

Dropout voltage, V(IN) – V(OUT)

I_(OUT)= 1 A

750

mV

CURRENT REGULATION , V(IN) > V(OUT) > V_(DO-MAX), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED

V_(BAT)> V_(LOWV), I_O(OUT)= I_(OUT)= K_(SET)

V_(SET)/R_SET

×

I_O(OUT)

V_(SET)

K_(SET)

R_ISET

Output current range

100

1000

mA

V

Output current set voltage

V(ISET) = V_(SET), V_(LOWV)< V(BAT) ≤ V_O(REG)

2.45

315

0.7

2.50

335

372

2.55

355

430

10

100 mA ≤ I_O(OUT)≤ 1000 mA

10 mA ≤ I_O(OUT)< 100 mA

Resistor connected to ISET pin

mA kW

Volts

Output current set factor

External resistor range

kΩ

VOLTAGE AND CURRENT REGULATION TIMING, V(IN) > V(OUT) + V_(DO-MAX), CHARGER ENABLED, NO FAULT CONDITIONS

DETECTED, R_TMR= 50K or V(TMR) = OPEN; Thermal regulation loop not active

Input power detection to full

charge current time delay

Measured from PG:HI → LO to I(OUT) > 100 mA,

CE = LO, I_O(OUT)= 1 A, V(BAT) = 3.5 V

T_PWRUP(CHG)

25

35

ms

Measured from CE:HI → LO to I(OUT) >100 mA,

I_O(OUT)= 1A, V_(BAT)= 3.5 V, V_(IN)= 4.5 V, Input

power detected

Charge enable to full charge

current delay

T_PWRUP(EN)

25

35

ms

Measured from PG:HI → LO to V(OUT) > 90% of

charge voltage regulation;

V_(TMR)= OPEN, LDO mode set, no battery and no

load at OUT pin, CE = LO

Input power detection to voltage

T_PWRUP(LDO)regulation delay, LDO mode set,

no battery or load connected

25

35

ms

PRECHARGE AND OUTPUT SHORT-CIRCUIT CURRENT REGULATION, V(IN)–V(OUT) > V(DO-MAX) , V(IN) ≥ 4.5V, CHARGER

ENABLED, NO FAULT CONDITIONS DETECTED, RTMR = 50K or V(TMR)=OPEN; Thermal regulation loop not active

Precharge to fast-charge transition

threshold

V_(LOWV)

V_(BAT)increasing

2.8

2.95

3.15

V

Precharge to short-circuit

transition threshold

V_(SC)

V_(BAT)decreasing

1.2

1.6

10

1.4

1.8

1.6

2.0

V_(SCIND)

I_O(PRECHG)

V_(PRECHG)

Short-circuit indication

V_(SC)< V_I(BAT)< V_(LOWV), t < T_(PRECHG)

I_O(PRECHG)= K_(SET)× V_(PRECHG)/R_(ISET)

Precharge current range

100

mA

mV

V_(ISET)= V_(PRECHG), V_(SC)< V_I(BAT)< V_(LOWV)

t < T_(PRECHG)

,

Precharge set voltage

225

15

250

22

280

30

V_POR< V_IN< 6.0

V

_SS≤ V_(BAT)≤ V_(SCI)

I_O(SHORT)= I_(OUT), V_(BAT)

VSS, Internal pullup resistor

,

I_O(SHORT)

Output shorted regulation current

=

mA

6.0 V < V_IN

V_OVP

<

25

TEMPERATURE REGULATION (Thermal regulation™), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED

V(IN) = 5.5 V, V(BAT) = 3.2 V, Fast charge

current set to 1A

T_J(REG)

Temperature regulation limit

101

112

200

125

250

°C

Minimum current in thermal

regulation

V(LOWV) < V(BAT) < VO(REG), 0.7kΩ < RISET

< 3.5kΩ

I_{(MIN_TJ(REG))}

mA

4

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SLUS689A–JUNE 2006–REVISED OCTOBER 2006

ELECTRICAL CHARACTERISTICS (Continued)

over recommended operating, T_J= 0–125°C range, See the Application Circuits section, typical values at T_J= 25°C (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

CHARGE TERMINATION DETECTION, V_O(REG)= 4.2 V, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, Thermal

regulation LOOP NOT ACTIVE, R_TMR= 50K or TMR pin OPEN

Termination detection current

range

I_(TERM)

V_(BAT)> V_(RCH), I_(TERM)= K_(SET)× V_(TERM)/R_ISET

V_(BAT)> V_(RCH)

10

225

15

100

275

35

mA

mV

ms

Charge termination detection

set voltage⁽¹⁾

V_(TERM)

250

25

Deglitch time, termination

detected

T_DGL(TERM)

V_(ISET)decreasing

BATTERY RECHARGE THRESHOLD

V_(RCH)

Recharge threshold detection

[V_O(REG)–V(BAT) ] > V_(RCH)

V_(BAT)decreasing

75

15

100

25

135

35

mV

ms

Deglitch time, recharge

detection

T_DGL(RCH)

TIMERS, CE = LO, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, V(TMR) < 3 V, TIMERS ENABLED

T_(CHG)

K_(CHG)

Charge safety timer range

T_(CHG)= K_(CHG)× R_TMR; thermal loop not active

3

10 hours

Charge safety timer constant

V_(BAT)> V_(LOWV)

0.08

0.1

0.12 hr/kΩ

T_(PCHG)= K_(PCHG)× T_(CHG); Thermal regulation

loop not active

T_(PCHG)

K_(PCHG)

Pre-charge safety timer range

1080

0.08

3600

0.12

sec

Pre-charge safety timer

constant

V_(BAT)< V_(LOWV)

0.1

3.0

[Charge timer AND

termination disabled] at V_(TMR)bq24060/61/64

> V_TMR(OFF)

Charge timer and termination

enable threshold

V_TMR(OFF)

2.5

3.5

V

[Charge timer disabled] at

bq24063

Charge timer enable threshold

TMR pin source current

V_(TMR)> V_TMR(OFF)

I_TMR

V_(TMR)= 3.5 V, V_(IN)= 4.5 V

1

6

µA

BATTERY DETECTION THRESHOLDS

I_DET(DOWN)Battery detection current (sink) 2 V < V_(BAT)< V_O(REG)

2

3.2

mA

Battery detection current

(source)

I_DET(UP)

2 V < V_(BAT)< V_O(REG)

I_O(PRECHG)

2 V < V_(BAT)< V_O(REG), Thermal regulation loop not

active; R_TMR= 50 kΩ, I_DET(down)or I_{DET (UP)}

T_(DETECT)

Battery detection time

85

120

–10

150

–8

ms

TIMER FAULT RECOVERY

I_(FAULT)Fault Current (source)

V_(OUT)< V_(RCH)

–12

mA

CHARGE OVERCURRENT DETECTION, V(IN) ≥ 4.5 V, CHARGER ENABLED

Charge overcurrent detection

threshold

I_CH(OI)

V_(ISET)= VSS

2

A

Overcurrent detection delay

time

T_DGL(OI)

Measured from V_(ISET)= VSS to I_O(OUT)= 0

100

µs

(1) The voltage on the ISET pin is compared to the V_(TERM)voltage to determine when the termination should occur.

5

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SLUS689A–JUNE 2006–REVISED OCTOBER 2006

DEVICE INFORMATION

PIN ASSIGNMENT

VSS

5

STAT 2 STAT 1 TMR

IN

1

VSS

5

STAT 2 STAT 1 TMR

IN

1

VSS

5

STAT 2 STAT 1 TMR

IN

1

4

2

4

2

4

2

3

bq24063 DRC

(TOP VIEW)

bq24060/64 DRC

(TOP VIEW)

bq24061 DRC

(TOP VIEW)

6

7

8

9

10

6

7

8

9

10

6

7

8

9

10

ISET

CE

TE

BAT

OUT

ISET

PG

TS

BAT

OUT

ISET

PG

CE

BAT

OUT

TERMINAL FUNCTIONS, REQUIRED COMPONENTS

TERMINAL NO.

bq24060/64 bq24061

I/O

DESCRIPTION AND REQUIRED COMPONENTS

NAME

bq24063

Charge Input Voltage and internal supply. Connect a 1- µF (minimum)

capacitor from IN to VSS. C_IN≥ C_OUT

IN

1

I

Safety Timer Program Input, timer disabled if floating. Connect a resistor to

VSS pin to program safety timer timeout value

TMR

2

STAT1

STAT2

VSS

3

4

5

3

4

5

3

4

5

O

I

Charge Status Output 1 (open-collector, seeTable 3)

Charge Status Output 2 (open-collector, see Table 3)

Ground

Charge current set point, resistor connected from ISET to VSS sets charge

current value. Connect a 0.47-µF capaciator from BAT to ISET.

ISET

6

O

PG

CE

7

8

—

7

O

I

Power Good status output (open-collector), active low

—

Charge enable Input. CE = LO enables charger. CE = HI disables charger.

Termination enable Input. TE = LO enables termination detection and battery

absent detection. TE = HI disables termination detection and battery absent

detection.

TE

—

8

I

Temperature Sense Input, connect to battery pack thermistor. Connect an

external resistive divider to program temperature thresholds.

TS

8

9

—

9

—

9

I

Battery Voltage Sense Input. Connect to the battery positive terminal. Connect

a 200-Ω resistor from BAT to OUT.

BAT

OUT

Charge current output. Connect to the battery positive terminal. Connect a 1-

µF (minimum) capacitor from OUT to VSS.

10

O

There is an internal electrical connection between the exposed thermal pad

and Vss pin of the IC. The exposed thermal pad must be connected to the

same potential as the VSS pin on the printed circuit board. Do not use the

thermal pad as the primary ground input for the IC. VSS pin must be

connected to ground at all times.

Exposed

Thermal

Pad

6

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SLUS689A–JUNE 2006–REVISED OCTOBER 2006

TYPICAL OPERATING CHARACTERISTICS

Measured using the typical application circuit shown previously.

THERMAL LOOP OPERATION

WITH POWERPAD ATTACHED

THERMAL LOOP AND DTC OPERATION

7

12

10

8

1.75

1.6

1.4

1.2

1

V

IN

1.50

1.25

1

6

5

Safety Timer

4

3

I

BAT

0.8

6

4

0.75

0.50

I

0.6

0.4

BAT

V

2

1

0

ISET

2

0

0.25

0

0.2

0

0.50

1.50

2

2.50

1

3

0

0.50

1

1.50

t - Time - s

2

2.50

3

t - Time - s

Figure 1.

Figure 2.

PACK REMOVAL TRANSIENT

INPUT OVP RECOVERY TRANSIENTS

5

1

2

8

7

1.80

4.75

4.50

0.8

1.60

V

6

5

4

3

BAT

IN

0.6

0.4

1.40

4.25

4

1.20

1

0.2

0

I

BAT

0.80

0.60

0.40

0.20

0

I

BAT

3.75

3.50

2

1

V

PG

-0.2

-0.4

3.25

3

0

5

10 15 20 25 30 35 40 45 50

0

0.5

1

1.5

2

2.5

t - Time - mS

Figure 3.

Figure 4.

PG DEGLITCH TIME

9

8

7

6

5

4

3

2

V

IN

V

PG

1

0

1

2

3

4

5

t - Time - mS

Figure 5.

7

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SLUS689A–JUNE 2006–REVISED OCTOBER 2006

TYPICAL OPERATING CHARACTERISTICS (continued)

Measured using the typical application circuit shown previously.

PRE-CHARGE CURRENT

vs

BATTERY VOLTAGE

FAST-CHARGE CURRENT

vs

BATTERY VOLTAGE

52.5

52

105

104.5

104

1000

995

990

985

980

975

51.5

51

25°C

0°C

103.5

103

25°C

0°C

50.5

85°C

25°C

0°C

50

49.5

49

85°C

102.5

102

970

965

85°C

101.5

101

48.5

960

955

950

48

100.5

100

47.5

3

3.20

3.40

3.60

3.80

4

3

3.20

3.40

3.60

3.80

4

2

2.20

3

2.40

Battery Voltage - V

2.60

2.80

Battery Voltage - V

Figure 6. HIGH CHARGE RATE

Figure 7. HIGH CHARGE RATE

Figure 8. LOW CHARGE RATE

KSET LINEARITY

vs

CHARGE CURRENT

KSET LINEARITY

vs

CHARGE CURRENT

BATTERY REGULATION VOLTAGE

vs

INPUT VOLTAGE

4.202

350

345

340

335

400

390

0°C

4.200

4.198

380

370

360

350

85°C

0°C

25°C

4.196

4.194

85°C

0°C

25°C

340

330

320

4.192

4.190

25°C

330

325

320

85°C

8.5

4.188

4.186

310

300

25 35 45 55 65 75 85 95 105 115 125

4.5

6.5

10.5 12.5 14.5 16.5

0

100 200 300 400 500 600 700 800 900 1000

Battery Charge Current -

Input Voltage - V

Battery Charge Current - mA

Figure 9. 2.0 < V_(BAT)< 3.0 V

Figure 10. 3.0 < V_(BAT)< 4.0 V

Figure 11.

DROPOUT VOLTAGE

vs

TEMPERATURE

0.400

0.375

0.350

0.325

0.300

0.275

0.250

0.225

0.200

-15

5

25

45

65

85

105 125

T

- Temperature - °C

A

Figure 12.

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FUNCTIONAL DESCRIPTION

The charge current is programmable using external components (R_ISETresistor). The charge process starts

when an external input power is connected to the system, the charger is enabled by CE = LO and the battery

voltage is below the recharge threshold, V(BAT) < V_(RCH). When the charge cycle starts a safety timer is

activated, if the safety timer function is enabled. The safety timer timeout value is set by an external resistor

connected to TMR pin.

When the charger is enabled two control loops modulate the battery switch drain to source impedance to limit

the BAT pin current to the programmed charge current value (charge current loop) or to regulate the BAT pin

voltage to the programmed charge voltage value (charge voltage loop). If V(BAT) < V(LOWV) (3 V typical) the

BAT pin current is internally set to 10% of the programmed charge current value.

A typical charge profile is shown below, for an operation condition that does not cause the IC junction

temperature to exceed T_J(REG), (112°C typical).

Voltage Regulation and

Charge Termination

Phase

Pre-

Conditioning

Phase

Current

Regulation

Phase

DONE

V

O(REG)

I

O(OUT)

FAST-CHARGE

CURRENT

Battery Current,

I

(BAT)

Charge

Complete

Status,

Charger

Off

Battery Voltage,

V

(BAT)

v

(LOWV)

I

O(PRECHG), (TERM)

PRE-CHARGE

CURRENT AND

TERMINATION

THRESHOLD

T

DONE

(CHG)

(PRECHG)

Figure 13. Charging Profile With T_J(REG)

If the operating conditions cause the IC junction temperature to exceed T_J(REG), the charge cycle is modified,

with the activation of the integrated thermal control loop. The thermal control loop is activated when an internal

voltage reference, which is inversely proportional to the IC junction temperature, is lower than a fixed,

temperature stable internal voltage. The thermal loop overrides the other charger control loops and reduces the

charge current until the IC junction temperature returns to T_J(REG), effectively regulating the IC junction

temperature.

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IN

VREF

VTJ

Thermal

Loop

BATTERY

SWITCH

I

(BAT)

OUT

ISET

I

(BAT)

/ K

(SET)

V

(BAT)

V

O(REG)

System Voltage

Regulation Loop

BAT

Figure 14. Thermal Regulation Circuit

A modified charge cycle, with the thermal loop active, is shown in Figure 15.

Thermal

Regulation

Phase

Current

Regulation

Phase

Voltage Regulation and

Charge Termination

Phase

Pre-

Conditioning

Phase

DONE

V

O(REG)

I

O(OUT)

Battery Current,

I

FAST-CHARGE

CURRENT

(BAT)

Battery

Voltage,

Charge

Complete

Status,

Charger

Off

V

(BAT)

PRE-CHARGE

CURRENT AND

TERMINATION

THRESHOLD

V

O(LOWV)

I

O(PRECHG), (TERM)

T

(THREG)

temperature

, Tj

T

DONE

(CHG)

T

(PRECHG)

Figure 15. Charge Profile, Thermal Loop Active

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FUNCTIONAL BLOCK DIAGRAM

BACKGATE BIAS

V(IN)

I(OUT)

OUT

IN

V(OUT)

IOUT) / K_(SET)

ISET

V_O(REG)

PRE_CHARGE

V(ISET)

I_(DETECT)

I_(FAULT)

V(IN)

V_(SET)

V_(PRECHG)

T_J

T_J(REG)

BATTERY ABSENT DETECTION

AND SHORT RECOVERY

CHG ENABLE

V(IN)

Dynamically

Controlled

Oscillator

+

-

V_{(SET) ,}V_(PRECHG)

V_OC

T_DGL(CHOVC)

Deglitch

TMR

V(IN)

V(OUT)+V_IN(DT)

+

-

+

T_DGL(INDT)

Deglitch

V(IN)

V_TMR(OFF)

-

Over_current

Input Power

Detected

+

-

Timer

Fault

TS

+

-

V(IN)

Timer

V(IN)

REFERENCE

AND

BIAS

Disable

POR

Suspend

Internal

Voltage

References

Thermal

Shutdown

+

-

T_DGL(OVP)

Deglitch

Input Over-Voltage

CE

PG

V_(OVP)

CHARGE

CONTROL,

TIMER and

BAT

Recharge

Precharge

+

-

T_DGL(RCH)

Deglitch

V_(RCH)

DISPLAY LOGIC

+

-

V_(LOW)

STAT1

STAT2

V_{(TERM )}

+

-

T_DGL(TERM)

Deglitch

Terminate

V(ISET)

VSS

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APPLICATION CIRCUITS

The typical application diagrams shown here are configured for 750 mA fast charge current, 75 mA pre-charge

current, 5 hour safety timer and 30 min pre-charge timer.

Li-Ion or Li-Pol

Battery Pack

bq24060/64

Input Power

10

1

2

Pack+

Pack-

OUT

IN

R_TMR

R8

200 W

+

C2

C3

4.7 mF

TMR

9

8

7

R1

1.5 kW

R2

1.5 kW

BAT

TS

2.2 mF

49.9 kW

RED

3

STAT1

RT1

10 kW

C1

0.47 mF

GREEN

4

5

TEMP

PG

STAT2

Vss

6

RT2

33.2 kW

ISET

R_ISET

Power

Good

1.13 kW

Li-Ion or Li-Pol

Battery Pack

bq24061

Input Power

1

10

Pack+

+

IN

OUT

R_TMR

R8

200 W

2

C2

1 mF

C3

4.7 mF

TMR

9

R1

1.5 kW

R2

1.5 kW

BAT

49.9 kW

Pack-

RED

3

8

STAT1

CE

C1

0.47 mF

7

GREEN

4

5

PG

STAT2

Vss

6

ISET

R

SET

1.13 kW

Charge Enable

and Power Good

Li-Ion or Li-Pol

Battery Pack

bq24063

Input Power

1

2

10

Pack+

+

IN

OUT

R8

200 W

R

TMR

C2

1 mF

TMR

9

8

C3

4.7 mF

R1

1.5 kW

R2

1.5 kW

BAT

TE

49.9 kW

Pack-

3

RED

STAT1

C1

0.47 mF

7

6

GREEN

4

5

CE

STAT2

Vss

ISET

R

SET

1.13 kW

Charge and

Termination Enable

NOTE: Temp window set between 0°C and 45°C for application w/TS pin.

Figure 16. Application Circuits

OPERATING MODES

Power Down

The bq2406x family is in a power-down mode when the input power voltage (IN) is below the power-down

threshold V_(PDWN). During the power down mode all IC functions are off, and the host commands at the control

pins are not interpreted. The integrated power mosfet connected between IN and OUT pins is off, the status

output pins STAT1 and STAT2 are set to high impedance mode and PG output is set to the high impedance

state.

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Sleep Mode

The bq2406x enters the sleep mode when the input power voltage (IN) is above the power down threshold

V(PDWN) but still lower than the input power detection threshold, V(IN) < V(OUT) + V_IN(DT)

.

During the sleep mode the charger is off, and the host commands at the control pins are not interpreted. The

integrated power mosfet connected between IN and OUT pins is off, the status output pins STAT1 and STAT2

are set to the high impedance state and the PG output indicates input power not detected.

The sleep mode is entered from any other state, if the input power (IN) is not detected.

Overvoltage Lockout

The input power is detected when the input voltage V(IN) > V(OUT) + V_IN(DT). When the input power is detected

the bq2460x transitions from the sleep mode to the power-on-reset mode. In this mode of operation an internal

timer T_(POR)is started and internal blocks are reset (power-on-reset). Until the timer expires the STAT1 and

STAT2 outputs indicate charger OFF, and the PG output indicates the input power status as not detected.

At the end of the power-on-reset delay the internal comparators are enabled, and the STAT1, STAT2 and PG

pins are active.

Stand-By Mode

In the bq24061/63 the stand-by mode is started at the end of the power-on-reset phase, if the input power is

detected and CE = HI. In the stand-by mode selected blocks in the IC are operational, and the control logic

monitors system status and control pins to define if the charger will set to on or off mode. The quiescent current

required in stand-by mode is 100 µA typical.

If the CE pin is not available the bq2406x enters the begin charge mode at the end of the power-on-reset phase.

Begin Charge Mode

All blocks in the IC are powered up, and the bq2406x is ready to start charging the battery pack. A new charge

cycle is started when the control logic decides that all conditions required to enable a new charge cycle are met.

During the begin charge phase all timers are reset, after that the IC enters the charging mode.

Charging Mode

When the charging mode is active the bq2406x executes the charging algorithm, as described in the operational

flow chart, Figure 17.

Suspend Mode

The suspend mode is entered when the pack temperature is not within the valid temperature range. During the

suspend mode the charger is set to off, but the timers are not reset.

The normal charging mode resumes when the pack temperature is within range.

LDO Mode Operation

The LDO Mode (TMR pin open circuit) disables the charging termination circuit, disables the battery detect

routine and holds the safety timer clock in reset. This is often used for operation without a battery or in

production testing. This mode is different than a typical LDO since it has different modes of operation, and

delivers less current at lower output voltages. See Figure 24 for the output current versus the output voltage.

Note that a load on the output prior to powering the device may keep the part in short-circuit mode. Also, during

normal operation, exceeding the programmed fast charge level causes the output to drop, further restricting the

output power, and soon ends up in short-circuit mode. Operation with a battery or keeping the average load

current below the programmed current level prevents this type of latch up. The out pin current can be monitored

via the ISET pin. If in LDO mode without a battery present, It is recommended that a 200-Ω feedback resistor,

R8, be used, see Figure 16.

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STATE MACHINE DIAGRAM

CHARGING

No

RECHARGE

DETECTION

V(TS) >V_(TS2)OR

V(TS) < V_(TS1)

Enable I_O(SHORT)

current

T_(PRCH)OFF

V_I(BAT)< V_(RCH)

ANY

STATE

V(OUT) <V_(SC)

Yes

Suspend

No

V(TS) < V_(TS2)AND

V(TS) > V_(TS1)

Set Charge Off,

Stop timers,

Regulate

I_O(PRECHG)

Keep timer count,

STATn=Hi-Z

VDETECT

ENABLED

Reset T_(CHG)

T_(PRCH)ON

V(OUT)

<V_(LOWV)

Yes

ANY

STATE

Indicate Charge-

In-Progress

No

Enable I_(DETECT)for

t_(DETECT)

Yes

Reset

T

(PRCH)

T_(CHG)ON

Battery Present

No OR

Timers disabled

GO TO

Begin Charge

Regulate Current

or Voltage

V_I(BAT)<V_(LOWV)

No

Indicate Charge-

In-Progress

V(OUT)

<V_(LOWV)

No

Yes

BATTERY

Apply I_O(PRECHG)for

t_(DETECT)

Yes

DETECTION

Yes

No

T_(CHG)Expired?

T_(PRCH)

Expired?

V_I(BAT)> V_(RCH)

No OR

timers disabled

Yes AND

timers enabled

Yes

ANY

STATE

Yes AND

Timers enabled

Battery Absent

Charge Off

V(OUT)

<V_(LOWV)

Yes

T

Fault

(DETECT)

Fault Condition

Indicate Fault

No

OR

Suspend

V(TS) >V_(TS2)OR

V(TS) < V_(TS1)

V(TS) >V_(TS2)OR

V(TS) < V_(TS1)

ANY

STATE

No

termination

disabled

Set Charge Off,

Stop timers,

Keep timer count,

STATn=Hi-Z

V(TS) < V_(TS2)AND

V(TS) > V_(TS1)

I_TERM

detection?

V(OUT)

> V_(RCH)

?

Stand-by

/CE=HI OR

V(IN)>V_(OVP)

STATn set to HI-Z,

update/PG status,

enable control logic

Yes AND

termination

enabled

No

Yes

Enable I_FAULT

current

/CE=LO AND

[V(BAT)+V_(INDT)

< V(IN) <

Termination

]

No

Indicate

Termination

V_(OVP)

Yes

V(OUT)

> V_(RCH)

?

T_(POR)

Expired?

Yes

Power-on-reset

Begin Charge

Disable I

current

FAULT

Turn off charger ,

STATn and PG

set to HI-Z,

Reset ALL TImers

No

reset timers

V(IN) > V(POR) AND

V(IN) > V(OUT)+V_IN(DT)

FAULT

RECOVERY

Sleep

Turn off charger ,

STATn , /PG set to

HI-Z , monitor

[V(IN) -V(OUT)] <

[V_IN(DT)- V_HYS(INDT)

Done

]

Turn off charger,

Indicate

input power

Charge done

Reset timers

V(IN) > V_(POR)

Power down

All IC functions off

STATn and PG

set to HI-Z

ANY

STATE

V(IN) < V_(POR)

START-UP

Figure 17. Operational Flow Chart

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CONTROL LOGIC OVERVIEW

An external host can enable or disable the charging process using a dedicated control pin, CE. A low-level

signal on this pin enables the charge, and a high-level signal disables the charge. The bq2460x is in stand-by

mode with CE = HI. When the charger function is enabled (CE = LO) a new charge is initiated.

Table 1 describes the charger control logic operation, in bq2460x versions without the TS pin the pack temp

status is internally set to OK.

Table 1. Control Logic Functionality

bq2460X

OPERATION

MODE

CE

INPUT

POWER

TIMER

FAULT

(latched)

OUTPUT

SHORT

CIRCUIT

TERMINATION

(latched)

PACK

TEMP

THERMAL

SHUTDOWN

POWER

DOWN

CHARGER

POWER

STAGE

POWER

DOWN

LO

X

Low

X

Yes

No

OFF

SLEEP

Not

Detected

X

STANDBY

HI

Detected

X

No

SEE STATE

DIAGRAM

LO

Yes

No

X

No

Yes

No

Yes

No

Yes

No

X

OFF

IFAULT

IDETECT

OFF

X

Absent

T_J< T_SHUT

Hot or

Cold

LO

Detected

No

Ok

T_J< T_SHUT

No

OFF

Over

Voltage

CHARGING

LO

Detected

No

Ok

T_J< T_SHUT

No

ON

In both STANDBY and SUSPEND modes the charge process is disabled. In the STANDBY mode all timers are

reset; in SUSPEND mode the timers are held at the count stored when the suspend mode was set.

The timer fault, termination and output short circuit variables shown in the control logic table are latched in the

detection circuits, outside the control logic. Refer to the timers, termination and short circuit protection sections

for additional details on how those latched variables are reset.

TEMPERATURE QUALIFICATION (Applies only to versions with TS pin option)

The bq2406x devices continuously monitor the battery temperature by measuring the voltage between the TS

and VSS pins. The IC compares the voltage on the TS pin against the internal V_(TS1)and V_(TS2)thresholds to

determine if charging is allowed. Once a temperature outside the V_(TS1)and V_(TS2)thresholds is detected the IC

immediately suspends the charge. The IC suspends charge by turning off the power FET and holding the timer

value (i.e., timers are NOT reset). Charge is resumed when the temperature returns to the normal range.

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V

IN

Charge Suspend

V

C(TS2)

0.6* V

IN

Normal Temperature

Charge Range

V

C(TS1)

0.3* V

IN

Charge Suspend

Figure 18. Battery Temperature Qualification With NTC Thermistor

The external resistors R_T1and R_T2(see application diagram) enable selecting a temperature window. If R_TCand

R_THare the thermistor impedances for the Cold and Hot thresholds the values for R_T1and R_T2can be calculated

as follows, for a NTC (negative temperature coefficient) thermistor. Solve for R_T2first and substitute into R_T1

equation.

2.5 R

R

TC TH

* 3.5 R

R

+

T2

R

TC

7 R

TH

(1)

R

TH T2

R

+

T1

₃ƪ_R

_T2ƫ

) R

TH

(2)

Applying a fixed voltage, 1/2 Vin (50% resistor divider from Vin to ground), to the TS pin to disable the

temperature sensing feature.

INPUT OVERVOLTAGE DETECTION, POWER GOOD STATUS OUTPUT

The input power detection status for pin IN is shown at the open collector output pin PG.

Table 2. Input Power Detection Status

INPUT POWER DETECTION (IN)

NOT DETECTED

PG STATE

High impedance

LO

DETECTED, NO OVERVOLTAGE

DETECTED, OVERVOLTAGE

High impedance

The bq2406x detects an input overvoltage when V(IN) > V_(OVP). When an overvoltage protection is detected the

charger function is turned off and the bq2460x is set to standby mode of operation. The OVP detection is not

latched, and the IC returns to normal operation when the fault condition is removed.

CHARGE STATUS OUTPUTS

The open-collector STAT1 and STAT2 outputs indicate various charger operations as shown in Table 3. These

status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the

open-collector transistor is turned off. When termination is disabled (TMR pin floating or TE = Hi, bq24063) the

Done state is not available; the status LEDs indicate fast charge if V_BAT> V_LOWVand precharge if V_BAT< V_LOWV

The available output current is a function of the OUT pin voltage, See Figure 24.

.

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Table 3. Charge Status⁽¹⁾

Charge State

Precharge in progress

STAT1

STAT2

ON

Fast charge in progress

Done (termination enabled only)

Charge Suspend (temperature)

Timer Fault

OFF

ON

OFF

Charger off

OFF

Selected Input power overvoltage detected

Battery absent

Batteryshort

(1) Pulse loading on the OUT pin may cause the IC to cycle between Done and charging states (LEDs

Flashing)

BATTERY CHARGING: CONSTANT CURRENT PHASE

The bq2406x family offers on-chip current regulation. The current regulation is defined by the value of the

resistor connected to ISET pin.

During a charge cycle the fast charge current I_O(OUT)is applied to the battery if the battery voltage is above the

V_(LOWV)threshold (2.95 V typical):

V

K

(SET)

SET)

I(OUT) + I

+

O(OUT)

R

ISET

(3)

Where K_(SET)is the output current set factor and V_(SET)is the output current set voltage.

During a charge cycle if the battery voltage is below the V_(LOWV)threshold a pre-charge current I_(PRECHG)is

applied to the battery. This feature revives deeply discharged cells.

V

K

I

O(OUT)

(PRECHG)

SET)

X

I(OUT) + I

+

(PRECHG)

10

R

ISET

(4)

Where K_(SET)is the output current set factor and V_(PRECHG)is the precharge set voltage.

At low constant current charge currents, less than 350 mA, it is recommended that a 0.47-µF capacitor be

placed between the ISET and BAT pins to insure stability, see Figure 16.

CHARGE CURRENT TRANSLATOR

When the charge function is enabled internal circuits generate a current proportional to the charge current at the

ISET pin. This current, when applied to the external charge current programming resistor R_ISETgenerates an

analog voltage that can be monitored by an external host to calculate the current sourced from the OUT pin.

R

ISET

V(ISET) + I(OUT)

K

(SET)

(5)

BATTERY VOLTAGE REGULATION

The battery pack voltage is sensed through the BAT pin, which is tied directly to the positive side of the battery

pack. The bq2406x monitors the battery pack voltage between the BAT and VSS pins. When the battery voltage

rises to V_O(REG)threshold the voltage regulation phase begins and the charging current begins to taper down.

The voltage regulation threshold V_O(REG)is fixed by an internal IC voltage reference.

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PRE-CHARGE TIMER

The bq2406x family activates an internal safety timer during the battery pre-conditioning phase. The charge

safety timer time-out value is set by the external resistor connected to TMR pin, R_TMRand the timeout constants

K_(PCHG)and T_(CHG)

:

T_(PCHG)= K_(PCHG)× T_(CHG)

The pre-charge timer operation is detailed in Table 4.

Table 4. Pre-Charge Timer Operational Modes

bq2460X MODE

STANDBY (CE = Hi)

V(OUT) > V_(LOWV)

PRE-CHARGE TIMER MODE

X

Yes

No

X

RESET

CHARGING

RESET

SUSPEND (TS out of range)

CHARGING, TMR PIN NOT OPEN

CHARGING, TMR PIN OPEN

RESET

Hold

COUNTING, EXTERNAL PROGRAMMED RATE

RESET

In SUSPEND mode the pre-charge timer is put on hold (i.e., pre-charge timer is not reset), normal operation

resumes when the timer returns to the normal operating mode (COUNTING). If V(BAT) does not reach the

internal voltage threshold V_(LOWV)within the pre-charge timer period a fault condition is detected, the charger is

turned off and the pre-charge safety timer fault condition is latched.

When the pre-charge timer fault latch is set the charger is turned off. Under those conditions a small current

I_FAULTis applied to the OUT pin, as long as input power (IN) is detected AND V(OUT) < V_(LOWV), as part of a

timer fault recovery protocol. This current allows the output voltage to rise above the pre-charge threshold

V_(LOWV), resetting the pre-charge timer fault latch when the pack is removed. Table 5 further details the

pre-charge timer fault latch operation.

Table 5. Pre-Charge Timer Latch Functionality

PRE-CHARGE TIMER FAULT ENTERED WHEN

PRE-CHARGE TIMER FAULT LATCH RESET AT

CE rising edge or OVP detected

Pre-charge timer timeout AND V(OUT) > V_{(LOW V)}

Input power removed (not detected)

Timer function disabled

THERMAL PROTECTION LOOP

An internal control loop monitors the bq2406x junction termperature (T_J) to ensure safe operation during high

power dissipations and or increased ambient temperatures. This loop monitors the bq2406x junction

temperature and reduces the charge current as necessary to keep the junction temperature from exceeding,

T_J(REG), (112°C, typical).

The bq2406x's thermal loop control can reduce the charging current down to ~200mA if needed. If the junction

temperature continues to rise, the IC will enter thermal shutdown.

THERMAL SHUTDOWN AND PROTECTION

Internal circuits monitor the junction temperature, T_J, of the die and suspends charging if T_Jexceeds an internal

threshold T_(SHUT)(155°C typical). Charging resumes when T_Jfalls below the internal threshold T_(SHUT)by

approximately 20°C.

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Thermal Regulation

Normal Operation

800

Thermal Shutdown

175

IBAT

700

600

150

125

500

T

Junction Temperature

J

400

300

100

75

200

100

50

25

0

4

6

8

10

12

14

16

18

V - Input Voltage - V

I

Figure 19. Thermal Regulation Loop Performance and Thermal Shutdown

DYNAMIC TIMER FUNCTION

The charge and pre-charge safety timers are programmed by the user to detect a fault condition if the charge

cycle duration exceeds the total time expected under normal conditions. The expected charge time is usually

calculated based on the fast charge current rate.

When the thermal loop is activated the charge current is reduced, and bq2406x activates the dynamic timer

control, an internal circuit that slows down the safety timer's clock frequnency. The dynamic timer control circuit

effectively extends the safety time duration for either the precharge or fast charge timer modes. This minimizes

the chance of a safety timer fault due to thermal regulation.

The bq2406x dynamic timer control (DTC) monitors the voltage at pin ISET during pre-charge and fast charge,

and if in thermal regulation slows the clock frequency proportionately to the change in charge current. The time

duration is based on a 2²⁴ripple counter, so slowing the clock frequency is a real time correction. The DTC

circuit changes the safety timers clock period based on the V_(SET)/V_(ISET)ratio (fast charge) or V_(PRECHG)/V_(SET)

ratio (pre-charge). Typical safety timer multiplier values relative to the V_(SET)/V_(ISET)ratio is shown in Figure 20

and Figure 21.

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5

4

3

2

1

0

5

1

4

3

2

V

/V

- V

(SET) (ISET)

Figure 20. Safety Timer Linearity

Internal Clock Period Multiplication Factor

45

40

R

= 70 kW

TMR

35

30

R

= 50 kW

TMR

25

20

15

10

R

= 30 kW

TMR

5

0

1

2

3

4

5

6

V

/V - V

SET ISET

Figure 21. bq2406x Safety Timer Linearity for R_TMRValues

20

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160

140

120

100

80

60

40

20

0

90

30

40

60

Current - mA

70

80

20

50

I

TMR

Figure 22. bq2406x Oscillator Linearity vs I_TMR

R_TMR30 KΩ – 100 KΩ

CHARGE TERMINATION DETECTION AND RECHARGE

The charging current is monitored the during the voltage regulation phase. Charge termination is indicated at the

STATx pins (STAT1 = Hi-Z; STAT2 = Low ) once the charge current falls below the termination current threshold

I_(TERM). A deglitch period T_DGL(TERM)is added to avoid false termination indication during transient events.

Charge termination is not detected if the charge current falls below the termination threshold as a result of the

thermal loop activation. Termination is also not detected when charger enters the suspend mode, due to

detection of invalid pack temperature or internal thermal shutdown.

Table 6 describes the termination latch functionality.

Table 6. Termination Latch Functionality

TERMINATION DETECTED LATCHED WHEN

TERMINATION LATCH RESET AT

CE rising edge or OVP detected

New charging cycle started; see state diagram

Termination disabled

I(OUT) < I_(TERM)AND t > T_DGL(TERM)AND V(OUT) > V_(RCH)

The termination function is DISABLED:

1. In bq24060/61/64 the termination is disabled when the TMR pin is left open (floating).

2. In bq24063 leaving TMR pin open (floating) does NOT disable the termination. The only way to disable

termination in the bq24063 is to set TE = HIGH.

BATTERY ABSENT DETECTION – VOLTAGE MODE ALGORITHM

The bq2406x provides a battery absent detection scheme to reliably detect insertion and/or removal of battery

packs. The detection circuit applies an internal current to the battery terminal, and detects battery presence

based on the terminal voltage behavior. Figure 23 has a typical waveform of the output voltage when the battery

absent detection is enabled and no battery is connected:

21

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5

4.50

4

3.50

3

2.50

2

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

t - Time - s

Figure 23. Battery-Absent Detection Waveforms

The battery absent detection function is disabled if the voltage at the BAT pin is held above the battery recharge

threshold, V_(RCH), after termination detection. When the voltage at the BAT pin falls to the recharge threshold,

either by connection of a load to the battery or due to battery removal, the bq2406x begins a battery absent

detection test. This test involves enabling a detection current, I_DET(DOWN), for a period of T_(DETECT)and checking

to see if the battery voltage is below the pre-charge threshold, V_(LOWV). Following this, the precharge current,

I_DET(UP)is applied for a period of T_(DETECT)and the battery voltage checked again to be above the recharge

threshold.

Passing both of the discharge and charging tests (battery terminal voltage being below the pre-charge and

above the recharge thresholds on the battery detection test) indicates a battery absent fault at the STAT1 and

STAT2 pins. Failure of either test starts a new charge cycle. For the absent battery condition the voltage on the

BAT pin rises and falls between the V_(LOWV)and V_O(REG)thresholds indefinitely. See the operation flowchart for

more details on this algorithm. If it is desired to power a system load without a battery, it is recommended to

float the TMR pin which puts the charger in LDD mode (disables termination).

The battery absent detection function is disabled when the termination is disabled.

The bq2406x provides a small battery leakage current, IBAT(DONE) (1 µA typical), after termination to pull down

the BAT pin voltage in the event of battery removal. If the leakage on the OUT pin is higher than this pulldown

current, then the voltage at the pin remains above termination and a battery-absent state will not be detected.

This problem is fixed with the addition of a pulldown resistor of 2 MΩ to 4 MΩ from the OUT pin to VSS. A

resistor too large (< 2 MΩ) can cause the OUT pin voltage to drop below the V(LOWV) threshold before the

recharge deglitch (typical 25 ms) expires, causing a fault condition. In this case the bq2406x provides a fault

current (typical 750 µA) to pull the pin above the termination threshold.

CHARGE SAFETY TIMER

As a safety mechanism the bq2406x has a user-programmable timer that monitors the total fast charge time.

This timer (charge safety timer) is started at the beginning of the fast charge period. The safety charge timeout

value is set by the value of an external resistor connected to the TMR pin (R_TMR); if pin TMR is left open

(floating) the charge safety timer is disabled.

The charge safety timer time-out value is calculated as follows:

T_(CHG)= [K_(CHG)× R_(TMR)

]

The safety timer operation modes are shown in Table 7

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Table 7. Charge Safety Timer Operational Modes

bq2460X

V(OUT) > V_(LOWV)

CHARGE SAFETY TIMER MODE

STANDBY

X

No

Yes

X

RESET

CHARGING

SUSPEND

RESET

SUSPEND

COUNTING

RESET

CHARGING, TMR PIN NOT OPEN

CHARGING, TMR PIN OPEN

In SUSPEND mode the charge safety timer is put on hold (i.e., charge safety timer is not reset), normal

operation resumes when the TS fault is removed and the timer returns to the normal operating mode

(COUNTING). If charge termination is not reached within the timer period a fault condition is detected. Under

those circumstances the LED status is updated to indicate a fault condition and the charger is turned off.

When the charge safety timer fault latch is set and the charger is turned off a small current IFAULT is applied to

the OUT pin, as long as input power (IN) is detected AND V(OUT) < V_(RCHG), as part of a timer fault recovery

protocol. This current allows the output voltage to rise above the recharge threshold V_(RCHG)if the pack is

removed, and assures that the charge safety timer fault latch is reset if the pack is removed and re-inserted.

Table 8 further details the charge safety timer fault latch operation.

Table 8. Charge Safety Timer Latch Functionality

CHARGE SAFETY TIMER FAULT ENTERED

CHARGE SAFETY TIMER FAULT LATCH RESET AT

CE rising edge, or OVP detected

V(OUT) > V_{(LOW V)}

Input power removed (not detected)

New charging cycle started; see state diagram

SHORT CIRCUIT PROTECTION

The internal comparators monitor the battery voltage and detect when a short circuit is applied to the battery

terminal. If the voltage at the BAT pin is less than the internal threshold V(scind) (1.8 V typical), the STAT pins

indicate a fault condition (STAT1 = STAT2 = Hi-Z). When the voltage at the BAT pin falls below a second

internal threshold V(sc) (1.4 V typical), the charger power stage is turned off. A recovery current, I(short) (22 mA

typical), is applied to the BAT pin, enabling detection of the short circuit removal. The battery output current

versus battery voltage is shown in the graph, Figure 24

1200

R_ISETat 840 W

1000

800

600

400

200

0

4

3.5

3

2.5

2

1.5

1

0.5

0

Battery Voltage - V

Figure 24. bq2406x Short Circuit Behavior

23

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See the application section for additional details on start-up operation with V(BAT) < V_(SC)

.

STARTUP WITH DEEPLY DEPLETED BATTERY CONNECTED

The bq2406x charger furnishes the programmed charge current if a battery is detected. If no battery is

connected the bq2406x operates as follows:

•

The output current is limited to 22 mA (typical), if the voltage at BAT pin is below the short circuit detection

threshold V_(SC), 1.8 V typical.

•

The output current is regulated to the programmed pre-charge current if V_(SC)< V(BAT) < V_(LOWV).

The output current is regulated to the programmed fast charge current If V(BAT) > V_(LOWV)AND voltage

regulation is not reached.

The output voltage collapses if no battery is present and the end equipment requires a bias current larger that

the available charge current.

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APPLICATION INFORMATION

SELECTING INPUT AND OUTPUT CAPACITOR

In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. A 1-µF

ceramic capacitor, placed in close proximity to the IN pin and GND pad, works fine. In some applications,

depending on the power supply characteristics and cable length, it may be necessary to increase the input filter

capacitor to avoid exceeding the IN pin maximum voltage rating during adapter hot plug events.

The bq2406x only requires a small output capacitor for loop stability. A 0.47 µF ceramic capacitor placed

between the BAT and ISET pad is typically sufficient.

bq2406x CHARGER DESIGN EXAMPLE

Requirements

•

Supply voltage = 5 V

Safety timer duration of 5 hours for fast charge

Fast charge current of approximately 750 mA

Battery temp sense is not used

Calculations

Program the charge current for 750 mA:

R_ISET= [V_(SET)× K_(SET)/ I_(OUT)

]

from electrical characteristics table. . . V_(SET)= 2.5 V

from electrical characteristics table. . . K_(SET)= 335

R_ISET= [2.5 V × 335 / 0.75 A] = 1.12 kΩ

Selecting the closest standard value, use a 1.13 kΩ resistor connected between ISET (pin 6) and ground.

Program 5-hour safety timer timeout:

R_(TMR)= [T_(CHG)/ K_(CHG)

]

from the electrical characteristics table. . . K_(CHG)= 0.1 hr / kΩ

K_(TMR)= [5 hrs / (0.1 hr / kΩ)] = 50 kΩ

Selecting the closest standard value, use a 49.9 kΩ resistor connected between TMR (pin 2) and ground.

Disable the temp sense function:

A constant voltage between V_TS1and V_TS2on the TS input disables the temp sense function.

from electrical characteristics table. . . V_(TS1)= 30% × V_IN

from electrical characteristics table. . . V_(TS2)= 61% × V_IN

A constant voltage of 50% × Vin disables the temp sense function, so a divide-by-2 resistor divider

connected between Vin and ground can be used. Two 1-mΩ resistors keeps the power dissipated in this

divider to a minimum.

For a 0–45°C range with a Semitee 103AT thermistor, the thermistor values are 4912 at 450°C and 2728k at

0°C. RT1 (top resisotr) and RT2 (bottom resistor) are calculated as follows:

25

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APPLICATION INFORMATION (continued)

2.5 R

R

2.5 (27.28k) (4.912k)

+ + 33.2k;

TC TH

* 3.5 R

R

+

T2

T1

R

27.28k * 3.5(4.912k)

TC

7 R

TH

R

7 (4.921k) (33.2k)

+ 10k

TH T2

_T2ƫ ⁺

3 [4.921k ) 33.2k]

₃ƪ_R

) R

TH

(6)

COMPONENTS

IN

In most applications, the minimum input capacitance needed is a 0.1 µF ceramic decoupling

capacitor near the input pin connected to ground (preferably to a grond plane through vias).

The recommended amount of input capacitance is 1 µF or at least as much as on the

output pin. This added capacitance helps with hot plug transients, input inductance and

initial charge transients.

OUT

There is no minimum value for capacitance for this output, but it is recommended to connect

a 1 µF ceramic capacitor between OUT and ground. This capacitance helps with

termination, and cycling frequency between charge done and refresh charge when no

battery is present. It also helps cancel out any battery lead inductance for long leaded

battery packs. It is recommended to put as much ceramic capacitance on the input as the

output so as not to cause a drop out of the input when charging is initiated.

ISET/BAT

For stability reasons, it may be necessary to put a 0.47-µF capacitor between the ISET and

BAT pin..

STAT1/2 and PG Optional (LED STATUS – See below, Processor Monitored; or no status)

STAT1

STAT2

PG

Connect the cathode of a red LED to the open-collector STAT1 output, and connect the

anode of the red LED to the input supply through a 1.5 kΩ resistor that limits the current.

Connect the cathode of a green LED to the open-collector STAT2 output, and connect the

anode of the green LED to the input supply through a 1.5 kΩ resistor that limits the current.

Connect the cathode of an LED to the open-collector PG output, and connect the anode of

the LED to the input supply through a 1.5 kΩ resistor to limit the current.

THERMAL CONSIDERATIONS

The bq2406x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to

provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design

guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application

Note (SLUA271).

The most common measure of package thermal performance is thermal impedance (θ_JA) measured (or

modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical

expression for θ_JAis:

T * T

J

A

q(JA) +

P

(7)

Where:

T_J= chip junction temperature

T_A= ambient temperature

P = device power dissipation

Factors that can greatly influence the measurement and calculation of θ_JAinclude:

•

Whether or not the device is board mounted

Trace size, composition, thickness, and geometry

Orientation of the device (horizontal or vertical)

Volume of the ambient air surrounding the device under test and airflow

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APPLICATION INFORMATION (continued)

•

Whether other surfaces are in close proximity to the device being tested

The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal

PowerFET. It can be calculated from the following equation when a battery pack is being charged :

P = [V(IN) – V(OUT)] × I(OUT)

Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of

the charge cycle when the battery voltage is at its lowest. See the charging profile, Figure 13 .

If the board thermal design is not adequate the programmed fast charge rate current may not be achieved under

maximum input voltage and minimum battery voltage, as the thermal loop can be active effectively reducing the

charge current to avoid excessive IC junction temperature.

USING ADAPTERS WITH LARGE OUTPUT VOLTAGE RIPPLE

Some low cost adapters implement a half rectifier topology, which causes the adapter output voltage to fall

below the battery voltage during part of the cycle. To enable operation with low cost adapters under those

conditions the bq2406x family keeps the charger on for at least 30 msec (typical) after the input power puts the

part in sleep mode. This feature enables use of external low cost adapters using 50 Hz networks.

The backgate control circuit prevents any reverse current flowing from the battery to the adapter terminal during

the charger off delay time.

Note that the PG pin is not deglitched, and it indicates input power loss immediately after the input voltage falls

below the output voltage. If the input source frequently drops below the output voltage and recovers, a small

capacitor can be used from PG to VSS to prevent /PG flashing events.

PCB LAYOUT CONSIDERATIONS

It is important to pay special attention to the PCB layout. The following provides some guidelines:

•

To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter

capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq2406x, with short

trace runs to both IN, OUT and GND (thermal pad).

•

All low-current GND connections should be kept separate from the high-current charge or discharge paths

from the battery. Use a single-point ground technique incorporating both the small signal ground path and

the power ground path.

•

The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the

maximum charge current in order to avoid voltage drops in these traces.

The bq2406x family are packaged in a thermally enhanced MLP package. The package includes a thermal

pad to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal

pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground

connection. Full PCB design guidelines for this package are provided in the application note entitled:

QFN/SON PCB Attachment Application Note (SLUA271).

27

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PACKAGE OPTION ADDENDUM

www.ti.com

2-Oct-2006

PACKAGING INFORMATION

Orderable Device

BQ24060DRCR

BQ24060DRCRG4

BQ24060DRCT

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SON

DRC

10

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

SON

DRC

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

BQ24060DRCTG4

BQ24061DRCR

BQ24061DRCRG4

BQ24061DRCT

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

BQ24061DRCTG4

BQ24064DRCR

BQ24064DRCRG4

BQ24064DRCT

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

BQ24064DRCTG4

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

2-Oct-2006

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to

discontinue any product or service without notice. Customers should obtain the latest relevant information

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent

TI deems necessary to support this warranty. Except where mandated by government requirements, testing

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TI assumes no liability for applications assistance or customer product design. Customers are responsible

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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent

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是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	SON	包装说明：	HVSSOP, SOLCC10,.12,20
针数：	10	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.18	可调阈值：	YES
模拟集成电路 - 其他类型：	POWER SUPPLY SUPPORT CIRCUIT	JESD-30 代码：	S-PDSO-G10
JESD-609代码：	e4	长度：	3 mm
湿度敏感等级：	2	信道数量：	1
功能数量：	1	端子数量：	10
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	HVSSOP
封装等效代码：	SOLCC10,.12,20	封装形状：	SQUARE
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	260
电源：	3.5/16 V	认证状态：	Not Qualified
座面最大高度：	1 mm	子类别：	Power Management Circuits
最大供电电压 (Vsup)：	16.5 V	最小供电电压 (Vsup)：	4.35 V
标称供电电压 (Vsup)：	6 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3 mm	Base Number Matches：	1

BQ24061DRCTG4

BQ24061DRCTG4 概述

BQ24061DRCTG4 规格参数

BQ24061DRCTG4 数据手册

BQ24061DRCTG4 CAD模型

BQ24061DRCTG4 替代型号

BQ24061DRCTG4 相关器件

BQ24061DRCTG4 相关文章

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型号	制造商	描述	替代类型	文档
BQ24061DRCR	TI	1A SINGLE-CHIP Li-Ion/Li-Pol CHARGE MANAGEMENT IC WITH THERMAL REGULATION	完全替代
BQ24061DRCT	TI	1A SINGLE-CHIP Li-Ion/Li-Pol CHARGE MANAGEMENT IC WITH THERMAL REGULATION	完全替代
BQ24061DRCRG4	TI	1A SINGLE-CHIP Li-Ion/Li-Pol CHARGE MANAGEMENT IC WITH THERMAL REGULATION	类似代替