BQ24100_技术文档

bq24100, bq24103

bq24105, bq24108

Actual Size

5,5 mm x 3,5 mm

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

SYNCHRONOUS SWITCHMODE, LI-ION AND LI-POLYMER CHARGE-MANAGEMENT

IC WITH INTEGRATED POWER FETs (bqSWITCHER™)

FEATURES

APPLICATIONS

•

Handheld Products

•

Ideal For Highly Efficient Charger Designs For

Single-, Two- or Three-Cell Li-Ion and

Li-Polymer

Battery Packs

Portable Media Players

Industrial and Medical Equipment

Portable Equipment

•

Integrated Synchronous Fixed-Frequency

PWM Controller Operating at 1.1 MHz With

0% to 100% Duty Cycle

DESCRIPTION

The bqSWITCHER™ series are highly integrated

•

Integrated Power FETs For Up To 2-A Charge

Rate

Li-ion

and

Li-polymer

switch-mode

charge

management devices targeted at a wide range of

portable applications. The bqSWITCHER™ series

offers integrated synchronous PWM controller and

power FETs, high-accuracy current and voltage

regulation, charge preconditioning, charge status, and

charge termination, in a small, thermally enhanced

QFN package. The system-controlled version

provides additional inputs for full charge management

under system control.

High-Accuracy Voltage and Current

Regulation

Available In Both Stand-Alone (Built-In Charge

Management and Control) and

System-Controlled (Under System Command)

Versions

•

Status Outputs For LED or Host Processor

Interface Indicates Charge-In-Progress,

Charge Completion, Fault, and AC-Adapter

Present Conditions

The bqSWITCHER charges the battery in three

phases: conditioning, constant current, and constant

voltage. Charge is terminated based on user-

selectable minimum current level. A programmable

charge timer provides a safety backup for charge

termination. The bqSWITCHER automatically restarts

the charge cycle if the battery voltage falls below an

internal threshold. The bqSWITCHER automatically

enters sleep mode when V_CCsupply is removed.

•

20-V Maximum Voltage Rating on IN and OUT

Pins

•

High-Side Current Sensing

Optional Battery Temperature Monitoring

Automatic Sleep Mode for Low Power

Consumption

•

System-Controlled Version Can Be Used In

NiMH and NiCd Applications

•

Uses Ceramic Capacitors

Reverse Leakage Protection Prevents Battery

Drainage

•

Thermal Shutdown and Protection

Built-In Battery Detection

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

bqSWITCHER, PowerPAD are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

bq24100, bq24103

bq24105, bq24108

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

These devices have limited built-in ESD protection. The leads should be shorted together or the device

placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

TYPICAL SINGLE CELL LI-ION STAND-ALONE CHARGER

L

OUT

bq24100RHL

IN OUT

10 µH

R

(SNS)

V

IN

3

4

6

2

1

10 µF

C

10 µF

OUT

IN

OUT 20

VCC

PGND 17

STAT1 PGND 18

PACK+

19 STAT2

SNS 15

BAT 14

+

VTSB

PG

5

7

PACK-

R

(ISET1)

0.1 µF

TTC

ISET1

ISET2

8

9

C

TTC

(ISET2)

16 CE

R

T1

10 VSS

PWR PAD

TS 12

TEMP

VTSB 11

BATTERY

PACK

R

T2

V

IN

V

IN

V

IN

D1

Adapter

Present

D3

Charge

D2

Done

UDG-04033

ORDERING INFORMATION⁽¹⁾

T_J

CHARGE REGULATION VOLTAGE (V)

INTENDED APPLICATION PART NUMBER⁽²⁾⁽³⁾MARKINGS

bq24100RHLR

bq24100RHLT

bq24103RHLR

bq24103RHLT

bq24105RHLR

bq24105RHLT

bq24108RHLR

bq24113RHLR

bq24113RHLT

bq24115RHLR

bq24115RHLT

CIA

CID

CIF

CIU

CIJ

CIL

4.2 V

Stand-alone

1 or 2 cells selectable (CELLS pin, 4.2 V or 8.4 V)

Externally programmable (2.1 V to 15.5 V)

4.2 (Blinking status pins)

Stand-alone

–40°C to 125°C

1 or 2 cells selectable (CELLS pin, 4.2 V or 8.4 V)

System-controlled

Externally programmable (2.1 V to 15.5 V)

System-controlled

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

Web site at www.ti.com.

(2) The RHL package is available in the following options:

T - taped and reeled in quantities of 3,000 devices per reel

R - taped and reeled in quantities of 250 devices per reel

(3) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for

use in specified lead-free soldering processes.

2

bq24100, bq24103

bq24105, bq24108

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

PACKAGE DISSIPATION RATINGS

T_A< 40°C

POWER RATING

DERATING FACTOR

ABOVE T_A= 40°C

PACKAGE

Θ_JA

RHL⁽¹⁾

46.87°C/W

1.81 W

0.021 W/°C

(1) This data is based on using the JEDEC High-K board, and the exposed die pad is connected to a copper pad on the board. This is

connected to the ground plane by a 2x3 via matrix.

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

over operating free-air temperature range (unless otherwise noted)

UNIT

Supply voltage range (with respect to V_SS

)

IN, VCC

20 V

–0.3 V to 20 V

–0.7 V to 20 V

7 V

STAT1, STAT2, PG, CE, CELLS, SNS, BAT

OUT

Input voltage range (with respect to V_SSand PGND)

CMODE, TS, TTC

VTSB

3.6 V

ISET1, ISET2

3.3 V

Voltage difference between SNS and BAT inputs (V_SNS- V_BAT

)

±1 V

Output sink

STAT1, STAT2, PG

OUT

10 mA

Output current (average)

Operating free-air temperature range

Junction temperature range

Storage temperature

2.2 A

T_A

–40°C to 85°C

–40°C to 125°C

–65°C to 150°C

300°C

T_J

T_stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS

MIN

4.35⁽¹⁾

–40

NOM

MAX UNIT

Supply voltage, V_CCand IN (Tie together)

Operating junction temperature range, T_J

16.0⁽²⁾

V

125

°C

(1) The IC continues to operate below V_min, to 3.5 V, but the specifications are not tested and not guaranteed.

(2) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the IN or OUT pins. A tight layout

minimizes switching noise.

ELECTRICAL CHARACTERISTICS

T_J= 0°C to 125°C and recommended supply voltage range (unless otherwise stated)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

INPUT CURRENTS

V_CC> V_CC(min), PWM switching

V_CC> V_CC(min), PWM NOT switching

V_CC> V_CC(min), CE = HIGH

10

mA

µA

I_VCC(VCC)

V_CCsupply current

5

315

0°C ≤ T_J≤ 65°C, V_I(BAT)= 4.2 V,

V_CC< V_(SLP)or V_CC> V_(SLP)but not in charge

3.5

5.5

7.7

Battery discharge sleep current, (SNS,

BAT, OUT, FB pins)

0°C ≤ T_J≤ 65°C, V_I(BAT)= 8.4 V,

V_CC< V_(SLP)or V_CC> V_(SLP)but not in charge

I_(SLP)

µA

0°C ≤ T_J≤ 65°C, V_I(BAT)= 12.6 V,

V_CC< V_(SLP)or V_CC> V_(SLP)but not in charge

3

bq24100, bq24103

bq24105, bq24108

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

ELECTRICAL CHARACTERISTICS (continued)

T_J= 0°C to 125°C and recommended supply voltage range (unless otherwise stated)

PARAMETER

VOLTAGE REGULATION

TEST CONDITIONS

MIN

TYP

MAX

UNIT

CELLS = Low, in voltage regulation

CELLS = High, in voltage regulation

Operating in voltage regulation

4.2

8.4

4.2

Output voltage, bq24103/13

Output voltage, bq24100/08

V_OREG

V

Feedback regulation REF for bq24105/15

only (W/FB)

V_IBAT

I_IBAT= 25 nA typical into pin

T_A= 25°C

2.1

–0.5%

–1%

0.5%

1%

Voltage regulation accuracy

CURRENT REGULATION - FAST CHARGE

V

_LOWV≤ V_I(BAT)< V_OREG,

I_OCHARGE

Output current range of converter

150

2000

mA

V_(VCC)- V_I(BAT)> V_(DO-MAX)

100 mV ≤ V_IREG≤ 200 mV,

1V

RSET1

V

+

1000,

IREG

V_IREG

Voltage regulated across R_(SNS)Accuracy

–10%

10%

Programmed Where

5 kΩ ≤ RSET1 ≤ 10 kΩ, Select RSET1 to

program V_IREG

,

V_{IREG(measured)}= I_OCHARGE+ R_SNS

(–10% to 10% excludes errors due to RSET1

and R_(SNS)tolerances)

V

_(LOWV)≤ V_I(BAT)≤ V_O(REG)

,

V_(ISET1)

K_(ISET1)

Output current set voltage

Output current set factor

1

V

V_(VCC)≥ V_I(BAT)

×

V(DO-MAX)

V_LOWV≤ V_I(BAT)< V_O(REG)

_(VCC)≥ V_I(BAT)

,

1000

V/A

V

+

V(DO-MAX)

PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION

Precharge to fast-charge transition voltage

V_LOWV

68

71.4

30

75

%V_O(REG)

ms

threshold, BAT, bq24100/03/05/08 ICs only

Deglitch time for precharge to fast charge

transition

Rising voltage;

t_RISE, t_FALL= 100 ns, 2-mV overdrive

t

20

15

40

I_OPRECHG

V_(ISET2)

K_(ISET2)

Precharge range

V_I(BAT)< V_LOWV, t < t_PRECHG

200

mA

mV

V/A

Precharge set voltage, ISET2

Precharge current set factor

V_I(BAT)< V_LOWV, t < t_PRECHG

100

1000

100 mV ≤ V_IREG-PRE≤ 100 mV,

0.1V

RSET2

V

+

1000,

IREG*PRE

V_IREG-PRE

Voltage regulated across R_SNS-Accuracy

–20%

20%

(PGM) Where

1.2 kΩ ≤ RSET2 ≤ 10 kΩ, Select RSET1

to program V_IREG-PRE,

V_IREG-PRE(Measured) = I_OPRE-CHG× R_SNS

(–20% to 20% excludes errors due to RSET1

and R_SNStolerances)

CHARGE TERMINATION (CURRENT TAPER) DETECTION

I_TERM

Charge current termination detection range V_I(BAT)> V_RCH

15

200

mA

mV

V/A

Charge termination detection set voltage,

ISET2

V_TERM

K_(ISET2)

V_I(BAT)> V_RCH

100

Termination current set factor

1000

Charger termination accuracy

V_I(BAT)> V_RCH

–20%

20

20%

40

Both rising and falling,

2-mV overdrive t_RISE, t_FALL= 100 ns

t_dg-TERM

Deglitch time for charge termination

30

ms

TEMPERATURE COMPARATOR AND VTSB BIAS REGULATOR

V_LTF

V_HTF

V_TCO

Cold temperature threshold, TS

Hot temperature threshold, TS

Cutoff temperature threshold, TS

LTF hysteresis

72.8

33.7

28.7

0.5

73.5

34.4

29.3

1.0

74.2

35.1

29.9

1.5

%V_O(VTSB)

4

bq24100, bq24103

bq24105, bq24108

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

ELECTRICAL CHARACTERISTICS (continued)

T_J= 0°C to 125°C and recommended supply voltage range (unless otherwise stated)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Both rising and falling,

t_dg-TS

Deglitch time for temperature fault, TS

20

30

40

ms

2-mV overdrive t_RISE, t_FALL= 100 ns

V_CC> V_IN(min)

,

V_O(VTSB)

TS bias output voltage

3.15

V

I_(VTSB)= 10 mA 0.1 µF ≤ C_O(VTSB)≤ 1 µF

V_CC

>

,

IN(min)

TS bias voltage regulation accuracy

–10%

10%

I_(VTSB)= 10 mA 0.1 µF ≤ C_O(VTSB)≤ 1 µF

BATTERY RECHARGE THRESHOLD

V_RCH

Recharge threshold voltage

Deglitch time

Below V_OREG

75

20

100

30

125

40

mV/cell

ms

V_I(BAT)< decreasing below threshold,

t_FALL= 100 ns 10-mV overdrive

t_dg-RCH

STAT1, STAT2, AND PG OUTPUTS

V_OL(STATx)Low-level output saturation voltage, STATx I_O= 5 mA

0.5

0.1

V

V_OL(PG)

Low-level output saturation voltage, PG

I_O= 10 mA

CE CMODE, CELLS INPUTS

V_IL

Low-level input voltage

I_IL= 5 µA

0

0.4

V_IH

High-level input voltage

I_IH= 20 µA

1.3

V_CC

TTC INPUT

t_PRECHG

t_CHARGE

Precharge timer

1440

25

1800

2160

572

s

Programmable charge timer range

Charge timer accuracy

Timer multiplier

t_(CHG)= C_{(TTC) ×}K_(TTC)

minutes

0.01 µF ≤ C_(TTC)≤ 0.18 µF

-10%

10%

K_TTC

2.6

min/nF

µF

C_TTC

Charge time capacitor range

TTC enable threshold voltage

0.01

0.22

V_{TTC_EN}

V_(TTC)rising

200

mV

SLEEP COMPARATOR

V

_CC≤ V_IBAT

+5 mV

V

_CC≤ V_IBAT

+75 mV

2.3 V ≤ V_I(OUT)≤ V_OREG,for 1 or 2 cells

V_SLP-ENT

Sleep-mode entry threshold

V

V_I(OUT)= 12.6 V, R_IN= 1 kΩ

bq24105/15⁽¹⁾

V

_CC≤ V_IBAT

V

_CC≤ V_IBAT

+73 mV

-4 mV

V_SLP-EXIT

Sleep-mode exit hysteresis,

Deglitch time for sleep mode

2.3 V ≤ V_I(OUT)≤ V_OREG

40

160

mV

µs

V_CCdecreasing below threshold,

t_FALL= 100 ns, 10-mV overdrive,

PMOS turns off

5

t_dg-SLP

V_CCdecreasing below threshold,

t_FALL= 100 ns, 10-mV overdrive,

STATx pins turn off

20

30

40

ms

UVLO

V_UVLO-ON

IC active threshold voltage

IC active hysteresis

V_CCrising

V_CCfalling

3.15

120

3.30

150

3.50

V

mV

PWM

7 V ≤ V_CC≤ V_CC(max)

4.5 V ≤ V_CC≤ 7 V

7 V ≤ V_CC≤ V_CC(max)

4.5 V ≤ V_CC≤ 7 V

400

500

130

150

Internal P-channel MOSFET on-resistance

Internal N-channel MOSFET on-resistance

mΩ

f_OSC

Oscillator frequency

1.1

MHz

Frequency accuracy

–9%

0%

9%

D_MAX

D_MIN

Maximum duty cycle

100%

Minimum duty cycle

t_TOD

Switching delay time (turn on)

Minimum synchronous FET on time

Synchronous FET minimum current-off

20

60

ns

t_syncmin

50

400

mA

(2)

threshold

(1) For bq24105 and bq24115 only. R_INis connected between IN and PGND pins and needed to ensure sleep entry.

(2) N-channel always turns on for ~60 ns and then turns off if current is too low.

5

bq24100, bq24103

bq24105, bq24108

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

ELECTRICAL CHARACTERISTICS (continued)

T_J= 0°C to 125°C and recommended supply voltage range (unless otherwise stated)

PARAMETER

BATTERY DETECTION

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Battery detection current during time-out

fault

I_DETECT

V_I(BAT)< V_OREG– V_RCH

2

mA

I_DISCHRG1

t_DISCHRG1

I_WAKE

Discharge current

Discharge time

Wake current

Wake time

V_SHORT< V_I(BAT)< V_OREG– V_RCH

Begins after termination detected,

400

1

µA

s

2

mA

s

t_WAKE

0.5

I_DISCHRG2

t_DISCHRG2

Termination discharge current

Termination time

400

262

µA

ms

V_I(BAT)≤ V_OREG

OUTPUT CAPACITOR

Required output ceramic capacitor range

C_OUT

from SNS to PGND, between inductor and

R_SNS

4.7

10

47

µF

Required SNS capacitor (ceramic) at SNS

C_SNS

0.1

PROTECTION

Threshold over V_OREGto turn off P-channel

MOSFET, STAT1, and STAT2 during charge

or termination states

V_OVP

OVP threshold voltage

110

117

121

%V_O(REG)

I_LIMIT

Cycle-by-cycle current limit

Short-circuit voltage threshold, BAT

Short-circuit current

2.6

1.95

35

3.6

2

4.5

2.05

65

A

V_SHORT

I_SHORT

T_SHTDWN

V_I(BAT)falling

V/cell

mA

V_I(BAT)≤ V_SHORT

Thermal trip

165

10

°C

Thermal hysteresis

RHL PACKAGE

(BOTTOM VIEW)

1

20

19

18

17

16

15

14

13

12

STAS2

PGND

CE

2

3

4

5

6

7

8

9

STAT1

IN

PG

SNS

BAT

VCC

TTC

ISET1

ISET2

NC

11

10

TS

TERMINAL FUNCTIONS

TERMINAL

bq24100,

I/O

DESCRIPTION

NAME

bq24103 bq24105 bq24113 bq24115

bq24108

Battery voltage sense input. Bypass it with a capacitor to PGND if there are

long inductive leads to battery.

BAT

14

16

14

16

14

16

14

16

I

Charger enable input. This active low input, if set high, suspends charge and

places the device in the low-power sleep mode. Do not pull up this input to

VTSB.

CE

16

6

bq24100, bq24103

bq24105, bq24108

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

TERMINAL FUNCTIONS (continued)

TERMINAL

I/O

DESCRIPTION

bq24100,

bq24108

NAME

CELLS

CMODE

FB

bq24103 bq24105 bq24113 bq24115

Available on parts with fixed output voltage. Ground or float for single-cell

operation (4.2 V). For two-cell operation (8.4 V) pull up this pin with a resistor

13

7

I

to V_CC

.

Charge mode selection: low for precharge as set by ISET2 pin and high (pull

up to VTSB or <7 V) for fast charge as set by ISET1.

7

Output voltage analog feedback adjustment. Connect the output of a resistive

voltage divider powered from the battery terminals to this node to adjust the

output battery voltage regulation.

13

IN

3, 4

8

3, 4

8

3, 4

8

3, 4

8

3, 4

8

I

Charger input voltage.

Charger current set point 1 (fast charge). Use a resistor to ground to set this

value.

ISET1

I/O

Charge current set point 2 (precharge and termination), set by a resistor

connected to ground. A low-level CMODE signal selects the ISET2 charge

rate, but if the battery voltage reaches the regulation set point, bqSWITCHER

changes to voltage regulation regardless of CMODE input.

ISET2

9

I/O

N/C

13

1

19

1

19

1

-

No connection. This pin must be left floating in the application.

1

O

OUT

Charge current output inductor connection.

20

Power-good status output (open drain). The transistor turns on when a valid

V_CCis detected. It is turned off in the sleep mode. PG can be used to drive a

LED or communicate with a host processor.

PG

5

O

PGND

SNS

17,18

15

17,18

15

17,18

15

17,18

15

17, 18

15

Power ground input

Charge current-sense input. Battery current is sensed via the voltage drop

developed on this pin by an external sense resistor in series with the battery

pack. A 0.1-µF capacitor to PGND is required.

I

Charge status 1 (open-drain output). When the transistor turns on indicates

charge in process. When it is off and with the condition of STAT2 indicates

various charger conditions (See Table 1)

STAT1

STAT2

TS

2

19

12

7

2

19

12

7

2

19

12

7

2

O

I

Charge status 2 (open-drain output). When the transistor turns on indicates

charge is done. When it is off and with the condition of STAT1 indicates

various charger conditions (See Table 1)

Temperature sense input. This input monitors its voltage against an internal

threshold to determine if charging is allowed. Use an NTC thermistor and a

voltage divider powered from VTSB to develop this voltage. (See Figure 7)

12

Timer and termination control. Connect a capacitor from this node to GND to

set the bqSWITCHER timer. When this input is low, the timer and termination

detection are disabled.

TTC

I

VCC

VSS

6

Analog device input

Analog ground input

10

TS internal bias regulator voltage. Connect capacitor (with a value between a

0.1-µF and 1-µF) between this output and VSS.

VTSB

11

O

There is an internal electrical connection between the exposed thermal pad

and VSS. The exposed thermal pad must be connected to the same potential

as the VSS pin on the printed circuit board. The power pad can be used as a

star ground connection between V_SSand PGND. A common ground plane may

be used. VSS pin must be connected to ground at all times.

Exposed

Thermal

Pad

7

bq24100, bq24103

bq24105, bq24108

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

FUNCTIONAL BLOCK DIAGRAM

-

+

8

bq24100, bq24103

bq24105, bq24108

bq24113, bq24115

www.ti.com

SLUS606C–JUNE 2004–REVISED SEPTEMBER 2005

TYPICAL CHARACTERISTICS

EFFICIENCY

vs

EFFICIENCY

vs

OUTPUT CHARGE CURRENT

100

90

100

90

80

V

IN

= 9 V

70

60

50

70

60

50

V

IN

= 4.5 V

V

IN

= 16 V

V

IN

= 16 V

40

30

40

30

20

10

20

10

0

V

= 4.2 V

V

= 8.4 V

(BAT)

1 Cell

= 25°C

2 Cell

= 25°C

T

A

0

0.5

1

1.5

2

0

0.5

1

1.5

2

I

= Output Charge Current - A

I

= Output Charge Current - A

O(CHARGE)

Figure 1.

Figure 2.

L

OUT

10 µH

bq24113RHL

R

(SNS)

V

IN

3

4

6

2

5

7

IN

OUT 1

10 µF

C

OUT

10 µF

IN

OUT 20

VCC

PGND 17

STAT1 PGND 18

PG SNS 15

CMODE BAT 14

PACK+

+

PACK-

0.1 µF

R

(ISET1)

16 CE

ISET1

ISET2

8

9

(ISET2)

R

T1

10 VSS

TS 12

TEMP

13 CELLS

VTSB 11

R

T2

BATTERY

PACK

To System

UDG-04035

Figure 3. Typical Application Circuit (System-Controlled Version)

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APPLICATION INFORMATION

POR

Check for Battery

Presence

Battery

No

Detect?

Indicate BATTERY

ABSENT

Yes

Suspend Charge

TS Pin

in LTF to HTF

Range?

No

Indicate CHARGE

SUSPEND

Yes

V_BAT<V_LOWV

No

Regulate

I_PRECHG

Reset and Start

T30min timer

Yes

Indicate Charge-

In-Progress

Suspend Charge

TS pin

in LTF to TCO

range?

Reset and Start

FSTCHG timer

No

Indicate CHARGE

SUSPEND

No

Regulate

Current or Voltage

Yes

V_BAT<V_LOWV

Yes

TS pin

in LTF to HTF

range?

Indicate Charge-

In-Progress

No

Suspend Charge

Yes

TS Pin

in LTF to TCO

Range?

No

Indicate CHARGE

SUSPEND

T30min

Expired?

No

Yes

No

TS pin

in LTF to HTF

range?

FSTCHG Timer

Expired?

No

V_BAT<V_LOWV

No

Yes

- Fault Condition

- Enable I_DETECT

No

I_TERMdetection?

Indicate Fault

No

Yes

Battery

Replaced?

(Vbat < Vrch?)

- Turn Off Charge

- Enable I_DISCHGfor

t_DISCHG2

Indicate Charge-

In-Progress

Yes

*NOTE: If the TTC pin is

pulled low, the safety timer

and termination are

Charge Complete

V_BAT< V_RCH

?

No

disabled; the charger

continues to regulate, and

the STAT pins indicate

charge in progress.

Indicate DONE

*

Battery Removed

If the TTC pin is pulled high

(VTSB), only the safety

timer is disabled

Yes

Indicate BATTERY

ABSENT

(termination is normal).

Figure 4. Stand-Alone Version Operational Flow Chart

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APPLICATION INFORMATION (continued)

POR

SLEEP MODE

Vcc > V

Checked at All

I(BAT)

No

Indicate SLEEP

MODE

No

Times

Yes

/CE=Low

Yes

Regulate

I

O(PRECHG)

CMODE=Low

Yes

Indicate Charge-

In-Progress

No

Yes

/CE=High

No

Regulate Current

or Voltage

Yes

Indicate Charge-

In-Progress

CMODE=High

or

Yes

V

in V

REG

IBAT

Yes

No

CMODE=Low

No

/CE=High

Yes

Turn Off Charge

Indicate DONE

Yes

No

/CE=Low

Yes

Figure 5. System-Controlled Operational Flow Chart

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FUNCTIONAL DESCRIPTION FOR STAND-ALONE VERSION (bq2410x)

The bqSWITCHER™ supports a precision Li-ion or Li-polymer charging system for single-, two- or three-cell

applications. See Figure 4 and Figure 5 for operational flow charts and Figure 6 for a typical charge profile.

Precharge

Phase

Voltage Regulation and

Charge Termination Phase

Current Regulation Phase

Regulation Voltage

Regulation Current

Charge Voltage

V

LOW

V

SHORT

Charge Current

Precharge

and Termination

I

SHORT

Programmable

Safety Timer

Precharge

Timer

UDG-04037

Figure 6. Typical Charging Profile

Temperature Qualification

The bqSWITCHER continuously monitors battery temperature by measuring the voltage between the TS pin and

VSS pin. A negative temperature coefficient thermistor (NTC) and an external voltage divider typically develop

this voltage. The bqSWITCHER compares this voltage against its internal thresholds to determine if charging is

allowed. To initiate a charge cycle, the battery temperature must be within the V_(LTF)-to-V_(HTF)thresholds. If

battery temperature is outside of this range, the bqSWITCHER suspends charge and waits until the battery

temperature is within the V_(LTF)-to-V_(HTF)range. During the charge cycle (both precharge and fast charge), the

battery temperature must be within the V_(LTF)-to-V_(TCO)thresholds. If battery temperature is outside of this range,

the bqSWITCHER suspends charge and waits until the battery temperature is within the V_(LTF)-to-V_(HTF)range.

The bqSWITCHER suspends charge by turning off the PWM and holding the timer value (i.e., timers are not

reset during a suspend condition). Note that the bias for the external resistor divider is provided from the VTSB

output. Applying a constant voltage between the V_(LTF)-to-V_(HTF)thresholds to the TS pin disables the

temperature-sensing feature.

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FUNCTIONAL DESCRIPTION FOR STAND-ALONE VERSION (bq2410x) (continued)

V

CC

Charge Suspend

V

(LTF)

Temperature Range

to Initiate Charge

Temperature Range

During Charge Cycle

V

(HTF)

V

(TCO)

Charge Suspend

V

SS

Figure 7. TS Pin Thresholds

Battery Preconditioning (Precharge)

On power up, if the battery voltage is below the V_LOWVthreshold, the bqSWITCHER applies a precharge current,

I_PRECHG, to the battery. This feature revives deeply discharged cells. The bqSWITCHER activates a safety timer,

t_PRECHG, during the conditioning phase. If the V_LOWVthreshold is not reached within the timer period, the

bqSWITCHER turns off the charger and enunciates FAULT on the STATx pins. In the case of a FAULT

condition, the bqSWITCHER reduces the current to I_DETECT. I_DETECTis used to detect a battery replacement

condition. Fault condition is cleared by POR or battery replacement.

The magnitude of the precharge current, I_O(PRECHG), is determined by the value of programming resistor, R_(ISET2)

,

connected to the ISET2 pin.

K

V

(ISET2)

I

⁺ǒ_R

_(SNS)Ǔ

O(PRECHG)

R

(ISET2)

(1)

where

R_SNSis the external current-sense resistor

V_(ISET2)is the output voltage of the ISET2 pin

K_(ISET2)is the V/A gain factor

V_(ISET2)and K_(ISET2)are specified in the Electrical Characteristics table.

Battery Charge Current

The battery charge current, I_O(CHARGE), is established by setting the external sense resistor, R_(SNS), and the

resistor, R_(ISET1), connected to the ISET1 pin.

In order to set the current, first choose R_(SNS)based on the regulation threshold V_IREGacross this resistor. Let

V_IREG= 100 mV to start and calculate the R_SNSvalue needed.

V

IREG

R

+

(SNS)

I

OCHARGE

(2)

If this value is not a standard sense resistor value, choose the next larger value. Using the selected standard

value, solve for V_IREG

.

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FUNCTIONAL DESCRIPTION FOR STAND-ALONE VERSION (bq2410x) (continued)

V

R

I

OCHARGE

IREG

(SNS)

(3)

(4)

The value of R_(ISET1)is then calculated based on the following equation:

K

V

ISET1

1000 V

R

+

SET1

I

R

V

OCHARGE

SNS

IREG

where

V_IREGis the voltage regulated across R_SNS

I_OCHARGEis the battery charge current

R_SNSis the external current sense resistor

V_(ISET1)is the output voltage of the ISET1 pin

K_(ISET1)is the V/A gain factor (see Electrical Characteristics table)

The following provide a more detailed design procedure and example for this parameter:

1. Select the charge current.

Example:

•

I_OCHARGE= 2 A

I_OPRECHG= 200 mA

2. Select the sense resistor value. Ensure that the power rating of the sense resistor is not exceeded

Example:

•

Let V_IREG= 100 mV (S/B from 100–200 mV

Solve for

V

IREG

100 mV

2 A

R

+

+ 50 mW

(SNS)

I

OCHARGE

(5)

(6)

•

Check availability for R_(SNS). Use value that is equal (next larger value if not available).

Check for power dissiaption

ǒ_I_OCHARGEǓ²

(SNS)

2

(

)

P

+ R

+ 0.05 W 2 A + 0.2 W

(SNS)

•

Select 0805 or 1206 size rated at 0.25 W

3. Determine R_(ISET1)

•

V_(ISET1)= 1 V

K_(ISET1)= 1000 V/A

K

R

V

(ISET1)

1000 VńA 1 V

0.05 W 2 A

(ISET1)

R

+

+ 10 kW

(ISET1)

I

(SNS)

OCHARGE

(7)

4. Determine R_(ISET2)

•

V_(ISET2)= 0.1 V

K_(ISET2)= 1000 V/A

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FUNCTIONAL DESCRIPTION FOR STAND-ALONE VERSION (bq2410x) (continued)

K

R

V

(ISET2)

1000 VńA 0.1 V

0.05 W 0.2 A

(ISET2)

R

+

+ 10 kW

(ISET2)

I

(SNS)

OPRECHG

(8)

R

SENSE

SNS

BAT

V

= 1 V

(ISET1)

ISET1

I

(ISET1)

R

(ISET1)

V

= 0.1 V

(ISET2)

ISET2

R

(ISET2)

I

(ISET2)

VSS

UDG-04036

Figure 8. Program Charge Current with R_(ISET1)and R_(ISET2)

Battery Voltage Regulation

The voltage regulation feedback occurs through the BAT pin. This input is tied directly to the positive side of the

battery pack. The bqSWITCHER monitors the battery-pack voltage between the BAT and VSS pins. The

bqSWITCHER is offered in two fixed-voltage versions: 4.2 V and 8.4 V as selected by the CELLS input. A low or

floating input on the CELLS selects single-cell mode (4.2 V) while a high-input selects two-cell mode.

For device options that include adjustable output voltage, the voltage regulation feedback is through the FB pin.

A resistor divider is used from the battery output voltage to GND. The BAT pin remains connected directly to the

battery output voltage for current sensing with respect to SNS.

Charge Termination and Recharge

The bqSWITCHER monitors the charging current during the voltage regulation phase. Once the termination

threshold, I_TERM, is detected, the bqSWITCHER terminates charge. The termination current level is selected by

the value of programming resistor, R_(ISET2), connected to the ISET2 pin.

K

⁺ǒ_R

V

(ISET2)

TERM

I

TERM

_(SNS)Ǔ

R

(ISET2)

(9)

where

R_(SNS)is the external current-sense resistor

V_TERMis the output of the ISET2 pin

K_(ISET2)is the A/V gain factor

V_TERMand K_(ISET2)are specified in the Electrical Characteristics table

As a safety backup, the bqSWITCHER also provides a programmable charge timer. The charge time is

programmed by the value of a capacitor connected between the TTC pin and GND by the following formula:

t

C

K

CHARGE

(TTC)

(10)

where

C_(TTC)is the capacitor connected to the TTC pin

K_(TTC)is the multiplier

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FUNCTIONAL DESCRIPTION FOR STAND-ALONE VERSION (bq2410x) (continued)

A new charge cycle is initiated when one of the following conditions is detected:

•

The battery voltage falls below the V_RCHthreshold.

Power-on reset (POR), if battery voltage is below the V_RCHthreshold

CE toggle

TTC pin, described as follows.

In order to disable the charge termination and safety timer, the user can pull the TTC input below the V_{TTC_EN}

threshold. Going above this threshold enables the termination and safety timer features and also resets the timer.

Tying TTC high to VTSB disables the safety timer only.

Sleep Mode

The bqSWITCHER enters the low-power sleep mode if the VCC pin is removed from the circuit. This feature

prevents draining the battery during the absence of VCC.

Charge Status Outputs

The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in Table 1 and Table 2.

These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates that

the open-drain transistor is turned off.

Table 1. Status Pins Summary

Charge State

STAT1

ON

STAT2

OFF

ON

Charge-in-progress

Charge complete

OFF

Charge suspend, timer fault, overvoltage, sleep mode, battery absent⁽¹⁾

OFF

(1) bq2411x ICs do not have timer-fault or battery-absent modes

Table 2. Status Pins Summary (bq24108 only)

Charge State

STAT1

STAT2

OFF

ON

Battery absent

OFF

ON

Charge-in-progress

Charge complete

OFF

Battery over discharge, V_I(BAT)< V_(SC)

ON/OFF (0.5 Hz)

OFF

Charge suspend, (due to TS pin and internal thermal protection)

Precharge timer fault

Fast-charge timer fault

Sleep mode

PG Output

The open-drain PG (power good) indicates when the AC-to-DC adapter (i.e., V_CC) is present. The output turns on

when sleep-mode exit threshold, V_SLP-EXIT, is detected. This output is turned off in the sleep mode. The PG pin

can be used to drive an LED or communicate to the host processor.

CE Input (Charge Enable)

The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the

charge and a high-level V_CCsignal disables the charge. A high-to-low transition on this pin also resets all timers

and fault conditions. Note that the CE pin cannot be pulled up to VTSB voltage. This may create power-up

issues.

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Battery Absent Detection

For applications with removable battery packs, bqSWITCHER provides a battery absent detection scheme to

reliably detect insertion and/or removal of battery packs.

POR or V

RCH

Detection routine runs on power up

and if V drops below refresh

BAT

threshold due to removing battery

or discharging battery.

Yes

Enable

(DETECT)

I

for t

(DETECT)

BATTERY

PRESENT,

No

V

I(BAT)

<V

(LOWV)

Begin Charge

Yes

Apply I

(WAKE)

for t

BATTERY

PRESENT,

Begin Charge

V

>

I(BAT)

No

V

O(REG)

-V

RCH

Yes

BATTERY

ABSENT

Figure 9. Battery Absent Detection for bq2410x ICs only

The voltage at the BAT pin is held above the battery recharge threshold, V_RCH, by the charged battery following

fast charging. When the voltage at the BAT pin falls to the recharge threshold, either by a load on the battery or

due to battery removal, the bqSWITCHER begins a battery absent detection test. This test involves enabling a

detection current, I_DETECT, for a period of t_DETECTand checking to see if the battery voltage is below the precharge

threshold, V_LOWV. Following this, the precharge current, I_OPRECHGis applied for a period of t_DETECTand the battery

voltage is checked again to ensure that it is above the recharge threshold. The purpose of this current is to

attempt to close a battery pack with an open protector, if one is connected to the bqSWITCHER.

Passing both of the discharge and charging tests indicates a battery absent fault at the STAT pins. Failure of

either test starts a new charge cycle. For the absent battery condition, the voltage on the BAT pin rises and falls

between the V_LOWVand V_OREGthresholds indefinitely.

Timer Fault Recovery

As shown in Figure 5, bqSWITCHER provides a recovery method to deal with timer fault conditions. The

following summarizes this method.

Condition 1 V_I(BAT)above recharge threshold (V_OREG- V_RCH) and timeout fault occurs.

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Recovery method: bqSWITCHER waits for the battery voltage to fall below the recharge threshold. This could

happen as a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the

recharge threshold, the bqSWITCHER clears the fault and enters the battery absent detection routine. A POR or

CE or TTE toggle also clears the fault.

Condition 2 Charge voltage below recharge threshold (V_RCH) and timeout fault occurs

Recovery method: Under this scenario, the bqSWITCHER applies the I_DETECTcurrent. This small current is used

to detect a battery removal condition and remains on as long as the battery voltage stays below the recharge

threshold. If the battery voltage goes above the recharge threshold, then the bqSWITCHER disables the I_DETECT

current and executes the recovery method described for Condition 1. Once the battery falls below the recharge

threshold, the bqSWITCHER clears the fault and enters the battery absent detection routine. A POR or CE toggle

also clears the fault.

Output Overvoltage Protection (Applies To All Versions)

The bqSWITCHER provides a built-in overvoltage protection to protect the detect and other components against

damages if the battery voltage gets too high, as when the battery is suddenly removed. When an overvoltage

condition is detected, this feature turns off the PWM and STATx pins. The fault is cleared once V_IBATdrops to the

recharge threshold (V_OREG- V_RCH).

FUNCTIONAL DESCRIPTION FOR SYSTEM-CONTROLLED VERSION (bq2411x)

For applications requiring charge management under the host system control, the bqSWITCHER (bq2411x)

offers a number of control functions. The following section describes these functions.

Precharge And Fast-Charge Control

A low-level signal on the CMODE pin forces the bqSWITCHER to charge at the precharge rate set on the ISET2

pin. A high-level signal forces charge at fast-charge rate as set by the ISET1 pin. If the battery reaches the

voltage regulation level, V_OREG, the bqSWITCHER transitions to voltage regulation phase regardless of the status

of the CMODE input.

Charge Termination And Safety Timers

The charge timers and termination are disabled in the system-controlled versions of the bqSWITCHER. The host

system can use the CE input to enable or disable charge. When an overvoltage condition is detected, the

charger process stops, and all power FETs are turned off.

Inductor, Capacitor, and Sense Resistor Selection Guidelines

The bqSWITCHER provides internal loop compensation. With this scheme, best stability occurs when LC

resonant frequency, f_ois approximately 16 kHz (8 kHz to 32 kHz). Equation 11 can be used to calculate the

value of the output inductor and capacitor. Table 3 provides a summary of typical component values for various

charge rates.

1

f +

0

Ǹ_L

2p

C

OUT

(11)

Table 3. Output Components Summary

CHARGE CURRENT

Output inductor, L_OUT

0.5 A

22 µH

4.7 µF

0.2 Ω

1 A

2 A

4.7 µH

10 µH

10 µF

0.1 Ω

Output capacitor, C_OUT

Sense resistor, R_(SNS)

22 µF (or 2 × 10 µH) ceramic

0.05 Ω

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THERMAL CONSIDERATIONS

The SWITCHER is packaged in a thermally enhanced MLP package. The package includes a thermal pad to

provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design

guidelines for this package are provided in the application report entitled: QFN/SON PCB Attachment

(SLUA271).

The most common measure of package thermal performance is thermal impedance (Θ_JA) measured (or modeled)

from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for Θ_JA

is:

T_JT_A

q_(JA)

+

P

(12)

Where:

T_J= chip junction temperature

T_A= ambient temperature

P = device power dissipation

Factors that can greatly influence the measurement and calculation of Θ_JAinclude:

•

Whether or not the device is board mounted

Trace size, composition, thickness, and geometry

Orientation of the device (horizontal or vertical)

Volume of the ambient air surrounding the device under test and airflow

Whether other surfaces are in close proximity to the device being tested

The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal power

FET. It can be calculated from the following equation:

P = [Vin × lin - Vbat × Ibat]

Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of

the charge cycle when the battery voltage is at its lowest. (See Figure 6.)

PCB LAYOUT CONSIDERATION

It is important to pay special attention to the PCB layout. The following provides some guidelines:

•

To obtain optimal performance, the power input capacitors, connected from input to PGND, should be placed

as close as possible to the bqSWITCHER. The output inductor should be placed directly above the IC and

the output capacitor connected between the inductor and PGND of the IC. The intent is to minimize the

current path loop area from the OUT pin through the LC filter and back to the GND pin. The sense resistor

should be adjacent to the junction of the inductor and output capacitor. Route the sense leads connected

across the R_(SNS)back to the IC, close to each other (minimize loop area) or on top of each other on adjacent

layers (do not route the sense leads through a high-current path). Use an optional capacitor downstream

from the sense resistor if long (inductive) battery leads are used.

•

Place all small-signal components (C_TTC, RSET1/2 and TS) close to their respective IC pin (do not place

components such that routing interrupts power stage currents). All small control signals should be routed

away from the high current paths.

The PCB should have a ground plane (return) connected directly to the return of all components through vias

(3 vias per capacitor for power-stage capacitors, 3 vias for the IC PGND, 1 via per capacitor for small-signal

components). A star ground design approach is typically used to keep circuit block currents isolated

(high-power/low-power small-signal) which reduces noise-coupling and ground-bounce issues. A single

ground plane for this design gives good results. With this small layout and a single ground plane, there is not

a ground-bounce issue, and having the components segregated minimizes coupling between signals.

•

The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum

charge current in order to avoid voltage drops in these traces. The PGND pins should be connected to the

ground plane to return current through the internal low-side FET. The thermal vias in the IC PowerPAD™

provide the return-path connection.

The bqSWITCHER is packaged in a thermally enhanced MLP package. The package includes a thermal pad

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PCB LAYOUT CONSIDERATION (continued)

to provide an effective thermal contact between the IC and the PCB. Full PCB design guidelines for this

package are provided in the application report entitled: QFN/SON PCB Attachment (SLUA271). Six 10-13 mil

vias are a minimum number of recommended vias, placed in the IC's power pad, connecting it to a ground

thermal plane on the opposite side of the PWB. This plane must be at the same potential as V_SSand PGND

of this IC.

•

See user guide SLUU200 for an example of good layout.

WAVEFORMS: All waveforms are taken at Lout (IC Out pin). V_IN= 7.6 V and the battery was set to 2.6 V, 3.5 V,

and 4.2 V for the three waveforms. When the top switch of the converter is on, the waveform is at ~7.5 V, and

when off, the waveform is near ground. Note that the ringing on the switching edges is small. This is due to a

tight layout (minimized loop areas), a shielded inductor (closed core), and using a low-inductive scope ground

lead (i.e., short with minimum loop) .

Precharge: The current is low in precharge; so, the bottom synchronous FET turns off after its minimum on-time

which explains the step between ~0 V and -0.5 V. When the bottom FET and top FET are off, the current

conducts through the body diode of the bottom FET which results in a diode drop below the ground potential.

The initial negative spike is the delay turning on the bottom FET, which is to prevent shoot-through current as the

top FET is turning off.

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PCB LAYOUT CONSIDERATION (continued)

Fast Charge: This is captured during the constant-current phase. The two negative spikes are the result of the

short delay when switching between the top and bottom FETs. The break-before-make action prevents current

shoot-through and results in a body diode drop below ground potential during the break time.

Charge during Voltage Regulation and Approaching Termination: Note that this waveform is similar to the

precharge waveform. The difference is that the battery voltage is higher so the duty cycle is slightly higher. The

bottom FET stays on longer because there is more of a current load than during precharge; it takes longer for the

inducator current to ramp down to the current threshold where the synchronous FET is disabled.

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Application Note: Charging Battery and Powering System Without Affecting Battery Charge and

Termination.

L

OUT

bq24100RHL

IN OUT

10 µH

R

(SNS)

V

IN

3

4

6

2

1

R

(SYS)

10 µF

C

10 µF

OUT

IN

OUT 20

VCC

PGND 17

STAT1 PGND 18

PACK+

19 STAT2

SNS 15

BAT 14

+

PG

5

7

PACK-

VTSB

R

(ISET1)

0.1 µF

TTC

ISET1

ISET2

8

9

C

TTC

(ISET2)

16 CE

R

T1

10 VSS

PWR PAD

TS 12

TEMP

VTSB 11

BATTERY

PACK

R

T2

V

IN

V

IN

V

IN

D1

Adapter

Present

D3

Charge

D2

Done

UDG-04033

The bqSWITCHER was designed as a stand-alone battery charger but can be easily adapted to power a system

load, while considering a few minor issues.

Advantages:

1. The charger controller is based only on what current goes through the current-sense resistor (so precharge,

constant current, and termination all work well), and is not affected by the system load.

2. The input voltage has been converted to a usable system voltage with good efficiency from the input.

3. Extra external FETs are not needed to switch power source to the battery.

4. The TTC pin can be grounded to disable termination and keep the converter running and the battery fully

charged, or let the switcher terminate when the battery is full and then run off of the battery via the sense

resistor.

Other Issues:

1. If the system load current is large (≥ 1 A), the IR drop across the battery impedance causes the battery

voltage to drop below the refresh threshold and start a new charge. The charger would then terminate due to

low charge current. Therefore, the charger would cycle between charging and termination. If the load is

smaller, the battery would have to discharge down to the refresh threshold resulting in a much slower

cycling. Note that grounding the TTC pin keeps the converter on continuously.

2. If TTC is grounded, the battery is kept at 4.2 V (not much different than leaving a fully charged battery set

unloaded).

3. Eefficiency declines 2-3% hit when discharging through the sense resistor to the system.

22

PACKAGE OPTION ADDENDUM

www.ti.com

18-Oct-2005

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

QFN

Drawing

BQ24100RHL

PREVIEW

ACTIVE

RHL

20

50

TBD

Call TI

BQ24100RHLR

RHL

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

BQ24103RHLR

BQ24105RHLR

BQ24108RHLR

BQ24113RHLR

BQ24113RHLRG4

BQ24115RHLR

ACTIVE

QFN

RHL

20

3000

Pb-Free

(RoHS)

CU NIPDAU Level-1-260C-UNLIM

3000

Pb-Free

(RoHS)

CU NIPDAU Level-1-260C-UNLIM

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000

Pb-Free

(RoHS)

CU NIPDAU Level-1-260C-UNLIM

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan

-

The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS

&

no Sb/Br)

-

please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

IMPORTANT NOTICE

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enhancements, improvements, and other changes to its products and services at any time and to discontinue

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

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logic.ti.com

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型号：	BQ24100
厂家：	TEXAS INSTRUMENTS
描述：	SYNCHRONOUS SWITCHMODE, LI-ION AND LI-POL CHARGE MANAGEMENT IC WITH INTEGRATED POWERFETS 同步开关模式，锂离子和锂聚合物充电管理IC，集成POWERFETS 开关
文件：	总26页 (文件大小：613K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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