BQ24203 [TI]
SINGLE CHIP U-I ONAND LI-POL CHARGE MANAGEMENT IC FOR CURRENT LIMITED APPLICATIONS; 单芯片UI ONAND锂聚合物充电管理IC电流受限的应用![BQ24203](http://pdffile.icpdf.com/pdf1/p00076/img/icpdf/BQ24203_398055_icpdf.jpg)
型号: | BQ24203 |
厂家: | ![]() |
描述: | SINGLE CHIP U-I ONAND LI-POL CHARGE MANAGEMENT IC FOR CURRENT LIMITED APPLICATIONS |
文件: | 总14页 (文件大小:205K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢂꢄ ꢂ
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SLUS501A – OCTOBER 2001
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FEATURES
DESCRIPTION
D
D
Designed Specifically to Work With
Current-Limited Wall Supplies
The bq2420x series are simple Li-Ion linear
charge management devices targeted at low-cost
and space limited charger applications. The
bq2420x series offer integrated powerFET,
high-accuracy voltage regulation, temperature
monitoring, charge status, and charge
termination, in a single monolithic device.
Ideal for Low Dropout Charger Design for
Single-Cell Li-Ion Packs With Coke or
Graphite Anodes
D
D
Integrated PowerFET for 500 mA
Integrated Voltage Regulation With 0.5%
Accuracy
The bq2420x is designed to work with a
current-limited wall-mount transformer and
therefore does not provide any current regulation.
However, these devices offer a fixed internal
current limit to prevent damage to the internal
powerFET. A time-limited pre-conditioning phase
is provided to condition deeply discharged cells.
Once the battery reaches the charge voltage, the
high accuracy voltage regulation loop takes over
and completes the charge cycle. Charge is
terminated based on minimum current. An internal
charge timer provides a backup safety for charge
termination.
D
Battery Insertion and Removal Detection
D
Charge Termination by Minimum Current and
Time
D
D
D
Pre-Charge Conditioning With Safety Timer
Sleep Mode for Low-Power Consumption
Charge Status Output for LED or Host
Processor Interface Indicates
Charge-in-Progress, Charge Completion, and
Fault Conditions
D
D
Optional Temperature Monitoring Before and
During Charge
Other standard features include an automatic
Small, 8-Pin Power-Pad MSOP Package
sleep mode activated when V
battery voltage and a recharge feature activated
falls below the
CC
when the battery voltage falls below the V
threshold.
RCH
TYPICAL APPLICATION
bq24202DGN
DC+
In addition to the standard features, the core
product provides two additional enhancements:
temperature monitoring and status display. The
temperature-sense circuit continuously measures
battery temperature using an external thermistor
and inhibits charge until the battery temperature is
within the user–defined thresholds. The STAT pin
indicates three conditions of operation of the
charger. These conditions are charge-
in-progress, charge complete, and fault. This
output can be used to drive an LED or an interface
to a microcontroller.
1
2
3
4
IN
OUT
8
7
6
5
C1
C1
VCC BAT
+
STAT
VSS
CE
DC–
R1
N/C
BATTERY PACK
UDG–01111
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Copyright 2001, Texas Instruments Incorporated
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ꢀ ꢁ ꢂꢃ ꢂꢄ ꢇ ꢅ ꢀ ꢁ ꢂ ꢃꢂ ꢄ ꢃ ꢅ ꢀꢁ ꢂ ꢃ ꢂꢄ ꢈ
SLUS501A – OCTOBER 2001
AVAILABLE OPTIONS
CHARGE
REGULATION
VOLTAGE
PACKAGED
DEVICES
(DGN)
OPTIONAL
FUNCTIONS
T
J
MARKING
4.2 V
4.1 V
4.2 V
4.1 V
4.2 V
4.1 V
STAT and TS
AZC
AZD
AZE
AZF
AZG
AZI
bq24200DGN
bq24201DGN
bq24202DGN
bq24203DGN
bq24204DGN
bq24205DGN
STAT and TS
STAT
STAT
–
–40C to 125C
–
†
The DGN package is available taped and reeled. Add TR suffix to device type (e.g. bq24200DGNTR) to order. Quantities
2500 devices per reel.
bq24202, bq24203
HTSSOP (DGN) PACKAGE
(TOP VIEW)
bq24200, bq24201
HTSSOP (DGN) PACKAGE
(TOP VIEW)
bq24204, bq24205
HTSSOP (DGN) PACKAGE
(TOP VIEW)
IN
OUT
BAT
CE
8
IN
OUT
BAT
TS
IN
OUT
BAT
CE
8
7
6
5
8
7
6
5
1
2
3
4
1
2
3
4
1
2
3
4
*
*
*
V
7
6
5
V
V
CC
N/C
CC
STAT
CC
STAT
V
N/C
V
N/C
V
N/C
SS
SS
SS
* Thermal pad is electrically connected to the ground of the device (V ).
SS
Terminal Functions
TERMINAL
NO.
I/O
DESCRIPTION
NAME
BAT
bq24200
bq24201
bq24202
bq24203
bq24204
bq24205
7
–
1
5
8
3
6
2
4
7
6
1
5
8
3
–
2
4
7
6
I
I
Battery voltage sense input
CE
Charge enable Input (active low)
Charge input voltage
IN
1
I
N/C
OUT
STAT
TS
3, 5
8
–
O
O
I
No connection. Must be left floating
Charge current output
–
Charge status output
–
Temperature sense input
V
V
2
I
V
input
CC
CC
Ground input
4
–
SS
†
absolute maximum ratings over operating free–air temperature range (unless otherwise noted)
Supply voltage (Vcc with respect to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Input voltage, IN, STAT, TS (all with respect to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Input voltage, BAT, OUT (all with respect to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Output sink/source current (STAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 mA
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65_C to 150_C
stg
J
Junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40_C to 125_C
Lead temperature (soldering, 10sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300_C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
†
2
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SLUS501A – OCTOBER 2001
dissipation ratings
THERMAL IMPEDANCE
JUNCTION-TO-AMBIENT
(θ
THERMAL IMPEDANCE
JUNCTION-TO-CASE
T
25°C
DERATING FACTOR
ABOVE
A
PACKAGE
(1)
POWER
RATING
(θ
T = 25°C
A
JA
57.20°C/W
JC
4.4°C/W
8 Pin DGN
1.75 W
0.017 W/°C
NOTE 1: This data is based on using JEDEC High-K board and topside traces, top and bottom thermal pad (2mm × 3mm), internal 1 oz. power
and ground planes, four thermal via underneath the die connecting to ground plane.
recommended operating conditions
MIN
V
(LOWV–MIN)
MAX
13.5
13.5
125
UNIT
Supply voltage, V
CC
V
Input voltage, V
IN
V
(LOWV–MIN)
–40
Operating junction temperature range, T
°C
J
electrical characteristics over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
2.5
5
UNIT
mA
Vcc Current, I
Vcc > Vcc(min)
Sum of currents into OUT and BAT pins, Vcc<V
1.7
CC(VCC)
Sleep current , I
,
µA
CC(SLP)
(SLP)
o
o
0 C ≤ Tj ≤ 85 C
Sleep current , I
Sum of currents into OUT and BAT pins, Vcc<V
Sum of currents into Vcc, IN and TS pins,
10
1
µA
CC(SLP)
(SLP)
Standby Current, I
CC(STDBY)
mA
(Vcc–V
) ≤ 300 mV
I(TS)
Input Bias Current on BAT pin, I
1
1
µA
µA
IB (BAT)
Input Bias Current on TS pin, I
0.1*Vcc ≤ V ≤ 0.8*Vcc
I(TS)
IB (TS)
voltage regulation, V
+ V
≤ VCC, I
< I
≤ 500 mA, over 0°C ≤ T ≤ 125°C and supply
O(REG)
(DO–MAX)
(TERM) O(OUT) J
voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
≤ 10 V,
MIN
TYP
MAX
UNIT
Output voltage, V
V
+ V
4.0795
4.10
4.1205
Volts
O(REG)
O(REG) (DO–MAX)
I < I ≤ 250 mA
(TERM) O(OUT)
Output voltage, V
Output voltage, V
4.05
4.10
4.20
4.15
Volts
Volts
O(REG)
V
+ V
≤ 10 V,
≤ 250 mA
4.1790
4.2210
O(REG)
O(REG)
(DO–MAX)
I
< I
(TERM) O(OUT)
Output voltage, V
4.15
200
4.20
350
4.25
500
Volts
mV
O(REG)
Dropout voltage (V
–V
), V
(DO)
V
+ V ≤ Vcc,
(DO–MAX)
= 500 mA
(IN) (OUT)
O(REG)
O(OUT)
I
output current, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
500
1.6
UNIT
mA
A
Output current, I
See Note 1
See Note 1
O(OUT)
Short–circuit Trip Current, I
1
(SC)
NOTE 2: Assured by design, not production tested.
pre-charge current regulation, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
TEST CONDITIONS
MIN
10
TYP
13.5
210
MAX
17
UNIT
mA
Pre–charge Current , I
V
V
< V
(LOWV)
,
t < t
t > t
(PRECHG)
Battery Detection Current , I
I(BAT)
(30min)
= 2.5 V,
160
300
µA
(DETECT)
I(BAT)
(30min)
3
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SLUS501A – OCTOBER 2001
charge termination detection, over 0°C ≤ T ≤ 125°C And supply voltage range (unless otherwise noted)
J
PARAMETER
TEST CONDITIONS
MIN
22
TYP
25.5
1.1
MAX
29
UNIT
mA
Taper current detect threshold, I
V
V
> V
> V
(TAPER)
I(BAT)
(RCH)
Charge termination current detect thresh-
old, I
0.8
1.4
mA
I(BAT)
(RCH)
(TERM)
temperature comparator, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
Lower Temperature Threshold, V
Upper Temperature Threshold, V
Accuracy
TEST CONDITIONS
MIN
TYP
30
MAX
UNIT
%VCC
%VCC
%VCC
%VCC
TS pin voltage
TS pin voltage
(TS1)
(TS2)
60
–0.7
0.7
Hysteresis
1
low voltage battery threshold, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
TEST CONDITIONS
MIN
2.8
TYP
2.95
3.0
MAX
3.1
UNIT
Volts
Volts
o o
0 C ≤ T ≤ 85 C
J
LowV Threshold, V
(LOWV)
LowV Threshold, V
2.8
3.2
(LOWV)
battery recharge threshold, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
Recharge Threshold, V
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
V
V
Volts
RCH
O(REG)
0.115
O(REG)
–0.1
O(REG)
0.85
STAT output, Vcc ≥ V
, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
O(REG)
PARAMETER
Output (low) saturation voltage, V
Output (high) saturation voltage
TEST CONDITIONS
MIN
TYP
TYP
MAX
UNIT
Volts
Volts
Io = 10 mA
0.5
OL(STAT)
Io = –5 mA
Vcc–1.5
V
OH(STAT)
CE, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
TEST CONDITIONS
MIN
0
MAX
UNIT
Volts
Volts
Input (low) voltage, V
I
I
= 5 µA
V
CC
–1
IL(CE)
IL
Input (high) voltage V
= 20 µA
Vcc–0.3
IH(CE)
IH
timers, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
TEST CONDITIONS
MIN
TYP
2,065
2,065
12,389
MAX
2,581
2,581
15,486
UNIT
sec
Pre-charge and taper timer, t
1,548
1,548
9,292
(PRECHG)
Taper timer, t
(TAPER)
sec
Charge Timer, t
(CHG)
sec
sleep comparator, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
J
PARAMETER
Sleep–mode threshold, V
TEST CONDITIONS
≤ V
MIN
TYP
MAX
UNIT
2.3V ≤ V
I(BAT)
V(BAT)–10
Volts
(SLP)
O(REG)
mV
power-on-reset and V Ramp Rate, over 0°C ≤ T ≤ 125°C and supply voltage range (unless otherwise noted)
IN
J
PARAMETER
POR Threshold, V
TEST CONDITIONS
MIN
2.3
5
TYP
MAX
2.5
UNIT
Volts
See Note 1
See Note 1
2.4
POR
Slew rate
5 x
Volts/µs
–5
10
NOTE 1. Ensured by design, not production tested.
4
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SLUS501A – OCTOBER 2001
functional block diagram
IN
OUT
BAT
R3
R2
Vcc
Vcc
R1
Iref
Vref
VSS
Pre-Charge ok
ChargeOK
GND/HS
R4
V
Imax
RCH
R5
R6
PwrDwn
Bias &
Ref
Generator
*
LowV
PwrDwn*
Vref
Vref
Iref
Vref
Imax
TS
PwrDwn
*
Vcc
Thermal
Shutdown
Vcc
Suspend*
Charge Control,
Timer
PwrDwn*
OSC
STAT
and Display logic
ChargeOK
Pre-Charge ok
UDG–01105
detailed description
IN: This pin is connected to the source of the internal P-channel powerFET.
OUT: This pin is connected to the drain of the internal P-channel powerFET.
Battery voltage sense (BAT): Voltage sense-input tied directly to the positive side of the battery.
Temperature sense input (TS): Input for an external battery-temperature monitoring circuit.
Charge status output (STAT): High-impedance indication of various charge conditions.
Supply voltage input (VCC): Power supply input
5
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SLUS501A – OCTOBER 2001
TYPICAL CHARACTERISTICS
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
4.15
4.14
4.13
4.12
4.11
4.10
4.09
4.08
4.07
500
450
400
I
= 250 mA
OUT
350
300
= 500 mA
I
OUT
V
= 6.0 V
IN
250
200
I
= 350 mA
OUT
150
100
I
= 200 mA
OUT
V
IN
= 4.8 V
50
50
0
–50
0
100
0
20
40
60
80
100
120
140
T
J
– Junction Temperature – _C
T
A
– Junction Temperature – _C
Figure 1
Figure 2
SUPPLY CURRENT
vs
JUNCTION TEMPERATURE
DROPOUT VOLTAGE
vs
OUTPUT VOLTAGE
2.5
400
350
300
250
200
150
100
50
V
IN
= 13.5 V
2.0
1.5
I
= 500 mA
OUT
I
= 350 mA
OUT
V
IN
= 9.0 V
1.0
0.5
V
IN
= 4.5 V
I
= 200 mA
OUT
0
0.0
0
0.2
0.4
0.6
0.8
–50
0
50
100
150
V
– Output Voltage – V
T
J
– Junction Temperature – _C
O(reg)
Figure 3
Figure 4
6
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SLUS501A – OCTOBER 2001
APPLICATION INFORMATION
DC+
bq24200DGN
PACK+
1
2
IN
OUT
8
7
+
V
CC
C1
C2
PACK–
BAT
V
CC
RT1
TEMP
3
4
STAT
TS
6
5
BATTERY
PACK
DC–
R1
RT2
N/C
V
SS
UDG–01109
Figure 5. Low Dropout Single–Cell Li–Ion/Li–Pol Charger
functional description
The bq2420x supports a precision Li-Ion or Li-Pol charging system suitable for single-cells with either coke or
graphite anodes. Figure 5 shows an application schematic and Figure 6 shows the typical charge profile.
temperature qualification (bq24200 and bq24201 only)
The bq24200 and bq24201 continuously monitors battery temperature by measuring the voltage between the
TS and VSS pins. A negative- or a positive-temperature coefficient thermistor (NTC, PTC) and an external
voltage divider typically develop this voltage (see figure 5). The bq24200 and bq24201 compare this voltage
against the internal V
and V
thresholds to determine if charging is allowed (see Figure 7). The
(TS1)
(TS2)
temperature sensing circuit is immune to any fluctuation in Vcc since both the external voltage divider and the
internal thresholds are referenced to Vcc.
Once a temperature outside the V
and V
thresholds is detected the bq24200 and bq24201 immediately
(TS1)
(TS2)
suspend the charge. The bq24200 and bq24201 suspend the charge by turning off the powerFET and holding
the timer value (i.e. timers are NOT reset). Charge is resumed when the temperature returns to the normal
range.
7
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ꢀ ꢁ ꢂ ꢃꢂ ꢄ ꢄꢅ ꢀ ꢁ ꢂ ꢃꢂ ꢄ ꢆ ꢅ ꢀꢁ ꢂ ꢃ ꢂꢄ ꢂ
ꢀ ꢁ ꢂꢃ ꢂꢄ ꢇ ꢅ ꢀ ꢁ ꢂ ꢃꢂ ꢄ ꢃ ꢅ ꢀꢁ ꢂ ꢃ ꢂꢄ ꢈ
SLUS501A – OCTOBER 2001
APPLICATION INFORMATION
Current Phase
Voltage Regulation and
Pre-Conditioning
Phase
(externally limited)
Charge Termination Phase
Regulation Voltage
Charge Current
Charge Voltage
Minimum Charge Voltage
Charge Current
Taper Detect
Pre-Conditioning
Current
t
(TAPER)
t
(PRECHG)
t
(CHG)
Figure 6. Typical Charge Profile
Vcc
PowerStandby Mode
Charge Suspend and Low–
Vcc–0.3V
Charge Suspend
V
(TS2)
Normal TemperatureRange
Charge Suspend
V
(TS1)
Vss
Figure 7. TS Pin Thresholds
8
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ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢇ ꢅ ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢃ ꢅ ꢀꢁ ꢂꢃ ꢂꢄ ꢈ
SLUS501A – OCTOBER 2001
APPLICATION INFORMATION
operational flow diagram
POR
SLEEP MODE
Vcc > V
checked at all times
(SLP)
Indicate SLEEP
MODE
No
(STAT=Hi–Z)
Yes
APPLY
PRECHARGE,
Reset and Start
timer
I
V
<V
Yes
(PRECHG)
I(BAT) (LOWV)
t
(PRECHG)
Indicate Charge–
In–Progress
Current Phase
V
<V
Yes
Indicate Charge–
In–Progress
I(BAT) O(REG)
Yes
No
No
V
<V
I(BAT) O(REG)
No
V
<V
I(BAT) (LOWV)
Reset all timers,
Start t timer
(CHG)
Yes
Regulate Voltage
t
(PRECHG)
Indicate Charge–
In–Progress
Expired?
Yes
Yes
– Fault Condition
– Enable I
(DETECT)
t
Expired?
(CHG)
Yes
Indicate Fault
No
No
Yes
V
<V
I(BAT) O(REG)
Battery
replaced?
No
Yes
I
(TAPER)
Yes
detection?
No
No
t
(TAPER)
Expired?
I
(TERM)
No
detection?
Yes
Yes
Turn off charge
IndicateDONE
No
V
< V
I(BAT)
?
(RCH)
Yes
Figure 8. Operational Flow Chart
9
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ꢀ ꢁ ꢂꢃ ꢂꢄ ꢇ ꢅ ꢀ ꢁ ꢂ ꢃꢂ ꢄ ꢃ ꢅ ꢀꢁ ꢂ ꢃ ꢂꢄ ꢈ
SLUS501A – OCTOBER 2001
APPLICATION INFORMATION
The resistor values of R and R are calculated by the following equations:
T1
T2
For NTC Thermistors:
ǒ5 RT RTCǓ
H
+ ǒ
R
R
T1
3 ǒRT * RT
Ǔ
H Ǔ
C
ǒ5 RT RTCǓ
H
+ ǒ2 RT Ǔ * ǒ7 RTHǓ
T2
C
For PTC Thermistors:
ǒ5 RT RTCǓ
H
+ ǒ
R
R
T1
T2
3 ǒRT * RT
Ǔ
C Ǔ
H
ǒ5 RT RTCǓ
H
+ ǒ2 RT Ǔ * ǒ7 RTCǓ
H
Where RT is the cold temperature resistance and RT is the hot temperature resistance of thermistor, as
C
H
specified by the thermistor manufacturer.
R
the V
between (V
or R can be omitted If only one temperature (hot or cold) setting is required. Applying a voltage between
T2
T1
and V
thresholds to pin TS disables the temperature-sensing feature. Also applying a voltage
TS1
TS2
– 0.3 V) and Vcc suspends the charge and places the IC in the low-power standby mode.
CC
battery pre-conditioning
Figure 7 shows the operational flow chart for the bq2420x.
Upon power-up, if the battery voltage is below the V
threshold, the bq2420x applies a pre-charge current,
(LOWV)
I
t
, to the battery. This feature revives deeply discharged cells. The bq2420x activates a safety timer,
(PRECHG)
(PRECHG)
, during the conditioning phase. If V
threshold is not reached within the timer period, the
(LOWV)
bq2420x turns off the charger and enunciates FAULT on the STAT pin. In the case of a FAULT condition, the
bq2420x reduces the current to I . I is used to detect a battery replacement condition. Fault
(DETECT) (DETECT)
condition is cleared by POR or battery replacement.
10
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ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢂꢄ ꢂ
ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢇ ꢅ ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢃ ꢅ ꢀꢁ ꢂꢃ ꢂꢄ ꢈ
SLUS501A – OCTOBER 2001
APPLICATION INFORMATION
battery charge current
Following a successful pre-conditioning, the bq2420x relies on an external current-limited supply to limit the
charge current to the cell. The bq2420x continues this phase until the battery reaches the voltage regulation
phase.
During this phase (and all other phases of operation) in order to protect the integrated powerFET, the internal
short circuit and thermal protection circuits are active.
battery voltage regulation
The voltage regulation feedback is through the BAT pin. This input is tied directly to the positive side of the
battery pack. The bq2420x monitors the battery-pack voltage between the BAT and VSS pins. The bq2420x
is offered in two fixed-voltage versions: 4.1 V and 4.2 V.
As a safety backup, the bq2420x also monitors the charge time in the voltage regulation mode. If taper current
is not detected within this time period, t
, the bq2420x turns off the charger and enunciates FAULT on the
(CHG)
STAT pin. Fault condition is cleared by POR or battery replacement. Note that the safety timer is reset if the
bq2420x is forced out of the voltage regulation mode.
charge termination and recharge
The bq2420x monitors the charging current during the voltage regulation phase. Once the taper threshold,
I
, is detected the bq2420x initiates the taper timer, t
. Charge is terminated after the timer expires.
(TAPER)
(TAPER)
The bq2420x resets the taper timer in the event that the charge current returns above the taper threshold,
I
(TAPER).
In addition to the taper current detection, the bq2420x terminates charge in the event that the charge current
falls below the I threshold. This feature allows for quick recognition of a battery removal condition.
(TERM)
After a charge termination, the bq2420x restarts the charge once the voltage on the BAT pin falls below the
threshold. This feature keeps the battery at full capacity at all times.
V
(RCH)
sleep mode
The bq2420x enters the low-power sleep mode if the Vcc is removed from the circuit (i.e. the Vcc and IN pins
are floating). For applications where these pins are not floating, placing a low-power 10 Ω (1/16 W) between
the IN and VCC pins ensures the V
conditions are met (see Figure 9).This feature prevents draining the
(SLP)
battery during the absence of V
.
CC
11
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ꢀ ꢁ ꢂꢃ ꢂꢄ ꢇ ꢅ ꢀ ꢁ ꢂ ꢃꢂ ꢄ ꢃ ꢅ ꢀꢁ ꢂ ꢃ ꢂꢄ ꢈ
SLUS501A – OCTOBER 2001
APPLICATION INFORMATION
bq24200DGN
DC+
1
2
3
4
IN
V
OUT
BAT
TS
8
7
6
5
Ω
10
1/16 W
C1
CC
STAT
VSS
DC–
N/C
UDG–01110
Figure 9. Sleep Mode
charge enable pin
The CE pin on bq24202, bq24203, bq24204 and bq24205 can be used to enable or suspend the charge. Charge
is enabled if the voltage V is applied to the pin. Applying the V suspends the charge. During a charge
IL(CE)
IH(CE)
suspend mode, the internal powerFET is turned off and all timers are reset.
charge status output
The STAT pin on the bq2420x, indicates various conditions of operation. These conditions are summarized in
Table 1.
Table 1. STAT Pin
Condition
Pre-charge
STAT
High
High
Low
Fast-charge
Charge-complete
Taper timer done
Low
Charge suspend (due to temperature or CE input)
Thermal shutdown
Hi–Z
Hi–Z
Hi–Z
Hi–Z
Hi–Z
Pre-charge timer fault
Sleep mode
Charge timer fault
12
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ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢇ ꢅ ꢀ ꢁꢂ ꢃ ꢂ ꢄ ꢃ ꢅ ꢀꢁ ꢂꢃ ꢂꢄ ꢈ
SLUS501A – OCTOBER 2001
PACKAGING INFORMATION
DGN (S-PDSO-G8)
PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
0,38
0,25
0,65
M
0,08
8
5
Thermal Pad
(See Note D)
0,15 NOM
3,05
2,95
4,98
4,78
Gage Plane
0,25
0°–ā6°
1
4
0,69
0,41
3,05
2,95
Seating Plane
0,10
0,15
0,05
1,07 MAX
4073271/B 08/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions include mold flash or protrusions.
D. The package thermal performance may be enhanced by attaching an external heat sink to the thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-187
13
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Copyright 2002, Texas Instruments Incorporated
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BQ24204DGNRG4
SINGLE-CHIP LI-ION AND LI-POL CHARGE MANAGEMENT IC FOR CURRENT-LIMITED APPLICATIONS
TI
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