BQ24392-Q1 [TI]
支持 BCDv1.2 并具有集成 USB2.0 开关的汽车充电器检测器件;型号: | BQ24392-Q1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 支持 BCDv1.2 并具有集成 USB2.0 开关的汽车充电器检测器件 开关 CD |
文件: | 总22页 (文件大小:1311K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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BQ24392-Q1
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
BQ24392-Q1 支持 USB 电池充电规范版本 1.2 检测功能的双路 SPST
USB 2.0 高速开关
1 特性
3 说明
1
•
汽车电子 应用认证
BQ24392-Q1 是一款具有充电器检测功能的双路单刀
单掷 (SPST) USB 2.0 高速隔离开关,可与 micro-
USB 和 mini-USB 端口搭配使用。凭借这款 USB 开
关,移动电话、平板电脑和其它电池供电型电子设备可
通过不同适配器充电,并且系统软件需求最低。该器件
的充电器检测电路可支持符合 USB 电池充电规范版本
1.2 (BCv1.2) 的 Apple™、TomTom™ 以及其它非标
准充电器。
•
具有符合 AEC-Q100 的下列结果:
–
–
–
器件温度 1 级:-40°C 至 125°C 的环境运行温
度范围
器件人体模型 (HBM) 静电放电 (ESD) 分类等级
2
器件组件充电模式 (CDM) ESD 分类等级 C4B
•
•
USB 2.0 高速开关
检测符合 USB 电池充电规范版本 1.2 (BCv1.2) 的
充电器
当 micro-USB 或 mini-USB 端口连接充电器
时,BQ24392-Q1 器件由 VBUS 供电,可承受 28V 电
压,无需外部保护。
•
兼容附件
–
–
–
专用充电端口
标准下行端口
充电下行端口
器件信息(1)
器件型号
封装
UQFN (10)
封装尺寸(标称值)
•
非标准充电器
BQ24392-Q1
2.05mm x 1.55mm
–
–
–
Apple™充电器
(1) 如需了解所有可用封装,请见数据表末尾的可订购产品附录。
TomTom™充电器
USB 开关的 480Mbps USB 2.0 眼图
不符合电池充电规范版本 1.2 (BCv1.2) 的 USB
充电器
•
•
–2V 至 28V VBUS 电压范围
静电放电 (ESD) 性能经测试符合 JESD 22 规范
–
–
4000V 人体放电模式
1500V 组件充电模式 (C101)
•
至接地 (GND) 的 ESD 性能 DP_CON/DM_CON
±8kV 接触放电 (IEC 61000-4-2)
–
2 应用
Copyright © 2017, Texas Instruments Incorporated
•
•
后座娱乐系统
GPS 系统
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLIS160
BQ24392-Q1
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
www.ti.com.cn
目录
7.3 Feature Description................................................... 8
7.4 Device Functional Modes.......................................... 9
Application and Implementation ........................ 10
8.1 Application Information............................................ 10
8.2 Typical Application ................................................. 11
Power Supply Recommendations...................... 12
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
8
9
10 Layout................................................................... 13
10.1 Layout Guidelines ................................................. 13
10.2 Layout Example .................................................... 14
11 器件和文档支持 ..................................................... 15
11.1 社区资源................................................................ 15
11.2 商标....................................................................... 15
11.3 静电放电警告......................................................... 15
11.4 Glossary................................................................ 15
12 机械、封装和可订购信息....................................... 15
7
4 修订历史记录
Changes from Revision C (January 2016) to Revision D
Page
•
•
•
•
•
从 BQ24932-Q1 更改为 BQ24392-Q1说明 ............................................................................................................................ 1
Moved the Storage temperature range to the Absolute Maximum Ratings table. ................................................................. 4
Changed Handling Ratings To: ESD Ratings......................................................................................................................... 4
Changed From: BQ24932-Q1 To: BQ24392-Q1 in the Overview ......................................................................................... 7
Changed title From: Using the BQ24932 GPIOs To: Using the BQ24392-Q1 GPIOs......................................................... 10
Changes from Revision B (January 2015) to Revision C
Page
•
Changed diode direction from left facing to right facing in Application Schematic. ............................................................. 11
Changes from Revision A (September 2014) to Revision B
Page
•
更新了“特性”中的“安全及管理批准”列表 ................................................................................................................................ 1
Changes from Original (August 2014) to Revision A
Page
•
最初发布的完整版文档............................................................................................................................................................ 1
2
Copyright © 2014–2017, Texas Instruments Incorporated
BQ24392-Q1
www.ti.com.cn
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
5 Pin Configuration and Functions
RSE Package
10-Pin (UQFN)
(Top View)
SW_OPEN
1
9
VBUS
DM_HOST
DP_HOST
2
3
8
7
DM_CON
DP_CON
CHG_AL_N
4
6
GND
Not to scale
Pin Functions
PIN
I/O DESCRIPTION
NO. NAME
USB switch status indicator
Open-drain output. 10 kΩ external pull-up resistor required
SW_OPEN = LOW indicates when switch is connected
SW_OPEN = HIGH-Z indicates when switch is not connected
1
SW_OPEN
O
2
3
DM_HOST
DP_HOST
I/O D– signal to transceiver
I/O D+ signal to transceiver
Charging status indicator
Open-drain output. 10 kΩ external pull-up resistor required.
CHG_AL_N = LOW indicates when charging allowed
CHG_AL_N = HIGH-Z indicates when charging is not allowed
4
5
CHG_AL_N
GOOD_BAT
O
Battery status indication from system
This pin indicates the status of the battery
GOOD_BAT = LOW indicates a dead battery
I
GOOD_BAT = HIGH indicates a good battery
6
7
8
9
GND
–
Not internally connected
DP_CON
DM_CON
VBUS
I/O D+ signal from USB connector
I/O D– signal from USB connector
I
Supply pin from USB connector
Charger detection indicator
Push-pull output to the system
CHG_DET = LOW indicates when a charger is not detected
CHG_DET = HIGH indicates when a charger detected
10 CHG_DET
O
Copyright © 2014–2017, Texas Instruments Incorporated
3
BQ24392-Q1
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over –40℃ to 125℃ temperature range (unless otherwise noted)
MIN
–2
MAX
28
28
7
UNIT
VBUS
CHG_AL_N
DM_HOST
–2
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–65
DP_HOST
Input Voltage
7
V
GOOD_BAT
7
DP_CON
DM_CON
CHG_DET
7
7
7
Tstg
Storage temperature range
150
°C
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per AEC Q100-002(1)
±4000
Corner pins (DP_CON and
DM_CON to GND)
V(ESD)
Electrostatic discharge
±8000
V
Charged device model (CDM), per AEC
Q100-011
Other pins
±1500
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
MIN
MAX
5.25
VBUS
3.6
UNIT
VBUS
4.75
V
GOOD_BAT
DM_HOST
DP_HOST
DM_CON
DP_CON
0
0
0
0
0
3.6
3.6
3.6
6.4 Thermal Information
BQ24392-Q1
RSE
THERMAL METRIC(1)
UNIT
10 PINS
167.7
78.8
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
v
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
95.8
Junction-to-top characterization parameter
Junction-to-board characterization parameter
4.7
ψJB
95.9
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
Copyright © 2014–2017, Texas Instruments Incorporated
BQ24392-Q1
www.ti.com.cn
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
6.5 Electrical Characteristics
VBUS = 4.5 V to 5.5 V, TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VBUS_VALI
D
VBUS Valid threshold
Rising VBUS threshold
IOH = –2 mA
3.5
V
VBUS(1
VOH
CHG_DET
CHG_DET
3.5
V
V
)
CHG_DET,
SW_OPEN,
CHG_AL_N
CHG_DET, SW_OPEN,
CHG_AL_N
VOL
IOL = 2 mA
0.4
VIH
VIL
High-level input voltage
Low-level input voltage
1.1
V
V
0.5
GOOD_BAT
Internal pull-down
resistance
RPD
950
32
kΩ
tDBP
Dead battery provision timer
Analog signal range
45 Mins
VUSBIO
RON
0
3.6
8
V
ON-state resistance
6
Ω
DM_CON,
VDM_HOST and VDP_HOST = 0 to 3.6 V, IDP_CON
and IDM_CON = –2 mA
ON-state resistance
flatness
DP_CON,
DM_HOST,
DP_HOST
RON(flat)
1.1
2.4
Ω
Ω
ON- state resistance
match between
channels
VDM_HOST and VDP_HOST = 0.4 V, IDP_CON and
IDM_CON = –2 mA
ΔRON
0.5
VVBUS = 5 V, USB Switch ON;
VIH(GOOD_BAT)= 1.1 V
250
80
45
50
45
2
350
115
75
µA
µA
µA
nA
nA
pF
pF
pF
pF
ICC-SW
(ON)
Current consumption
VVBUS = 5 V, USB Switch ON;
VIH(GOOD_BAT) = 2.5 V
ICC-SW
(OFF)
Current consumption with USB switch off VVBUS = 5 V; USB Switch OFF
Output port leakage current with USB
IUSBI/O
(ON)
VI = OPEN, VO = 0.3 V or 2.7 V, Switch ON
90
switch on
IUSBI/O
(OFF)
VI = 0.3 V, VO = 2.7 V or VI = 2.7 V, VO = 0.3 V,
Switch OFF
Leakage current with USB switch off
Capacitance with USB DP_HOST,
switch off
Capacitance with USB DP_CON,
switch off DM_CON
Capacitance with USB DP_HOST,
switch on DM_HOST
Capacitance with USB DP_CON,
75
CI(OFF)
CO(OFF)
CI(ON)
DM_HOST
DC bias = 0 V or 3.6 V, f = 10 MHz, Switch OFF
DC bias = 0 V or 3.6 V, f = 10 MHz, Switch ON
10
11
11
CO(ON)
switch on
DM_CON
BW
Bandwidth
RL = 50 Ω, Switch ON
1
–26
GHz
dB
OISO
XTALK
Isolation with USB switch off
Crosstalk
f = 240 MHz, RL = 50 Ω, Switch OFF
f = 240 MHz, RL = 50 Ω
–30.5
dB
(1) CHG_DET max value will be clamped at 7 V when VVBUS > 7 V
Copyright © 2014–2017, Texas Instruments Incorporated
5
BQ24392-Q1
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
www.ti.com.cn
6.6 Typical Characteristics
Copyright © 2017, Texas Instruments Incorporated
Copyright © 2017, Texas Instruments Incorporated
Figure 1. 480-Mbps USB 2.0 Eye Diagram with No Device
Figure 2. 480-Mbps USB 2.0 Eye Diagram with USB Switch
6
Copyright © 2014–2017, Texas Instruments Incorporated
BQ24392-Q1
www.ti.com.cn
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
7 Detailed Description
7.1 Overview
The BQ24392-Q1 is a USB 2.0 high-speed isolation switch with charger detection capabilities for use with micro
and mini-USB ports. Upon plugin of a Battery Charging Specification 1.2 (BCv1.2) compliant, Apple™,
TomTom™, or other USB charger into a micro or mini-USB connector, the device will automatically detect the
charger and operate the USB 2.0 high-speed isolation switch.
The BQ24392-Q1 device is powered through VBUS when a charger is attached to the micro or mini-USB port
and has a 28-V tolerance to avoid the need for external protection.
7.2 Functional Block Diagram
BQ24392
Supply
VBUS
Detect
DM_CON
Micro
USB
DM_HOST
DP_HOST
DP_CON
ID_CON
GND
USB
HOST
Switch
Matrix
GOOD_BAT
SW_OPEN
CHG_AL_N
CHG_DET
SYSTEM
&
CHARGER
DP/DM
Comparator
Logic
Copyright © 2017, Texas Instruments Incorporated
Copyright © 2014–2017, Texas Instruments Incorporated
7
BQ24392-Q1
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
www.ti.com.cn
7.3 Feature Description
7.3.1 Charger Detection
POWERUP
VVBUS >VVBUS_UV
GOOD_BAT = 1
IDLE
VVBUS>VVBUS(valid)
DATA CONTACT DETECTION
600-ms Timeout Feature
USB BCv 1.2 compliant
Not USB BCv 1.2 compliant
CHECK VOLTAGE LEVEL ON
DP_CON & DM_CON
PRIMARY DETECTION
SDP charger
Not SDP charger
Apple
Charger
TomTom
Charger
No Charger
SECONDARY DETECTION
Standard
Downstream Port
(SDP)
Charging
Downstream Port
(CDP)
Dedicated
Charging Port
(DCP)
GOOD_BAT=1 GOOD_BAT=0
GOOD_BAT=1 GOOD_BAT=0
USB
SWITCH ON
USB
SWITCH ON
USB
SWITCH OFF
USB
SWITCH OFF
GOOD_BAT=0
Start Dead
Battery Provision
(DBP) Timer
32 Mins Expire
Disable charging
Copyright © 2017, Texas Instruments Incorporated
Figure 3. Logic Tree
8
Copyright © 2014–2017, Texas Instruments Incorporated
BQ24392-Q1
www.ti.com.cn
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
Feature Description (continued)
When a micro or mini-USB accessory is inserted into the connector and once VVBUS is greater than VVBUS_VALID
threshold, the BQ24392-Q1 will enter into the Data Contact Detection (DCD) state which includes a 600-ms
timeout feature that is prescribed in the USB Battery Charging Specification version 1.2 (BCv1.2). If the micro or
mini-USB accessory is determined to be USB BCv1.2 compliant, a 130-ms debounce period will initiate and the
BQ24392-Q1 will proceed to its primary detection and then secondary detection states to determine if a
Dedicated Charging Port (DCP), Standard Downstream Port (SDP), or Charging Downstream Port (CDP) is
attached to the USB-port. The minimum detection time for a DCP, SDP, and CDP is 130 ms, but can be as long
as 600 ms due to the slow plug in effect.
If the GOOD_BAT pin is high, the USB 2.0 switches are automatically closed to enable data transfer after the
device detects a Standard Downstream Port (SDP) or Charging Downstream Port (CDP) was connected.
If Data Contact Detection (DCD) fails, the BQ24392-Q1 proceeds to detect whether an Apple or TomTom
charger was inserted by checking the voltage level on DP_CON and DM_CON. Thus, for Apple and TomTom
chargers, detection time typically takes ~600 ms.
The 3 output pins CHG_AL_N, CHG_DET, and SW_OPEN change their status at the end of detection. Table 1 is
the detection table with the GPIO status for each type of supported charger. More information on how to use the
GPIOs is available in Using the BQ24392-Q1 GPIOs .
Table 1. Detection Table
DP_CON
(D+)
DM_CON
(D–)
GOOD_BAT
(Input)
CHG_AL_N
(Output)
CHG_DET
(Output)
SW_OPEN
(Output)
Device Type
VBUS
Switch Status
Charge Current
Charge with
100mA/ Change
the input current
based on
HIGH
LOW
LOW
LOW
Connected
Standard
Downstream
Port
Pull-down R to
GND
> 3.5 V
Pull-down R to GND
enumeration
Charge with 100
mA
LOW
HIGH
LOW
X
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
High-Z
LOW
Not Connected
Connected
Charge with full
current
Charging
> 3.5 V
Pull-down R to GND
Short to D–
VDM_SRC
Downstream
Port
Charge with 100
mA
High-Z
High-Z
High-Z
High-Z
High-Z
Not Connected
Not Connected
Not Connected
Not Connected
Not Connected
Dedicated
Charging Port
Charge with full
current
> 3.5 V
> 3.5 V
> 3.5 V
> 3.5 V
Short to D+
2.0 V < VDP_CON < 2.8
V
2.0 V < VDM_CON
2.8 V
<
<
Charge with full
current
Apple Charger
X
TomTom
Charger
2.0 V < VDP_CON < 3.1
V
2.0 V < VDM_CON
3.1 V
Charge with full
current
X
Charge with 100
mA
PS/2 Charger
Pull-up R to VVBUS
Pull-up R to VVBUS
X
Non-compliant
USB Charger
Charge with 100
mA
> 3.5 V
< 3.5 V
Open
Open
Open
Open
X
X
LOW
LOW
LOW
High-Z
High-Z
Not Connected
Not Connected
Any Device
High-Z
No Charge
Any Device
DBP
> 3.5 V
X
X
LOW
High-Z
LOW
High-Z
Not Connected
No Charge
Timer Expired
If a charger has been detected and the GOOD_BAT pin is low, a Dead Battery Provision (DBP) timer is initiated.
If the GOOD_BAT continues to be low for 30 minutes (maximum of 45 minutes), charging is disabled and
CHG_AL_N goes into the High-Z state to indicate this. Toggling GOOD_BAT high after the DBP timer expires re-
starts detection and the DBP timer.
7.4 Device Functional Modes
The BQ24392-Q1 has three functional modes:
1. Nothing inserted
2. Accessory inserted and detection running
3. Accessory inserted and detected
Copyright © 2014–2017, Texas Instruments Incorporated
9
BQ24392-Q1
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
www.ti.com.cn
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Using the BQ24392-Q1 GPIOs
8.1.1.1 CHG_AL and CHG_DET
The BQ24392-Q1 has 2 charger indicators, CHG_AL_N and CHG_DET, that the host can use to determine
whether it can charge and if it can charge at a low or high current. Table 2 demonstrates how these outputs
should be interpreted. CHG_AL_N is an open drain output and is active when the output of the pin is low.
CHG_DET is a push-pull output and is high in the active state.
Table 2. BQ24392-Q1 Outputs
CHG_AL_N
High-Z
Low
CHG_DET
X
Charging is not allowed
Low
Low-current charging is allowed
High-current charging is allowed
Low
High
The system must define what is meant by low-current and high-current charging. If CHG_DET is high, a system
could try to draw 2 A, 1.5 A, or 1.0 A. If the system is trying to support greater than 1.5-A chargers, then the
system has to use a charger IC that is capable of monitoring the VBUS voltage as it tries to pull the higher
current values. If the voltage on VBUS starts to drop because that high of a current is supported then the system
has to reduce the amount of current it is trying to draw until it finds a stable state with VBUS not dropping.
8.1.1.2 SW_OPEN
SW_OPEN is an open drain output that indicates whether the USB switches are opened or closed. In the High-Z
state the switches are open and in the active, or low state, the switches are closed. The host should monitor this
pin to know when the switches are closed or open.
8.1.1.3 GOOD_BAT
GOOD_BAT is used by the host controller to indicate the status of the battery to the BQ24392-Q1. This pin
affects the switch status for a SDP or CDP, and it also affects the Dead Battery Provision (DBP) timer as
discussed in the Charger Detection section.
8.1.1.4 Slow Plug-in Event
As you insert a charger into the USB receptacle, the pins are configured so that the VBUS and GND pins make
contact first. This presents a problem as the BQ24392-Q1 (or any other charger detection IC) requires access to
the D+ and D– lines to run detection. This is why the BQ24392-Q1 has a standard 130-ms debounce time after
VBUS valid to run the detection algorithm. This delay helps minimize the effects of the D+ and D– lines making
contact after VBUS and GND.
Figure 4 is from the datasheet of a standard male micro-USB connector and shows how the data connections
(red line) are slightly recessed from the power connections (blue line).
10
Copyright © 2014–2017, Texas Instruments Incorporated
BQ24392-Q1
www.ti.com.cn
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
5ata [ines
ë.Ü{ and
Dround
Figure 4. Data Connections Recessed from Power Connections
However, in some cases the charger is inserted very slowly, causing the VBUS and GND to make contact long
before D+ and D–. Due to this effect, there is no guaranteed detection time as the detection time can vary based
on how long it takes the user to insert the charger. If insertion takes longer than 600 ms, the detection algorithm
of the BQ24392-Q1 will timeout and detect the charger as a non-standard charger.
8.2 Typical Application
The BQ24392-Q1 device is used between the micro or mini-USB connector port and USB host to enable and
disable the USB data path and detect chargers that are inserted into the micro or mini-USB connector.
2.2Ω
VBUS
DM_HOST
1pF-10pF
1 µF~
USB
HOST
ESD
0.1 µF
10µF
DP_HOST
2.2Ω
2.2Ω
DM_CON
DP_CON
GND
1 pF
ESD
USB
PORT
3.3V
BQ24392
1 pF
ESD
100 kΩ 10 kΩ
10 kΩ
GOOD_BAT
SW_OPEN
CHG_AL_N
CHG_DET
SYSTEM
&
CHARGER
Diode
0.5V
Copyright © 2017, Texas Instruments Incorporated
Figure 5. Application Schematic
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ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
www.ti.com.cn
Typical Application (continued)
8.2.1 Design Requirements
VBUS requires 1-μF – 10-μF and 0.1-μF bypass capacitors to reduce noise from circuit elements by providing a
low impedance path to ground for the unwanted high frequency content. The 0.1-μF capacitor filters out higher
frequencies and has a lower series inductance while the 1 μF ~ 10 μF capacitor filters out the lower frequencies
and has a much higher series inductance. Using both capacitors will provide better load regulation across the
frequency spectrum.
SW_OPEN and CHG_AL_N are open-drain outputs that require a 10-kΩ pull-up resistor to VDDIO and VBUS.
VBUS, DM_CON, and DP_CON are recommended to have an external resistor of 2.2 Ω to provide extra
ballasting to protect the chip and internal circuitry.
DM_CON and DP_CON are recommended to have a 1-pF external ESD protection diode rated for 8-kV IEC
protection to prevent failure in case of an 8-kV IEC contact discharge.
VBUS is recommended to have a 1-pF ~ 10-pF external ESD Protection Diode rated for 8-kV IEC protection to
prevent failure in case of an 8-kV IEC contact discharge
CHG_DET is a push-pull output pin. An external pull-up and diode are shown to depict a typical 3.3-V system.
The pull-up resistor and diode are optional. The pull-up range on the CHG_DET pin is from 3.5 V to VVBUS. When
VVBUS > 7 V, CHG_DET will be clamped to 7 V.
8.2.2 Detailed Design Procedure
The minimum pull-up resistance for the open-drain data lines is a function of the pull-up voltage VPU, output logic
LOW voltage VOL(max), and Output logic LOW current IOL
.
RPU(MIN) = (VPU – VOL/MAX) / IOL
(1)
The maximum pull-up resistance for the open-drain data lines is a function of the maximum rise time of the
desired signal, tr, and the bus capacitance, Cb.
RPU(MAX) = tr / (0.8473 × Cb)
(2)
8.2.3 Application Curves
Copyright © 2017, Texas Instruments Incorporated
Copyright © 2017, Texas Instruments Incorporated
Figure 6. 480-Mbps USB 2.0 Eye Diagram with No Device
Figure 7. 480-Mbps USB 2.0 Eye Diagram with USB Switch
9 Power Supply Recommendations
Power to the device is supplied through the VBUS pin from the device that is inserted into the mini or micro-USB
port. The power from the inserted devices should follow BCv1.2 specification.
12
Copyright © 2014–2017, Texas Instruments Incorporated
BQ24392-Q1
www.ti.com.cn
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
10 Layout
10.1 Layout Guidelines
Place VBUS bypass capacitors as close to VBUS pin as possible and avoid placing the bypass caps near the
DP/DM traces.
The high speed DP/DM traces should always be matched lengths and must be no more than 4 inches;
otherwise, the eye diagram performance may be degraded. A high-speed USB connection is made through a
shielded, twisted pair cable with a differential characteristic impedance of 90 Ω ±15%. In layout, the impedance
of DP and DM traces should match the cable characteristic differential 90-Ω impedance.
Route the high-speed USB signals using a minimum of vias and corners. This reduces signal reflections and
impedance changes. When a via must be used, increase the clearance size around it to minimize its
capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of
picking up interference from the other layers of the board. Be careful when designing test points on twisted pair
lines; through-hole pins are not recommended.
When it becomes necessary to turn 90°, use two 45° turns or an arc instead of making a single 90° turn. This
reduces reflections on the signal traces by minimizing impedance discontinuities.
Do not route USB traces under or near crystals, oscillators, clock signal generators, switching regulators,
mounting holes, magnetic devices or IC’s that use or duplicate clock signals.
Avoid stubs on the high-speed USB signals because they cause signal reflections. If a stub is unavoidable, then
the stub should be less than 200 mm.
Route all high-speed USB signal traces over continuous planes (VCC or GND), with no interruptions.
Avoid crossing over anti-etch, commonly found with plane splits.
Due to high frequencies associated with the USB, a printed circuit board with at least four layers is
recommended; two signal layers separated by a ground and power layer as shown in Figure 8.
Signal 1
GND Plane
Power Plane
Signal 2
Copyright © 2017, Texas Instruments Incorporated
Figure 8. Four-Layer Board Stack-Up
The majority of signal traces should run on a single layer, preferably Signal 1. Immediately next to this layer
should be the GND plane, which is solid with no cuts. Avoid running signal traces across a split in the ground or
power plane. When running across split planes is unavoidable, sufficient decoupling must be used. Minimizing
the number of signal vias reduces EMI by reducing inductance at high frequencies.
Copyright © 2014–2017, Texas Instruments Incorporated
13
BQ24392-Q1
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
www.ti.com.cn
10.2 Layout Example
LEGEND
Polygonal Copper Pour
VIA to VBUS Plane
Pull
resistor
VIA to GND Plane (Inner Layer)
To controller
Bypass capacitors
Pull-up
resistor
Ballast protection
10
CHG_DET
SW_OPEN
VBUS
9
8
1
2
DM_HOST
DP_HOST
CHG_AL_N
DM_CON
DP_CON
GND
Impedance matched USB traces
3
USB connector
Impedance matched USB traces
USB connector
7
6
4
GOOD_BAT
5
Pull-up
resistor
To controller
From Controller
Figure 9. Package Layout
14
版权 © 2014–2017, Texas Instruments Incorporated
BQ24392-Q1
www.ti.com.cn
ZHCSD08D –AUGUST 2014–REVISED MARCH 2017
11 器件和文档支持
11.1 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 商标
E2E is a trademark of Texas Instruments.
Apple is a trademark of Apple.
TomTom is a trademark of TomTom International.
All other trademarks are the property of their respective owners.
11.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损
伤。
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本,请查阅左侧的导航栏。
版权 © 2014–2017, Texas Instruments Incorporated
15
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
BQ24392QRSERQ1
ACTIVE
UQFN
RSE
10
3000 RoHS & Green
NIPDAUAG
Level-3-260C-168 HR
-40 to 125
EXH
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ24392QRSERQ1
UQFN
RSE
10
3000
180.0
8.4
1.68
2.13
0.76
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
*All dimensions are nominal
Device
Package Type Package Drawing Pins
UQFN RSE 10
SPQ
Length (mm) Width (mm) Height (mm)
223.0 270.0 35.0
BQ24392QRSERQ1
3000
Pack Materials-Page 2
PACKAGE OUTLINE
RSE0010A
UQFN - 0.6 mm max height
SCALE 7.000
PLASTIC QUAD FLATPACK - NO LEAD
1.55
1.45
B
A
PIN 1 INDEX AREA
2.05
1.95
C
0.6
0.5
SEATING PLANE
0.05
0.00
0.05 C
0.35
0.25
C A B
C
2X
0.4
0.3
8X
0.1
(0.12)
TYP
0.05
0.45
0.35
2X
5
4
6
SYMM
2X
1.5
0.25
0.15
4X
9
0.1
C A B
C
1
0.05
6X 0.5
10
SYMM
PIN 1 ID
(45 X 0.1)
0.3
0.2
4X
0.1
0.05
C A B
C
4220307/A 03/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
RSE0010A
UQFN - 0.6 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
10
(R0.05) TYP
2X (0.6)
8X (0.55)
9
1
4X (0.25)
SYMM
6X (0.5)
(1.8)
4X
(0.2)
4
6
5
2X (0.3)
(1.35)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:30X
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
SOLDER MASK
OPENING
METAL
EXPOSED
METAL
SOLDER MASK
EXPOSED
OPENING
METAL
METAL
UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4220307/A 03/2020
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
RSE0010A
UQFN - 0.6 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
10
(R0.05) TYP
2X (0.6)
8X (0.55)
1
9
4X (0.25)
SYMM
6X (0.5)
(1.8)
4X (0.2)
4
6
5
2X
(0.3)
(1.35)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICKNESS
SCALE: 30X
4220307/A 03/2020
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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