BQ25306_技术文档

BQ25306

ZHCSMH4A –MARCH 2020 –REVISED NOVEMBER 2020

BQ25306 独立型17V、3.0A、1-2 节降压电池充电器

1 特性

2 应用

• 独立充电器且易于配置

• 高效1.2MHz 同步开关模式降压充电器

• 无线扬声器

• 游戏

• 底座充电器

• 医疗

– 1 节电池5V 输入、2A 电流时的充电效率为

92.5%

– 1 节电池9V 输入、2A 电流时的充电效率为

3 说明

91.8%

BQ25306 是一款高度集成的独立型开关模式电池充电

器，适用于 1 节和 2 节锂离子、锂聚合物和磷酸铁锂

电池。BQ25306 支持 4.1V 至 17V 输入电压和 3A 快

速充电电流。该器件的集成式电流检测拓扑可实现高充

电效率和低 BOM 成本。此器件具有出色的 200nA 低

静态电流，可节省电池电量并更大限度地延长便携式设

备的存放时间。BQ25306 采用3x3 WQFN 封装，适用

于2 层布局和空间有限的应用。

– 2 节电池12V 输入、2A 电流时的充电效率为

95%

• 单个输入，支持USB 输入和高电压适配器

– 支持4.1V 至17V 输入电压范围，绝对最大输入

电压额定值为28V

– 输入电压动态电源管理(VINDPM) 跟踪电池电压

• 高度集成

– 集成反向阻断和同步开关MOSFET

– 内部输入和充电电流感应

– 内部环路补偿

器件信息

器件型号⁽¹⁾

BQ25306

封装尺寸（标称值）

封装

– 集成式自举二极管

WQFN (16)

3.00mm x 3.00mm

• 3.4V 至9.0V 可编程充电电压

• 3.0A 最大快速充电电流

• 4.5V V_BAT下的200nA 低电池泄漏电流

• IC 禁用模式下的4.25μA VBUS 电源电流

• 120°C 时充电电流热调节

• 预充电电流：快速充电电流的10%

• 终止电流：快速充电电流的10%

• 充电精度

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

L

VBUS

SW

VBUS

Q1

Q2

2.2 …F

10 …F

2.2 …F

10 …F

47 nF

BTST

GND

Q3

PMID

– 充电电压调节范围为±0.5%

– 充电电流调节范围为±10%

• 安全

BAT

FB

REGN

470 pF

REGN

R1

R2

200kꢀ

FB_GND

– 热调节和热关断

– 输入欠压锁定(UVLO) 和过压保护(OVP)

– 电池过充保护

– 预充电和快速充电安全计时器

– 如果电池反馈引脚FB 开路或短路，则充电被禁

用

ICHG

STAT

REGN

TS

1 kꢀ

Thermal Pad

– 冷/热电池温度保护

– 关于STAT 引脚的故障报告

• 采用WQFN 3x3-16 封装

简化版应用

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLUSDC7

BQ25306

www.ti.com.cn

ZHCSMH4A –MARCH 2020 –REVISED NOVEMBER 2020

Table of Contents

9.4 Device Functional Modes..........................................20

10 Application and Implementation................................21

10.1 Application Information........................................... 21

10.2 Typical Applications................................................ 21

11 Power Supply Recommendations..............................29

12 Layout...........................................................................30

12.1 Layout Guidelines................................................... 30

12.2 Layout Example...................................................... 30

13 Device and Documentation Support..........................32

13.1 Device Support....................................................... 32

13.2 Documentation Support.......................................... 32

13.3 接收文档更新通知................................................... 32

13.4 支持资源..................................................................32

13.5 Trademarks.............................................................32

13.6 静电放电警告.......................................................... 32

13.7 术语表..................................................................... 32

14 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 说明（续）.........................................................................3

6 Device Comparison Table...............................................4

7 Pin Configuration and Functions...................................5

8 Specifications.................................................................. 7

8.1 Absolute Maximum Ratings ....................................... 7

8.2 ESD Ratings .............................................................. 7

8.3 Recommended Operating Conditions ........................7

8.4 Thermal Information ...................................................8

8.5 Electrical Characteristics ............................................8

8.6 Timing Requirements ............................................... 11

8.7 Typical Characteristics..............................................12

9 Detailed Description......................................................14

9.1 Overview...................................................................14

9.2 Functional Block Diagram.........................................14

9.3 Feature Description...................................................16

Information.................................................................... 33

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision * (March 2020) to Revision A (November 2020)

Page

• 将“预告信息”更改为“量产数据”..................................................................................................................1

English Data Sheet: SLUSDC7

2

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ZHCSMH4A –MARCH 2020 –REVISED NOVEMBER 2020

5 说明（续）

BQ25306 支持 4V 至 17V 输入电压，可通过电阻分压器编程为单节电池或双节串联电池充电，充电电压范围为

3.4V 至 9.0V。 BQ25306 为单节 (1S) 电池或双节串联 (2S) 电池提供高达 3A 的连续充电电流。该器件可为便携

式设备进行快速充电。其输入电压调节功能可从输入源向电池提供最大充电功率。该解决方案与输入反向阻断

FET（RBFET，Q1）、高侧开关FET（HSFET，Q2）和低侧开关FET（LSFET，Q3）高度集成。

BQ25306 具有无损集成式电流检测功能，可通过尽可能地减少元件数量来降低功率损耗和 BOM 成本。它还集成

了自举二极管以进行高侧栅极驱动和电池温度监控，从而简化系统设计。此器件无需主机控制即可启动并完成一

个充电周期。BQ25306 充电电压和充电电流可通过外部电阻设定。BQ25306 充电电压由一个外部电阻分压器进

行编程，它分三个阶段为电池充电：预调节、恒定电流和恒定电压。在充电周期结束时，如果充电电流低于终止

电流阈值并且电池电压高于再充电阈值，则充电器自动终止。当电池电压下降到低于再充电阈值时，充电器将自

动启动另一个充电周期。充电器为电池充电和系统操作提供各种安全特性，包括基于负温度系数 (NTC) 热敏电阻

的电池温度监控、充电安全计时器、输入过压和过流保护，以及电池过压保护。还内置了引脚开路和短路保护功

能，可防止电池电压反馈引脚FB 或反馈电阻意外开路或短路。热调节功能可调节充电电流，从而在高功率运行或

高环境温度条件下限制内核温度。

STAT 引脚输出报告充电状态和故障状况。当移除输入电压时，此器件以极低的电池到充电器器件漏电流自动进入

高阻态模式。BQ25306 采用3mm x 3mm 薄型WQFN 封装。

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English Data Sheet: SLUSDC7

BQ25306

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ZHCSMH4A –MARCH 2020 –REVISED NOVEMBER 2020

6 Device Comparison Table

BQ25302

BQ25306

Battery Cells in Series

Input Voltage

1 cell

4.1V to 6.2V

1-2 cell

4.1V - 17V

Charge Voltage

4.1V, 4.35V, 4.4V, 4.2V

2.0A

Programmable from 3.4V to 9.0V

Maximum Fast Charge Current

3.0A

Battery Temperature Protection (JEITA or Cold/Hot) Cold/Hot

Cold/Hot

English Data Sheet: SLUSDC7

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ZHCSMH4A –MARCH 2020 –REVISED NOVEMBER 2020

7 Pin Configuration and Functions

VBUS

REGN

STAT

ICHG

1

2

3

4

12

11

10

9

GND

BAT

FB

Thermal

Pad

5

6

7

8

(Not to scale)

图7-1. RTE Package 16-Pin WQFN Top View

表7-1. Pin Functions

I/O⁽¹⁾

DESCRIPTION

NAME

NO.

Charger input voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between

VBUS and PMID with VBUS on source. Place a 2.2uF ceramic capacitor from VBUS to GND and place it

as close as possible to IC.

VBUS

1

P

Connected to the drain of the reverse blocking MOSFET (RBFET) and the drain of high-side MOSFET

(HSFET). Place ceramic 10μF on PMID to GND and place it as close as possible to IC.

PMID

SW

16

Switching node. Connected to output inductor. Internally SW is connected to the source of the n-channel

HSFET and the drain of the n-channel LSFET. Connect the 0.047μF bootstrap capacitor from SW to

BTST.

13,14

High-side FET driver supply. Internally, the BTST is connected to the cathode of the internal boost-strap

diode. Connect the 0.047μF bootstrap capacitor from SW to BTST.

BTST

GND

REGN

BAT

15

11,12

2

P

Ground. Connected directly to thermal pad on the top layer. A single point connection is recommended

between power ground and analog ground near the IC GND pins.

Low-side FET driver positive supply output. Connect a 2.2μF ceramic capacitor from REGN to GND. The

capacitor should be placed close to the IC.

P

Battery voltage sensing input. Connect this pin to the positive terminal of the battery pack and the node of

inductor output terminal. 10-µF capacitor is recommended to connect to this pin.

10

AI

Battery temperature voltage input. Connect a negative temperature coefficient thermistor (NTC). Program

temperature window with a resistor divider from REGN to TS and TS to GND. Charge suspends when TS

pin voltage is out of range. When TS pin is not used, connect a 10-kΩresistor from REGN to TS and a

10-kΩresistor from TS to GND. It is recommended to use a 103AT-2 thermistor.

TS

7

4

AI

Charge current program input. Connect a 1% resistor RICHG from this pin to ground to program the

charge current as ICHG = K_ICHG/ R_ICHG(K_ICHG= 40,000). No capacitor is allowed to connect at this pin.

When ICHG pin is pulled to ground or left open, the charger stop switching and STAT pin starts blinking.

ICHG

Charge status indication output. This pin is open drain output. Connect this pin to REGN via a current

limiting resistor and LED. The STAT pin indicates charger status as:

•

Charge in progress: STAT pin is pulled LOW

Charge completed, charge disabled by EN: STAT pin is OPEN

Fault conditions: STAT pin blinks.

STAT

3

AO

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ZHCSMH4A –MARCH 2020 –REVISED NOVEMBER 2020

表7-1. Pin Functions (continued)

I/O⁽¹⁾

DESCRIPTION

NAME

NO.

Battery voltage feedback input. Connect this pin to resistor divider’s middle point to program battery

charge voltage. When this pin is shorted to GND or open by fault, the converter stop switching and STAT

pin blinks. The resistor divider consists of a resistor R1 from battery positive terminal to FB pin and a

resistor R2 from FB pin to FB_GND. The recommended resistance value of R2 is 200kΩor lower. The

battery charge voltage is programmed as VBATREG = 1.1 (1 + R1/R2). The voltage regulation loop is

internally compensated and a 470pF feedforward capacitor is recommended to connect from battery to FB

pin.

FB

9

AI

Battery voltage feedback ground input. Connect the feedback resistor divider's low side resister to this pin.

The input of this pin is in high impedance when adaptor is unplugged or the charger is disabled by EN pin.

FB_GND

POL

8

5

AI

EN pin polority selection. Keep this pin floating for standalone charger.

Device sisable input. With POL pin floating, the device is enabled with EN pin floating or pulled low, and

the device is disabled if EN pin is pulled high. With POL pin grounded, the device is enabled with EN pin

pulled high, and the device is disabled with EN pin pulled low or floating.

EN

6

AI

Ground reference for the device that is also the thermal pad used to conduct heat from the device. This

connection serves two purposes. The first purpose is to provide an electrical ground connection for the

device. The second purpose is to provide a low thermal-impedance path from the device die to the PCB.

This pad should be tied externally to a ground plane. Ground layer(s) are connected to thermal pad

through vias under thermal pad.

Thermal Pad

17

-

(1) AI = Analog input, AO = Analog Output, AIO = Analog input Output, DI = Digital input, DO = Digital Output, DIO = Digital input Output,

P = Power

English Data Sheet: SLUSDC7

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8 Specifications

8.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)⁽¹⁾

PARAMETER

MIN

–2

MAX

28

UNIT

V

VBUS (converter not switching)

PMID(converter not switching)

28

V

–0.3

–2⁽²⁾

–0.3

SW

20

V

BTST

STAT

25.5

5.5

11

V

BAT

Voltage Range (with respect to GND)

BTST to SW

V

5.5

11

V

ICHG

REGN

POL

/EN

V

TS

V

FB

Voltage Range (with respect to GND)

FB_GND

V

11

V

STAT

6

mA

ºC

Output Sink Current

REGN

20

Junction temperature

Storage temperature

T_J

150

–40

–65

T_stg

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2) -3V for 10ns transient

8.2 ESD Ratings

VALUE

UNIT

Human body model (HBM), per ANSI/ESDA/

JEDEC JS-001, all pins⁽¹⁾

±2000

V_(ESD)

Electrostatic discharge

V

Charged device model (CDM), per JEDEC

specification JESD22-C101, all pins⁽²⁾

±250

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

PARAMETER

MIN

4.1

NOM

MAX

17

9

UNIT

V

V_VBUS

V_BAT

I_VBUS

I_SW

T_A

Input voltage

Battery voltage

3.4

V

Input current

3

A

Output current (SW)

3

A

Ambient temperature

85

°C

µH

–40

L

Recommended inductance at V_{VBUS_MAX}< 6.2V

Recommended inductance at V_{VBUS_MAX}> 6.2V

1.0

2.2

L

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ZHCSMH4A –MARCH 2020 –REVISED NOVEMBER 2020

8.3 Recommended Operating Conditions (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

MIN

NOM

2.2

10

MAX

UNIT

µF

C_VBUS

C_PMID

C_BAT

Recommended capacitance at VBUS

Recommended capacitance at PMID

Recommended capacitance at BAT

µF

10

µF

8.4 Thermal Information

BQ2530x

THERMAL METRIC⁽¹⁾

RTE

16-PINS

45.8

48.5

19.0

1.3

UNIT

R_θJA

Junction-to-ambient thermal resistance (JEDEC⁽¹⁾

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

)

°C/W

R_θJC(top)

R_θJB

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

Ψ_JT

19

Ψ_JB

R_θJC(bot)

7.9

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

8.5 Electrical Characteristics

V_{VBUS_UVLOZ}< V_VBUS< V_{VBUS_OVP}and V_VBUS> V_BAT+ V_SLEEP, T_J= -40°C to +125°C, and T_J= 25°C for typical values

(unless otherwise noted)

PARAMETER

QUIESCENT CURRENT

VBUS reverse current from BAT/SW V_BAT= V_SW= 4.5V, V_BUSis shorted to GND,

to VBUS, T_J= -40°C - 85°C measure V_BUSreverse current

VBUS reverse current from BAT/SW V_BAT= V_SW= 9.0V, V_BUSis shorted to

TEST CONDITIONS

MIN

TYP

MAX UNIT

I_{VBUS_REVS}

I_{Q_VBUS_DIS}

I_{Q_BAT_HIZ}

0.07

0.14

3.5

3

6

µA

to VBUS T_J= -40°C - 85°C

GND, measure V_BUSreverse current

VBUS leakage current in disable

mode, T_J= -40°C - 85°C

V_BUS= 5V, V_BAT= 4V, charger is

disabled, /EN is pulled high

4.25 µA

µA

1.0 µA

VBUS leakage current in disable

mode, T_J= -40°C - 85°C

V_BUS= 9V, V_BAT= 4V, charger is

disabled, /EN is pulled high

4.7

6

BAT and SW pin leakage current in

HiZ mode, T_J= -40°C - 65°C

V_BAT= V_SW= 4.5V, V_BUSfloating

0.17

0.50

BAT and SW pin leakage current in

disable mode, T_J= -40°C - 65°C

V_BAT= V_SW= 9V, I_CHGconnected to a 25kΩ

resistor, V_BUSfloating

I_{Q_BAT_DIS_9V}

2

µA

VBUS POWER UP

V_{VBUS_OP}

V_BUSoperating range

4.1

3.0

17.0

3.80

V

V_{VBUS_UVLOZ}

V_BUSpower on reset

V_BUSrising

V_{VBUS_UVLOZ_HYS}

V_{VBUS_LOWV}

V_BUSpower on reset hysteresis

A condition to turnon REGN

V_BUSfalling

250

mV

V

V_BUSrising, REGN turns on, V_BAT= 3.2V

3.8

30

3.90

4.00

A condition to turnon REGN,

hysteresis

V_{VBUS_LOWV_HYS}

V_SLEEP

V_BUSfalling, REGN turns off, V_BAT= 3.2V

300

60

mV

V_BUSfalling, V_BUS- VBAT, V_{VBUS_LOWV}

V_BAT< V_BATREG

<

Enter sleep mode threshold

100 mV

295 mV

V_BUSrising, V_BUS- V_BAT, V_{VBUS_LOWV}

V_BAT< V_BATREG

<

V_SLEEPZ

Exit sleep mode threshold

110

157

V_{VBUS_OVP_RISE}

V_BUSovervoltage rising threshold

V_BUSrising, converter stops switching

17.00

17.40

17.80

V

English Data Sheet: SLUSDC7

8

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8.5 Electrical Characteristics (continued)

V_{VBUS_UVLOZ}< V_VBUS< V_{VBUS_OVP}and V_VBUS> V_BAT+ V_SLEEP, T_J= -40°C to +125°C, and T_J= 25°C for typical values

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

V_{VBUS_OVP_HYS}

V_BUSovervoltage falling hysteresis

V_BUSfalling, converter stops switching

750

mV

MOSFETS

Top reverse blocking MOSFET on-

resistance between VBUS and

PMID (Q1)

R_{DSON_Q1}

V_REGN= 5V

40

50

45

65

82

mΩ

High-side switching MOSFET on-

resistance between PMID and SW

(Q2)

R_{DSON_Q2}

Low-side switching MOSFET on-

resistance between SW and GND

(Q3)

R_{DSON_Q3}

72

38

mΩ

FB_GND MOSFET on-resistance

between FB_GND and GND

R_{DSON_FB_GND}

Ω

BATTERY CHARGER

V_VBUS= 12V, VBATREG is programmed by

FB resistor divider

V_{BATREG_RANGE}

Charge voltage regulation range

3.400

9.000

V

V_{FB_REF_VBATREG}

Battery feedback regulation voltage TJ = -40°C to +85°C

1094

1.55

0.90

0.40

1100 1104.5 mV

1.72

1.00

1.89

1.10

0.60

A

ICHG set at 1.72A with R_ICHG=23.2kΩ

ICHG set at 1.0A with RICHG=40.2kΩ

ICHG set at 0.5A with R_ICHG=78.7kΩ

I_CHG

Charge current regulation

0.500

ICHG = 1.72A, 10% of ICHG,

RICHG=23.2kΩ

I_TERM

Termination current

138

70

172

100

63

206 mA

130 mA

93 mA

ICHG = 1.0A, 10% of ICHG,

RICHG=40.2kΩ

ICHG = 0.5A, ITERM =63mA

RICHG=78.7kΩ

33

ICHG = 1.72A, 10% of ICHG,

R_ICHG=23.2kΩ

115

172

225 mA

I_PRECHG

Precharge current

50

28

100

63

150 mA

98 mA

ICHG = 1.0A, 10% of ICHG, R_ICHG=40.2kΩ

ICHG = 0.5A, 10% of ICHG, R_ICHG=78.7kΩ

Short to precharge

V_{BAT_SHORT_RISE}

V_{BAT_SHORT_FALL}

I_{BAT_SHORT}

VBAT short rising threshold

VBAT short falling threshold

Battery short current

2.05

1.85

25

2.20

2.00

35

2.35

2.15

V

Precharge to battery short

V_BAT< V_{BAT_SHORT_FALL}

46 mA

Precharge to fast charge rising, as

percentage of V_{FB_REF_VBATREG}

V_{FB_REF_LOWV_RISE}V_BATLOWVrising threshold

V_{FB_REF_LOWV_FALL}V_BATLOWVfalling threshold

68

66

70

68

72

70

%

Fast charge to precharge falling, as

percentage of V_{FB_REF_VBATREG}

V_FBfalling, as percentage of

V_{FB_REF_VBATREG}

V_{FB_REF_RECHG}

Recharge threshold

95.2

96.4

97.6

INPUT VOLTAGE / CURRENT REGULATION

V_{INDPM_MIN}

V_INDPM

Minimum input voltage regulation

Input voltage regulation

V_BAT= 3.5V, measured at PMID pin

4.0

4.07

4.30

4.2

V

V_BAT= 4V, measured at PMID pin, V_INDPM

1.044*V_BAT+ 0.125V

=

4.15

4.41

V_BAT= 8V, measured at PMID pin, V_INDPM

1.044*V_BAT+ 0.125V

V_INDPM

Input voltage regulation

Input current regulation

8.27

3.00

8.47

3.35

8.67

3.70

V

A

I_{INDPM_3A}

BATTERY OVER-VOLTAGE PROTECTION

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8.5 Electrical Characteristics (continued)

V_{VBUS_UVLOZ}< V_VBUS< V_{VBUS_OVP}and V_VBUS> V_BAT+ V_SLEEP, T_J= -40°C to +125°C, and T_J= 25°C for typical values

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

V_BATrising as percentage of

V_{FB_REF_VBATREG}

V_{FB_BAT_OVP_RISE}

V_{FB_BAT_OVP_FALL}

Battery overvoltage rising threshold

103

104

105

103

%

V_BATfalling as percentage of

V_{FB_REF_VBATREG}

Battery overvoltage falling threshold

101

102

CONVERTER PROTECTION

Bootstrap refresh comparator

(V_BTST- V_SW) when LSFET refresh pulse is

requested, V_BUS= 5V

V_{BTST_REFRESH}

2.7

5.2

3

3.3

6.7

V

A

threshold

HSFET cycle by cycle over current

limit threshold

I_{HSFET_OCP}

6.2

STAT INDICATION

I_{STAT_SINK}

STAT pin sink current

6

mA

Hz

%

F_BLINK

STAT pin blink frequency

STAT pin blink duty cycle

1

F_{BLINK_DUTY}

50

THERMAL REGULATION AND THERMAL SHUTDOWN

Junction temperature regulation

accuracy

T_REG

111

120

133 °C

Thermal shutdown rising threshold

T_SHUT

Temperature increasing

SW node frequency

150

125

°C

Thermal shutdown falling threshold Temperature decreasing

BUCK MODE OPERATION

F_SW

PWM switching frequency

1.02

1.20

97.0

1.38 MHz

%

D_MAX

Maximum PWM Duty Cycle

REGN LDO

V_{REGN_UVLO}

V_REGN

REGN UVLO

V_VBUSrising

3.85

5.0

V

REGN LDO output voltage

V_VBUS= 5V, I_REGN= 0 to 16mA

V_VBUS= 12V, I_REGN= 16mA

4.2

V_REGN

4.50

5.40

ICHG SETTING

V_ICHG

ICHG pin regulated voltage

993

565

998

1003 mV

Maximum resistance to disable

charge

R_{ICHG_SHORT_FALL}

R_{ICHG_OPEN_RISE}

R_{ICHG_MAX}

1.0

kΩ

Minimum resistance to disable

charge

Maximum programmable resistance

at ICHG

250

Minimum programmable resistance

at ICHG

R_{ICHG_MIN_SLE1}

11.70

60

ICHG setting resistor threshold to

clamp precharge and termination

current to 63mA

R_{ICHG_HIGH}

R_ICHG> R_{ICHG_HIGH}

65

70

kΩ

ICHG set at 1.72A with R_ICHG= 23.2kΩ,

I_CHG= K_ICHG/ R_ICHG

K_ICHG

Charge current ratio

36000 40000 44000

36000 40280 44000

32000 40700 48000

AxΩ

ICHG set at 1.0A with R_ICHG= 40.2kΩ, I_CHG

= K_ICHG/ R_ICHG

ICHG set at 0.5A with R_ICHG= 78.7kΩ, I_CHG

= K_ICHG/ R_ICHG

COLD/HOT THERMISTOR COMPARATOR

TCOLD (0°C) threshold, charge

V_T1%

suspended if thermistor temperature V_TSrising, as percentage to V_REGN

is below T1

72.68

73.5

74.35

%

English Data Sheet: SLUSDC7

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8.5 Electrical Characteristics (continued)

V_{VBUS_UVLOZ}< V_VBUS< V_{VBUS_OVP}and V_VBUS> V_BAT+ V_SLEEP, T_J= -40°C to +125°C, and T_J= 25°C for typical values

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

V_T1

V_T3

%

V_TSfalling

As Percentage to V_REGN

70.68

71.5

72.33

48.15

49.15

%

THOT (45°C) threshold, charge

suspended if thermistor temperature V_TSfalling, as percentage to V_REGN

is above T_HOT

46.35

47.35

47.25

48.25

V_TSrising

As percentage to VREGN

LOGIC I/O PIN CHARACTERESTICS (POL, EN)

V_ILO

V_IH

Input low threshold

Input high threshold

Falling

Rising

0.40

V

1.3

I_BIAS

High-level leakage current at /EN pin /EN pin is pulled up to 1.8 V

1.0

µA

8.6 Timing Requirements

PARAMETER

TEST CONDITIONS

MIN

NOM

MAX

UNIT

VBUS/BAT POWER UP

Delay from enable at /EN pin to

charger power on

t_{CHG_ON_EN}

/EN pin voltage rising

245

275

ms

t_{CHG_ON_VBUS}Delay from VBUS to charge start

BATTERY CHARGER

/EN pin is grounded, batttery present

t_{SAFETY_FAST}Charge safety timer

Fast charge safety timer 20 hours

Precharge safety timer

15.0

1.5

20.0

2.0

24.0

2.5

hr

t_{SAFETY_PRE}

Charge safety timer

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8.7 Typical Characteristics

f_SW= 1.2 MHz

Inductance = 1.0 uH

f_SW= 1.2 MHz

V_BAT= 3.8 V

Inductance = 2.2 uH

Inductor DCR = 20 mΩ

V_VBUS= 5.0 V, V_BAT= 3.8 V

Inductor DCR = 10 mΩ

图8-1. 1-Cell Battery Charge Efficiency vs. Charge Current

图8-2. 1-Cell Battery Charge Efficiency vs. Charge Current

4.4

4.3

4.2

4.1

4

VINDPM = 4.1V

VINDPM = 4.3V

3.9

-40

-20

0

20

40

60

80 100 120 140

Junction Temperature (^oC)

VIND

f_SW= 1.2 MHz

V_BAT= 7.6 V

Inductance = 2.2 uH

图8-4. VINDPM vs. Junction Temperature

Inductor DCR = 20 mΩ

图8-3. 2-Cell Battery Charge Efficiency vs. Charge Current

图8-5. Termination Current as Percentage of Charge Current

图8-6. Termination Current as Percentage of Charge Current

vs. Charge Current (1-cell)

vs. Charge Current (2-cell)

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8.7 Typical Characteristics (continued)

图8-7. KICHG vs. Charge Current

图8-8. Charge Current vs. Charge Current Setting Resistance

RICHG

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9 Detailed Description

9.1 Overview

The BQ25306 is a highly integrated standalone single cell and duel cell Li-Ion battery charger for Li-Ion, Li-

polymer and LiFePO4 batteries with charge voltage and charge current programmable by external resistors. It

includes the input reverse-blocking FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching

FET (LSFET, Q3), bootstrap diode for the high-side gate drive as well as current sensing circuitry.

9.2 Functional Block Diagram

English Data Sheet: SLUSDC7

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VBUS

PMID

V_{VBUS_LOWV}

RBFET (Q1)

+

UVLO

V_VBUS

V_BAT+ V_SLEEP

œ

I_IN

Q1 Gate

Control

REGN

EN_REGN

+

SLEEP

REGN

LDO

V_VBUS

œ

EN_CHARGE

BTST

FBO

I_CHG

SNS

V_VBUS

VBUS_OV

+

V_{VBUS_OV}

œ

V_PMID

œ

+

œ

+

œ

HSFET (Q2)

SW

V_INDPM

BAT

I_IN

Converter

Control

+

BATOVP

UCP

REGN

104% × V _{BAT_REG}

I_INDPM

œ

I_{LSFET_UCP}

LSFET (Q3)

GND

IC T_J

T_REG

+

I_Q2

I_Q3

BAT

œ

Q2_OCP

+

I_{HSFET_OCP}

V_{BAT_REG}

œ

V_BTST- V_SW

I_CHG

+

REFRESH

EN_CHARGE

V_{BTST_REFRESH}

I_{CHG_REG}

œ

BAT

Converter

Control State

Machine

IC T_J

+

TSHUT

T_SHUT

œ

ICHG

V_REG-V_RECHG

+

RECHRG

BAT

I_CHG

œ

BAT

+

TERMINATION

BATLOWV

œ

FB

REF/EN

V_{BAT_LOWV}

+

BAT

œ

FB_GND

EN

V_SHORT

Charger

Control State

Machine

+

BATSHORT

SUSPEND

BAT

œ

POL

œ

V_TCOLD

STAT

+

V_TS

œ

V_THOT

SUSPEND

V_TS

TS

+

V_TS

AGND

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9.3 Feature Description

9.3.1 Device Power Up

The EN pin enable or disable the device. When the device is disabled, the device draws minimum current from

VBUS pin. The device can be powered up from either VBUS or by enabling the device from EN pin.

9.3.1.1 Power-On-Reset (POR)

The EN pin can enable or disable the device. When the device is disabled, the device is in disable mode and it

draws minimum current at VBUS. When the device is enabled, if VBUS rises above V_{VBUS_UVLOZ}, the device

powers part of internal bias and comparators and starts Power on Reset (POR).

9.3.1.2 REGN Regulator Power Up

The internal bias circuits are powered from the input source. The REGN supplies internal bias circuits as well as

the HSFET and LSFET gate drive. The REGN also provides voltage rail to STAT LED indication. The REGN is

enabled when all the below conditions are valid:

• Chip is enabled by EN pin

• V_VBUSabove V_{VBUS_UVLOZ}

• V_VBUSabove V_BAT+ V_SLEEPZ

• After sleep comparator deglitch time and REGN delay time

REGN remains on at fault conditions. REGN is powered by VBUS only and REGN is off when VBUS power is

removed.

9.3.1.3 Charger Power Up

Following REGN power-up, if there is no fault conditions, the charger powers up with soft start. If there is any

fault, the charger will remain off until fault is clear. Any of the fault conditions below gates charger power-up:

• V_VBUS> V_{VBUS_OVP}

• Thermistor cold/hot fault on TS pin

• V_BAT> V_{BAT_OVP}

• Safety timer fault

• FB pin is open or short to GND

• ICHG pin is open or short to GND

• Die temperature is above TSHUT

9.3.1.4 Charger Enable and Disable by EN Pin

With POL pin floating, the charger can be enabled with EN pin pulled low (or floating) or disabled by EN pin

pulled high. The charger is in disable mode when disabled.

9.3.1.5 Device Unplugged from Input Source

When V_BUSis removed from an adaptor, the device stays in HiZ mode and the leakage current from the battery

to BAT pin and SW pin is less than I_{Q_BAT_HIZ.}

9.3.2 Battery Charging Management

The BQ25306 charges 1-cell or 2-cell Li-Ion battery with up to 3.0-A charge current from up to 17-V input

voltage. A new charge cycle starts when the charger power-up conditions are met. The charge voltage

programmed by external resistor divider at FB pin and charge current are set by external resistors at ICHG pin.

The charger terminates the charging cycle when the charging current is below termination threshold I_TERMand

charge voltage is above recharge threshold, and device is not in IINDPM or thermal regulation. When a fully

charged battery's voltage is discharged below recharge threshold, the device automatically starts a new charging

cycle with safety timer reset. To initiate a recharge cycle, the conditions of charger power-up must be met. The

STAT pin output indicates the charging status of charging (LOW), charging complete or charge disabled (HIGH)

or charging faults (BLINKING).

English Data Sheet: SLUSDC7

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9.3.2.1 Battery Charging Profile

The device charges the battery in four phases: battery short, preconditioning, constant current, constant voltage.

The fast charge current is set by a resistor ICHG pin. The battery charging profile is shown in the figure. The

device charges battery based on charge voltage set by the feedback resister divider from BAT to FB and

FB_GND.

表9-1. Charging Current Setting

MODE

BATTERY VOLTAGE V_BAT

CHARGE CURRENT

TYPICAL VALUE

Battery Short

V_BAT< V_{BAT_SHORT}

I_{BAT_SHORT}

35 mA

10% of I_CHG( I_PRE

63mA )

>

Precharge

V_{BAT_SHORT}< V_BAT< V_{BAT_LOWV}

V_{BAT_LOWV}< V_BAT

I_PRECHG

I_CHG

Fast Charge

Set by ICHG resistor

Regulation Voltage VBATREG

Fast Charge Current ICHG

Battery Voltage

Charge Current

V_{BAT_LOWV}

V_{BAT_SHORT}

I_PRECHG

I_TERM

I_{BAT_SHORT}

Time

Trickle Charge

Pre-charge

Fast Charge

Voltage Regulation

Safety Timer Expiration if

Charge is not Terminated

图9-1. Battery Charging Profile

9.3.2.2 Precharge

The device charges the battery at 10% of set fast charge current in precharge mode. When R_ICHG> R_{ICHG_HIGH}

,

the precharge current is clamped at 63mA.

9.3.2.3 Charging Termination

The device terminates a charge cycle when the battery voltage is above recharge threshold and the charge

current is below termination current. After a charging cycle is completed, the converter stops swicthing, charge is

terminated and the system load is powered from battery. Termination is temporarily disabled when the charger

device is in input current regulation or thermal regulation mode and the charging safety timer is counted at half

the clock rate. The charge termination current is 10% of set fast charge current if R_ICHG< R_{ICHG_HIGH}. The

termination current is clamped at 63mA if R_ICHG> R_{ICHG_HIGH}

.

9.3.2.4 Battery Recharge

A charge cycle is completed and the charge is terminated, safety time is disabled. If the battery feedback voltage

VFB decreases below V_{FB_REF_RECHG}, the charger is enabled with safety timer reset and enabled.

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9.3.2.5 Charging Safety Timer

The device has built-in safety timer to prevent extended charging cycle due to abnormal battery conditions. The

safety timer is 20 hours when the battery voltage is above V_{BAT_LOWV}threshold and 2 hours below V_{BAT_LOWV}

threshold. When the safety timer expires, charge is suspended until the safety timer is reset. Safety timer is reset

and charge starts under one of the following conditions:

• Battery voltage falls below recharge threshold

• VBUS voltage is recycled

• EN pin is toggled

• Battery voltage transits across V_{BAT_SHORT}threshold

• Battery voltage transits across V_{BAT_LOWV}threshold

If the safety timer expires and the battery voltage is above recharge threshold, the charger is suspended and the

STAT pin is open. If the safety timer expires and the battery voltage is below the recharge threshold, the charger

is suspended and the STAT pin blinks to indicate a fault. The safety timer fault is cleared with safety timer reset.

During input current regulation, thermal regulation, the safety timer counts at half the original clock frequency

and the safety timer is doubled. During TS fault, V_{BUS_OVP}, V_{BAT_OVP}, ICHG pin open and short, FB pin fault, and

IC thermal shutdown faults, the safety timer is suspended. Once the fault(s) is clear, the safety timer resumes to

count.

9.3.2.6 Thermistor Temperature Monitoring

The charger device provides a single thermistor input TS pin for battery temperature monitor. RT1 and RT2

programs the cold temperature T1 and hot temperature T3. In the equations, R_NTC,T1is NTC thermistor

resistance value at temperature T1 and R_NTC,T3is NTC thermistor resistance values at temperature T3.

Assuming RHOT = 0, select 0°C to 45°C for battery charge temperature range, then NTC thermistor 103AT-2

resistance R_NTC,T1= 27.28 kΩ ( at 0°C) and R_NTC,T3= 4.91 kΩ (at 45°C), from the 方程式 1 and 方程式 2, RT1

and RT2 are derived as:

•RT1 = 4.527 kΩ

•RT2 = 23.26 kΩ

On top of the calculation results, adding RHOT resisitor can shift HOT temperature T3 up and only slightly shift

up COLD temperature T1. The actual temperature T3 can be looked up in a NTC resistance table based on

(R_NTC,T3- RHOT) and T1 can be looked up in a NTC resistance table based on (R_NTC,T1- RHOT). Because

R_NTC,T1is much higher than R_NTC,T3, RHOT can adjust HOT temperature significantly with mimimal affect on

COLD temperature. RHOT is optional.

REGN

RT1

RHOT

TS

RTH

103AT

RT2

图9-2. Battery Temperature Sensing Circuit

English Data Sheet: SLUSDC7

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T1

T3

%

T3

T1

%

T1

T3

(1)

(2)

%

9.3.3 Charging Status Indicator (STAT)

The device indicates charging state on the open drain STAT pin. The STAT pin can drive a LED that is pulled up

to REGN rail through a current limit resistor.

表9-2. STAT Pin State

CHARGING STATE

STAT INDICATOR

LOW

Charging in progress (including recharge)

Charging complete

HIGH

HiZ mode, sleep mode, charge disable

HIGH

Safety timer expiration with battery voltage above recharge threshold

HIGH

Charge faults:

1. VBUS input over voltage

2. TS cold/hot faults

3. Battery over voltage

BLINKING at 1 Hz

with 50% duty cycle

4. IC thermal shutdown

5. Safety timer expiration with battery voltage below recharge threshold

6. ICHG pin open or short

7. FB pin open or short

9.3.4 Protections

9.3.4.1 Voltage and Current Monitoring

The device closely monitors the input voltage and input current for safe operation.

9.3.4.1.1 Input Over-Voltage Protection

This device integrates the functionality of an input over-voltage protection (OVP). The input OVP threshold is

V_{VBUS_OVP_RISE}. During an input over-voltage event, the converter stops switching and safety timer stops

counting as well. The converter resumes switching and the safety timer resumes counting once the VBUS

voltage drops back below (V_{VBUS_OVP_RISE}- V_{VBUS_OVP_HYS}). The REGN LDO remains on during an input over-

voltage event. The STAT pin blinks during an input OVP event.

9.3.4.1.2 Input Voltage Dynamic Power Management (VINDPM)

When the input current of the device exceeds the current capability of the power supply, the charger device

regulates PMID voltage by reducing charge current to avoid crashing the input power supply. VINDPM

dynamically tracks the battery voltage. The actual VINDPM is the higher of V_{INDPM_MIN}and (1.044*VBAT +

125mV).

9.3.4.1.3 Input Current Limit

The device has built-in input current limit. When the input current is over the threshold I_INDPM, the converter duty

cycle is reduced to reduce input current.

9.3.4.1.4 Cycle-by-Cycle Current Limit

High-side (HS) FET current is cycle-by-cycle limited. Once the HSFET peak current hits the limit I_{HSFET_OCP}, the

HSFET shuts down until the current is reduced below a threshold.

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9.3.4.2 Thermal Regulation and Thermal Shutdown

The device monitors the junction temperature T_Jto avoid overheating the chip and limit the device surface

temperature. When the internal junction temperature exceeds thermal regulation limit T_REG, the device lowers

down the charge current. During thermal regulation, the average charging current is usually below the

programmed battery charging current. Therefore, termination is disabled and the safety timer runs at half the

clock rate.

Additionally, the device has thermal shutdown built in to turn off the charger when device junction temperature

exceeds T_SHUTrising threshold. The charger is reenabled when the junction temperature is below T_SHUTfalling

threshold. During thermal shutdown, the safety timer stops counting and it resumes when the temperature drops

below the threshold.

9.3.4.3 Battery Protection

9.3.4.3.1 Battery Over-Voltage Protection (V_{BAT_OVP}

)

The battery voltage is clamped at above the battery regulation voltage. When the battery voltage is over

V_{BAT_OVP_RISE}, the converter stops switching until the battery voltage is below the falling threshold. During a

battery over-voltage event, the safety timer stops counting and STAT pin reports the fault and it resumes once

the battery voltage falls below the falling threshold. A 7-mA pull-down current is on the BAT pin once BAT_OVP

is triggered. BAT_OVP may be triggered in charging mode, termination mode, and fault mode.

9.3.4.3.2 Battery Short Circuit Protection

When the battery voltage falls below the V_{BAT_SHORT}threshold, the charge current is reduced to I_{BAT_SHORT}

.

9.3.4.4 ICHG Pin Open and Short Protection

To protect against ICHG pin is short or open, the charger immediately shuts off once ICHG pin is open or short to

GND and STAT pin blinks to report the fault. At powerup, if ICHG pin is detected open or short to GND, the

charge will not power up until the fault is clear.

9.4 Device Functional Modes

9.4.1 Disable Mode, HiZ Mode, Sleep Mode, Charge Mode, Termination Mode, and Fault Mode

The device operates in different modes depending on VBUS voltage, battery voltage, and EN pin, POL pin,

ICHG pin and FB pin connection.The functional modes are listed in the following table.

表9-3. Device Functional Modes

MODE

CONDITIONS

REGN LDO

CHARGE ENABLED

STAT PIN

Device is disabled, POL floating, EN =

1

Disable Mode

OFF

NO

OPEN

Device is enabled and

V_VBUS< V_{VBUS_UVLOZ}

HiZ Mode

OFF

NO

OPEN

Device is enabled and

V_VBUS> V_{VBUS_UVLOZ}and

V_VBUS< V_BAT+ V_SLEEPZ

Sleep Mode

Device is enabled, V_VBUS

>

V_{VBUS_LOWV}and V_VBUS> V_BAT

V_SLEEPZ, no faults, charge is not

terminated

+

Charge Mode

ON

YES

NO

SHORT to GND

OPEN

V_VBUS> V_{VBUS_LOWV}and V_VBUS

V_BAT+ V_SLEEPZand device is enabled,

no faults, charge is terminated

>

Charge Termination

Mode

V_{BUS_OVP}, TS cold/hot, V_{BAT_OVP}, IC

thermal shutdown, safety timer fault,

ICHG pin open or short, FB pin open

or short

Fault Mode

NO

BLINKING

English Data Sheet: SLUSDC7

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10 Application and Implementation

备注

以下应用部分的信息不属于TI 组件规范，TI 不担保其准确性和完整性。客户应负责确定 TI 组件是否适

用于其应用。客户应验证并测试其设计，以确保系统功能。

10.1 Application Information

A typical application consists of a single cell or dual cell battery charger for Li-Ion, Li-polymer and LiFePO4

batteries used in a wide range of portable devices and accessories. It integrates an input reverse-block FET

(RBFET, Q1), high-side switching FET (HSFET, Q2), and low-side switching FET (LSFET, Q3). The Buck

converter output is connected to the battery directly to charge the battery and power system loads. The device

also integrates a bootstrap diode for high-side gate drive.

10.2 Typical Applications

The typical applications in this section include a standalone charger without power path, a standalone charger

with external power path, and a typical application with MCU programmed charge current.

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10.2.1 Typical Application

The typical application in this section includes a standalone charger without power path.

1.0 …H (V_{VBUS_MAX}

2.2 …H (V_{VBUS_MAX}

<

>

6.2V)

VBUS

SW

VBUS

Q1

Q2

2.2 …F

10 …F

47 nF

BTST

Q3

PMID

GND

BAT

10 …F

REGN

470pF

R1

R2

FB

2.2 …F

200kꢀ

FB_GND

ICHG

Q4

REGN

1 kꢀ

TS

STAT

POL

EN

Thermal Pad

图10-1. Typical Application Diagram

(1-µH inductor is recommended if maximum input voltage V_{VBUS_MAX}< 6.2V; 2.2-µH inductor is

recommended if maximum input voltage V_{VBUS_MAX}> 6.2V )

10.2.1.1 Design Requirements

表10-1. Design Requirements

PARAMETER

Input Voltage

VALUE

4.1V to 17V

3.0A

Input Current

Fast Charge Current

Battery Regulation Voltage

3.0A

3.4 V –9.0 V

10.2.1.2 Detailed Design Procedure

10.2.1.2.1 Charge Voltage Settings

Battery charge voltage is set by a resister divider. The battery charge voltage is programmed as VREG =

1.1(1+R1/R2). R1 is a high side resistor from BAT to FB pin and R2 is a low side resister from FB to FB_GND.

The recommended resistance of R2 is 200 kΩor lower. 1% or higher accuracy of resistors is needed for R1 and

R2 resisitors. For a 1-cell 4.2-V battery, R1 = 562 kΩ and R2 = 200 kΩ are recommended; For a 2-cell 8.4-V

battery, R1 = 1.33MΩand R2 = 200 kΩare recommded.

10.2.1.2.2 Charge Current Setting

The charger current is set by the resistor value at the ICHG pin according to the equation below:

I_CHG(A) = K_ICHG(A·Ω) / R_ICHG(Ω)

English Data Sheet: SLUSDC7

22

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K_ICHGis a coefficient that is listed in Electrical Characteristics table and R_ICHGis the resistor value from ICHG pin

to GND. K_ICHGis typically 40,000 (A·Ω) and it is slightly shifted up at lower charge current setting. The K_ICHGvs.

ICHG typical characteresitc curve is shown in 图8-7.

10.2.1.2.3 Inductor Selection

The 1.2-MHz switching frequency allows the use of small inductor and capacitor values. Inductance value is

selected based on maximum input voltage V_{VBUS_MAX}in applications. 1-µH inductor is recommended if

V_{VBUS_MAX}< 6.2V and 2.2-µH inductor is recommended if V_{VBUS_MAX}> 6.2V for either 1-cell or 2-cell battery

charge. An inductor saturation current I_SATshould be higher than the charging curren I_CHGplus half the ripple

current I_RIPPLE

:

I

_SAT≥I_CHG+ (1/2) I_RIPPLE

(3)

The inductor ripple current I_RIPPLEdepends on the input voltage (V_VBUS), the duty cycle (D = V_BAT/V_VBUS), the

switching frequency (f_S) and the inductance (L).

V_IN´D ´ (1- D)

=

I_RIPPLE

fs ´ L

(4)

The maximum inductor ripple current occurs when the duty cycle (D) is 0.5 or approximately 0.5.

10.2.1.2.4 Input Capacitor

Design input capacitance to provide enough ripple current rating to absorb the input switching ripple current.

Worst case RMS ripple current is half of the charging current when the duty cycle is 0.5. If the converter does not

operate at 50% duty cycle, then the worst case capacitor RMS current I_Cinoccurs where the duty cycle is closest

to 50% and can be estimated using 方程式5.

I_CIN= I_CHG´ D ´ (1- D)

(5)

A low ESR ceramic capacitor such as X7R or X5R is preferred for the input decoupling capacitor and should be

placed as close as possible to the drain of the high-side MOSFET and source of the low-side MOSFET. The

voltage rating of the capacitor must be higher than the normal input voltage level. A rating of 25-V or higher

capacitor is preferred for 15-V input voltage.

10.2.1.2.5 Output Capacitor

Ensure that the output capacitance has enough ripple current rating to absorb the output switching ripple current.

The equation below shows the output capacitor RMS current I_COUTcalculation.

I_RIPPLE

I_COUT

=

» 0.29 ´ I_RIPPLE

2 ´

3

(6)

The output capacitor voltage ripple can be calculated as follows:

æ

ç

è

ö

V_OUT

8LCfs²

V_OUT

V

DV_O=

1-

÷

IN ø

(7)

At certain input and output voltage and switching frequency, the voltage ripple can be reduced by increasing the

output filter LC.

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10.2.1.3 Application Curves

SW

VBUS

V_BAT

REGN

STAT

IBAT

STAT

IBAT

VBUS = 5 V

ICHG = 2 A

VBAT = 1.5V - 4.2V

VBATREG = 4.2V

ICHG = 2A

Device Enabled

图10-2. Power Up from VBUS

图10-3. Charge Cycle

VBUS = 15 V

ICHG = 2 A

VBAT = 1.5V - 8.8V

VBATREG = 8.4V

VBUS = 12V -25V -12V

ICHG = 1A

VBAT = 3.8V

图10-5. VBUS Over Voltage Protection

图10-4. Charge Cycle

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VBUS = 5 V

ICHG = 2A

Adaptor Currrent Limit: 1A

VBAT = 3.5V

From ICHG = 2A to ICHG pin

VBUS = 5 V

图10-6. VBUS startup into VINDPM

short

图10-7. ICHG Pin Short Circuit Protection

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10.2.2 Typical Application with External Power Path

In the case where a system needs to be immediately powered up from VBUS when the battery is overdischarged

or dead, the application circuit shown in 图 10-8 can be used to provide a power path from VBUS/PMID to

VSYS. PFET Q4 is an external PFET that turns on to supply VSYS from the battery when VBUS is removed;

PFET Q4 turns off when VBUS is plugged in and VSYS is supplied from VBUS/PMID.

VSYS

10 µF

VBUS

PMID

R

Q4

L

VBUS

SW

VBUS

Q1

Q2

10 …F

2.2 …F

47 nF

BTST

GND

REGN

Q3

2.2 …F

REGN

BAT

FB

470pF

STAT

ICHG

R1

1 kꢀ

R2

200kꢀ

FB_GND

REGN

EN

TS

POL

Thermal Pad

图10-8. Typical Application Diagram with Power Path

(1-µH inductor is recommended if maximum input voltage V_{VBUS_MAX}< 6.2V; 2.2-µH inductor is

recommended if maximum input voltage V_{VBUS_MAX}> 6.2V )

10.2.2.1 Design Requirements

For design requirements, see 节10.2.1.1.

English Data Sheet: SLUSDC7

26

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10.2.3 Typical Application with MCU Programmable Charge Current

In some application cases, the charge current needs to be controlled by a MCU. In those cases, the GPIOs of

the MCU can be used for on/off control of the charge current setting resistors R_ICHG1and R_ICHG2as shown in 图

10-9. With GPIO1 and GPIO2 on/off control, three levels of charge current can be programmed. If the charge

current needs to be controlled smoothly in a wide range, a PWM output of the MCU can be used to generate an

average DC voltage output to program the charge current as show in 图 10-10. The charge current can be

calculated as: (1V - V_PWM) / (R_ICHG1+ R_ICHG2). V_PWMis the averaged DC voltage of the PWM output and it must

be lower than 1 V. The regulated voltage at the ICHG pin is 1 V.

1.0 …H (V_{VBUS_MAX}< 6.2V)

2.2 …H (V_{VBUS_MAX}> 6.2V)

VBUS

SW

VBUS

Q1

Q2

10 …F

2.2 …F

47 nF

BTST

GND

Q3

PMID

10 …F

REGN

BAT

FB

1 kꢀ

STAT

470pF

R1

REGN

R2

200kꢀ

REGN

FB_GND

2.2 …F

MCU

RICHG1

RICHG2

GPIO

REGN

ICHG

TS

EN

POL

Thermal Pad

图10-9. Typical Application with MCU Programmed Charge Current

(1-µH inductor is recommended if maximum input voltage V_{VBUS_MAX}< 6.2V; 2.2-µH inductor is

recommended if maximum input voltage V_{VBUS_MAX}> 6.2V )

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1.0 …H (V_{VBUS_MAX}< 6.2V)

2.2 …H (V_{VBUS_MAX}> 6.2V)

VBUS

SW

VBUS

Q1

Q2

10 …F

2.2 …F

47 nF

BTST

GND

Q3

PMID

10 …F

REGN

BAT

FB

1 kꢀ

470pF

STAT

R1

REGN

R2

200kꢀ

REGN

FB_GND

2.2 …F

REGN

GPIO

PWM

EN

RICHG2

RICHG1

TS

ICHG

MCU

POL

Thermal Pad

图10-10. Typical Application with MCU Programmed Charge Current

(1-µH inductor is recommended if maximum input voltage V_{VBUS_MAX}< 6.2V; 2.2-µH inductor is

recommended if maximum input voltage V_{VBUS_MAX}> 6.2V )

10.2.3.1 Design Requirements

For design requirements, see 节10.2.1.1.

English Data Sheet: SLUSDC7

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11 Power Supply Recommendations

In order to provide an output voltage on the BAT pin, the device requires a power supply between 4.1 V and 17 V

single-cell or dual-cell Li-Ion battery with positive terminal connected to BAT. The source current rating needs to

be at least 3 A in order for the buck converter to provide maximum output power to BAT or the system connected

to BAT pin.

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12 Layout

12.1 Layout Guidelines

The switching node rise and fall times should be minimized for minimum switching loss. Proper layout of the

components to minimize high frequency current path loop (see 图 12-1) is important to prevent electrical and

magnetic field radiation and high frequency resonant problems. Follow this specific order carefully to achieve the

proper layout.

• Place input capacitor as close as possible to PMID pin and use shortest thick copper trace to connect input

capacitor to PMID pin and GND plane.

• It is critical that the exposed thermal pad on the backside of the device be soldered to the PCB ground.

Ensure that there are sufficient thermal vias directly under the IC, connecting to the ground plane on the other

layers. Connect the GND pins to thermal pad on the top layer.

• Put output capacitor near to the inductor output terminal and the charger device. Ground connections need to

be tied to the IC ground with a short copper trace or GND plane

• Place inductor input terminal to SW pin as close as possible and limit SW node copper area to lower

electrical and magnetic field radiation. Do not use multiple layers in parallel for this connection. Minimize

parasitic capacitance from this area to any other trace or plane.

• Route analog ground separately from power ground if possible. Connect analog ground and power ground

together using thermal pad as the single ground connection point under the charger device. It is acceptable to

connect all grounds to a single ground plane if multiple ground planes are not available.

• Decoupling capacitors should be placed next to the device pins and make trace connection as short as

possible.

• For high input voltage and high charge current applications, sufficient copper area on GND should be

budgeted to dissipate heat from power losses.

• Ensure that the number and sizes of vias allow enough copper for a given current path

• See the 2 layer PCB design example in 图12-2 for the recommended component placement with trace,

grounding and via locations.

+

œ

图12-1. High Frequency Current Path

12.2 Layout Example

The device pinout and component count are optimized for a 2 layer PCB design. The 2-layer PCB layout

example is shown in 图12-2.

English Data Sheet: SLUSDC7

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Top layer

Bottom layer

GND

Vias

1 µH /

2.2uH

BAT

47 nF

1100uµF

2.2 µF

VBUS

2.2 µF

10 µF

VBUS

GND

BAT

1

2

3

4

12

11

10

9

REGN

STAT

ICHG

FB

5

6

7

8

图12-2. Layout Example

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13 Device and Documentation Support

13.1 Device Support

13.1.1 第三方产品免责声明

TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此

类产品或服务单独或与任何TI 产品或服务一起的表示或认可。

13.2 Documentation Support

13.2.1 Related Documentation

For related documentation see the following: BQ25306 Evaluation Module User's Guide

13.3 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

13.4 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

13.5 Trademarks

TI E2E^™is a trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

13.6 静电放电警告

静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理

和安装程序，可能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参

数更改都可能会导致器件与其发布的规格不相符。

13.7 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

English Data Sheet: SLUSDC7

32

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14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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English Data Sheet: SLUSDC7

GENERIC PACKAGE VIEW

RTE 16

3 x 3, 0.5 mm pitch

WQFN - 0.8 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

This image is a representation of the package family, actual package may vary.

Refer to the product data sheet for package details.

4225944/A

www.ti.com

PACKAGE OUTLINE

RTE0016C

WQFN - 0.8 mm max height

S

C

A

L

E

3

.

6

0

PLASTIC QUAD FLATPACK - NO LEAD

3.1

2.9

B

A

PIN 1 INDEX AREA

3.1

2.9

SIDE WALL

METAL THICKNESS

DIM A

OPTION 1

0.1

OPTION 2

0.2

C

0.8 MAX

SEATING PLANE

0.08

0.05

0.00

1.68 0.07

(DIM A) TYP

5

8

EXPOSED

THERMAL PAD

12X 0.5

4

9

4X

SYMM

17

1.5

1

12

0.30

16X

0.18

PIN 1 ID

(OPTIONAL)

13

16

0.1

C A B

SYMM

0.05

0.5

0.3

16X

4219117/B 04/2022

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

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EXAMPLE BOARD LAYOUT

RTE0016C

WQFN - 0.8 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

(

1.68)

SYMM

13

16

16X (0.6)

1

12

16X (0.24)

SYMM

(2.8)

17

(0.58)

TYP

12X (0.5)

9

4

(

0.2) TYP

VIA

5

8

(R0.05)

ALL PAD CORNERS

(0.58) TYP

(2.8)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:20X

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

SOLDER MASK

OPENING

METAL

EXPOSED

METAL

EXPOSED

METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

NON SOLDER MASK

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4219117/B 04/2022

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

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EXAMPLE STENCIL DESIGN

RTE0016C

WQFN - 0.8 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

(

1.55)

16

13

16X (0.6)

1

12

16X (0.24)

17

SYMM

(2.8)

12X (0.5)

9

4

METAL

ALL AROUND

5

8

SYMM

(2.8)

(R0.05) TYP

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD 17:

85% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

SCALE:25X

4219117/B 04/2022

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

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重要声明和免责声明

TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验

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TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE

邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	BQ25306
厂家：	TEXAS INSTRUMENTS
描述：	独立型 17V、3A 1 至 2 节降压电池充电器电池
文件：	总38页 (文件大小：2558K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BQ25306 [TI]

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