BQ27427YZFR [TI]
具有预编程化学成分和集成感应电阻器的单芯电池电量监测计 | YZF | 9 | -40 to 85;
| 型号： | BQ27427YZFR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有预编程化学成分和集成感应电阻器的单芯电池电量监测计 | YZF | 9 | -40 to 85 电池 电阻器 |
| 文件： | 总24页 (文件大小：1288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BQ27427
ZHCSRB7 –DECEMBER 2022
BQ27427 具有集成检测电阻的系统侧Impedance Track™ 电量监测计
1 特性
3 说明
• 单节锂离子电池电量监测计
– 驻留在系统主板上
德州仪器 (TI) BQ27427 电池电量监测计是一款单节电
池电量监测计，只需进行少量的用户配置和系统微控制
器固件开发工作即可快速启动系统。
– 支持嵌入式或可拆除电池
– 由具有集成LDO 的电池直接供电
– 集成低阻值检测电阻(7mΩ)
• 超低功耗：正常模式下为50µA，睡眠模式下为
9µA
通过预编程三种化学配置文件，最大限度减少用户配
置，并帮助客户管理项目中不同电池化学成分的库存。
BQ27427 电池电量监测计在睡眠模式下具有超低功
耗，有助于延长电池运行时间。可配置中断有助于节省
系统功耗，释放主机使其停止继续轮询。外部热敏电阻
为精确温度感测提供支持。
• 基于获得专利的Impedance Track™ 技术的电池电
量监测
– 为4.2V、4.35V 和4.4V 电池提供三种可选的预
编程配置文件
– 借助平滑滤波器报告剩余电量和荷电状态(SOC)
– 针对电池老化、自放电、温度和速率变化自动调
节
BQ27427 电池电量监测计使用已获专利的 Impedance
Track™ 算法来进行电量监测，并提供诸如剩余电量
(mAh)、荷电状态(%) 和电池电压(mV) 等信息。
使用 BQ27427 电量监测计进行电池电量监测时，只需
连接至可拆卸电池包或嵌入式电池电路的 PACK+ (P+)
和 PACK- (P-)。微型 9 球，1.62mm x 1.58mm，
0.5mm 间距 NanoFree™ 芯片级封装 (DSBGA) 非常适
合空间受限的应用。
– 估计电池健康状况（老化）
• 微控制器外设接口支持：
– 400kHz I2C 串行接口
– 可配置SOC 中断或
电池低电量数字输出警告
– 内部温度传感器或主机报告的温度或外部热敏电
阻
器件信息
封装尺寸（标称值）
器件型号
BQ27427
封装
YZF (9)(1)
1.62mm x 1.58mm
2 应用
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
• 智能手机、功能型手机和平板电脑
• 可穿戴设备
• 楼宇自动化
• 便携式医疗/工业手持终端
• 便携式音频设备
• 游戏
SRX
SCL
VSYS
2
I C
Bus
Coulomb
Counter
Integrated
Sense
SDA
Resistor
CPU
Battery Pack
GPOUT
BIN
PACKP
BAT
ADC
Li-Ion
Cell
T
Protection
IC
VDD
VSS
1 µF
PACKN
2.2 µF
1.8 V
LDO
NFET NFET
简化原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLUSEB5
BQ27427
ZHCSRB7 –DECEMBER 2022
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Table of Contents
6.13 SHUTDOWN and WAKE-UP Timing........................ 9
6.14 Typical Characteristics..............................................9
7 Detailed Description......................................................10
7.1 Overview...................................................................10
7.2 Functional Block Diagram.........................................10
7.3 Feature Description...................................................10
7.4 Device Functional Modes..........................................12
8 Application and Implementation..................................13
8.1 Application Information............................................. 13
8.2 Typical Applications.................................................. 13
9 Power Supply Recommendation..................................15
9.1 Power Supply Decoupling.........................................15
10 Layout...........................................................................16
10.1 Layout Guidelines................................................... 16
10.2 Layout Example...................................................... 16
11 Device and Documentation Support..........................17
11.1 Documentation Support.......................................... 17
11.2 Trademarks............................................................. 17
11.3 Electrostatic Discharge Caution..............................17
11.4 术语表..................................................................... 17
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information....................................................5
6.5 Supply Current............................................................6
6.6 Digital Input and Output DC Characteristics............... 6
6.7 LDO Regulator, Wake-up, and Auto-Shutdown
DC Characteristics........................................................ 6
6.8 LDO Regulator, Wake-up, and Auto-Shutdown
AC Characteristics.........................................................6
6.9 ADC (Temperature and Cell Measurement)
Characteristics...............................................................7
6.10 Integrating ADC (Coulomb Counter)
Characteristics ..............................................................7
6.11 Integrated Sense Resistor Characteristics,
Information.................................................................... 17
-40°C to 85 °C............................................................... 7
6.12 I2C-Compatible Interface Communication
Timing Characteristics...................................................8
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
DATE
REVISION
NOTES
December 2022
*
Initial Release
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5 Pin Configuration and Functions
3
2
1
C
B
A
图5-1. Top View
1
2
3
C
B
A
图5-2. Bottom View
表5-1. Pin Functions
PIN
TYPE(1)
DESCRIPTION
NAME
NUMBER
LDO regulator input and battery voltage measurement input. Kelvin sense connect to positive
battery terminal (PACKP). Connect a capacitor (1 µF) between BAT and VSS. Place the capacitor
close to the gauge.
BAT
C3
PI, AI
Battery insertion detection input. If OpConfig [BI_PU_EN] = 1 (default), a logic low on the pin is
detected as battery insertion. For a removable pack, the BIN pin can be connected to VSS
through a pulldown resistor on the pack, typically the 10-kΩthermistor; the system board should
use a 1.8-MΩpullup resistor to VDD to ensure the BIN pin is high when a battery is removed. If
the battery is embedded in the system, it is recommended to leave [BI_PU_EN] = 1 and use a
10-kΩpulldown resistor from BIN to VSS. If [BI_PU_EN] = 0, then the host must inform the
gauge of battery insertion and removal with the BAT_INSERT and BAT_REMOVE
subcommands.
BIN
B1
DI
A 10-kΩpulldown resistor should be placed between BIN and VSS, even if this pin is unused.
NOTE: The BIN pin must not be shorted directly to VCC or VSS and any pullup resistor on the BIN
pin must be connected only to VDD and not an external voltage rail. If an external thermistor is
used for temperature input, the thermistor should be connected between this pin and VSS
.
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表5-1. Pin Functions (continued)
PIN
TYPE(1)
DESCRIPTION
NAME
NUMBER
This open-drain output can be configured to indicate BAT_LOW when the OpConfig
[BATLOWEN] bit is set. By default [BATLOWEN] is cleared and this pin performs an interrupt
function (SOC_INT) by pulsing for specific events, such as a change in state-of-charge. Signal
polarity for these functions is controlled by the [GPIOPOL] configuration bit. This pin should not
be left floating, even if unused; therefore, a 10-kΩpullup resistor is recommended. If the device
is in SHUTDOWN mode, toggling GPOUT will make the gauge exit SHUTDOWN.
GPOUT
A1
DO
It is recommended to connect GPOUT to a GPIO of the host MCU so that in case of any
inadvertent shutdown condition, the gauge can be commanded to come out of SHUTDOWN.
SCL
SDA
A3
A2
DIO
DIO
Peripheral I2C serial bus for communication with system (primary). Open-drain pins. Use with
external 10-kΩ pullup resistors (typical) for each pin. If the external pullup resistors will be
disconnected from these pins during normal operation, recommend using external 1-MΩ
pulldown resistors to VSS at each pin to avoid floating inputs.
Integrated high-side sense resistor and coulomb counter input, connected between battery pack
and system power rail VSYS.
SRX
C2
AI
1.8-V regulator output. Decouple with 2.2-μF ceramic capacitor to VSS. This pin is not intended
to provide power for other devices in the system.
VDD
VSS
B3
PO
PI
B2, C1
Ground pin
(1) IO = Digital input-output, AI = Analog input, P = Power connection
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6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
BAT –0.3
–0.3
–0.3
–0.3
–40
MAX
UNIT
V
VBAT
VSRX
VDD
BAT pin input voltage range
6
SRX pin input voltage range
VBAT + 0.3
V
V
VDD pin supply voltage range (LDO output)
Open-drain IO pins (SDA, SCL)
Push-pull IO pins (BIN)
2
6
V
VIOD
VIOPP
TA
V
VDD + 0.3
85
V
Operating free-air temperature range
°C
°C
Storage temperature, Tstg
150
–65
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and
this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±1500
Electrostatic
discharge
V(ESD)
V
Charged-device model (CDM), per JEDEC specification ANSI/ESDA/
JEDEC JS-002(2)
±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
TA = 30°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)
MIN NOM
MAX
UNIT
(1)
CBAT
External input capacitor for internal Nominal capacitor values specified. Recommend a
0.1
2.2
μF
LDO between BAT and VSS
5% ceramic X5R-type capacitor located close to
the device.
(1)
CLDO18
External output capacitor for internal
LDO between VDD and VSS
μF
(1)
VPU
External pullup voltage for open-
drain pins (SDA, SCL, GPOUT)
1.62
3.6
V
(1) Specified by design. Not production tested.
6.4 Thermal Information
BQ27427
THERMAL METRIC(1)
YZF (DSBGA)
9 PINS
107.8
0.7
UNIT
RθJA
RθJCtop
RθJB
ψJT
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
60.4
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
3.5
60.4
ψJB
RθJCbot
NA
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics Application Report, SPRA953.
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6.5 Supply Current
TA = 30°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
50
9
MAX
UNIT
μA
ILOAD > Sleep Current (2)
ILOAD < Sleep Current (2)
(1)
ICC
NORMAL mode current
SLEEP mode current
(1)
ISLP
μA
Fuel gauge in host commanded
SHUTDOWN mode.
(1)
ISD
SHUTDOWN mode current
0.6
μA
(LDO regulator output disabled)
(1) Specified by design. Not production tested.
(2) Wake Comparator Disabled.
6.6 Digital Input and Output DC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)(Force Note1)(1)
PARAMETER
TEST CONDITIONS
MIN
VPU × 0.7
1.4
TYP
MAX
UNIT
V
VIH(OD)
VIH(PP)
VIL
Input voltage, high(2)
External pullup resistor to VPU
Input voltage, high (3)
Input voltage, low(2) (3)
Output voltage, low(2)
Output source current, high(2)
Output sink current, low(2)
Input capacitance(2) (3)
V
0.6
0.6
0.5
–3
5
V
VOL
V
IOH
mA
mA
pF
IOL(OD)
(1)
CIN
Input Leakage Current (SCL, SDA,
BIN, GPOUT)
Ilkg
1
μA
(1) Specified by design. Not production tested.
(2) Open Drain pins: (SCL, SDA, GPOUT)
(3) Push-Pull pin: (BIN)
6.7 LDO Regulator, Wake-up, and Auto-Shutdown DC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)(Force Note1)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
VBAT
VDD
BAT pin regulator input
Regulator output voltage
2.45
4.5
1.85
2
V
VBAT undervoltage lock-out
LDO wake-up rising threshold
UVLOIT+
UVLOIT–
V
V
V
VBAT undervoltage lock-out
LDO auto-shutdown falling threshold
1.95
GPOUT (input) LDO Wake-up rising LDO Wake-up from SHUTDOWN
edge threshold(2)
mode
(1)
VWU+
1.2
(1) Specified by design. Not production tested.
(2) If the device is commanded to SHUTDOWN via I2C with VBAT > UVLOIT+, a wake-up rising edge trigger is required on GPOUT.
6.8 LDO Regulator, Wake-up, and Auto-Shutdown AC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Time delay from SHUTDOWN
command to LDO output disable.
(1)
(1)
tSHDN
tSHUP
SHUTDOWN entry time
250
ms
Minimum low time of GPOUT (input)
in SHUTDOWN before WAKEUP
SHUTDOWN GPOUT low time
Initial VDD output delay
10
μs
(1)
tVDD
13
ms
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6.8 LDO Regulator, Wake-up, and Auto-Shutdown AC Characteristics (continued)
TA = –40°C to 85°C, typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Time delay from rising edge of
GPOUT (input) to nominal VDD
output
(1)
tWUVDD
Wake-up VDD output delay
8
ms
Time delay from rising edge of
REGIN to the Active state. Includes
firmware initialization time
tPUCD
Power-up communication delay
250
ms
(1) Specified by design. Not production tested.
6.9 ADC (Temperature and Cell Measurement) Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted) (Force Note1)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
VIN(BAT)
BAT pin voltage measurement range Voltage divider enabled
2.45
4.5
tADC_CONV Conversion time
Effective resolution
125
15
ms
bits
(1) Specified by design. Not tested in production.
6.10 Integrating ADC (Coulomb Counter) Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)(Force Note1)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VSR
Input voltage range from BAT to SRX
pins
BAT ± 25
mV
tSR_CONV
Conversion time
Single conversion
Single conversion
1
s
Effective Resolution
16
bits
(1) Specified by design. Not tested in production.
6.11 Integrated Sense Resistor Characteristics, -40°C to 85 °C
TA = –40°C to 85°C; typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted) (Force Note1)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(2)
SRXRES
Resistance of Integrated Sense
Resistor from SRX to VSS
TA = 30°C
7
mΩ
(1)
ISRX
Recommended Sense Resistor
input current.
Long term RMS, average device
utilization.
2000
mA
Peak RMS current, 10% device
3500
2500
4500
3500
utilization, –40°C to 70°C.(3)
Peak RMS current, 10% device
utilization, –40°C to 85°C.(3)
mA
mA
Peak pulsed current, 250 ms max, 1%
device utilization, –40°C to 70°C, (3)
Peak pulsed current, 250 ms max, 1%
device utilization,–40°C to 85°C.(3)
(1) Specified by design. Not tested in production.
(2) Firmware compensation applied for temperature coefficient of resistor.
(3) Device utilization is the long term usage profile at a specific condition compared to the average condition.
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6.12 I2C-Compatible Interface Communication Timing Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted) (Force Note1)(1)
MIN
NOM
MAX
UNIT
Standard Mode (100 kHz)
td(STA) Start to first falling edge of SCL
tw(L)
4
4.7
4
μs
μs
μs
μs
ns
SCL pulse duration (low)
SCL pulse duration (high)
Setup for repeated start
Data setup time
tw(H)
tsu(STA)
tsu(DAT)
th(DAT)
tsu(STOP)
t(BUF)
tf
4.7
250
0
Host drives SDA
Host drives SDA
Data hold time
ns
Setup time for stop
4
μs
μs
ns
Bus free time between stop and start Includes Command Waiting Time
SCL or SDA fall time(1)
66
300
300
100
tr
SCL or SDA rise time(1)
ns
fSCL
Clock frequency(2)
kHz
Fast Mode (400 kHz)
td(STA) Start to first falling edge of SCL
tw(L)
600
1300
600
600
100
0
ns
ns
SCL pulse duration (low)
SCL pulse duration (high)
Setup for repeated start
Data setup time
tw(H)
ns
tsu(STA)
tsu(DAT)
th(DAT)
tsu(STOP)
t(BUF)
tf
ns
Host drives SDA
Host drives SDA
ns
Data hold time
ns
Setup time for stop
600
66
ns
Bus free time between stop and start Includes Command Waiting Time
SCL or SDA fall time(1)
μs
ns
300
300
400
tr
SCL or SDA rise time(1)
ns
fSCL
Clock frequency(2)
kHz
(1) Specified by design. Not production tested.
(2) If the clock frequency (fSCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported
at 400 kHz. (See 节7.3.1.1 and 节7.3.1.3.)
t
t
t
t
t
f
t
r
(BUF)
SU(STA)
w(H)
w(L)
SCL
SDA
t
t
t
d(STA)
su(STOP)
f
t
r
t
t
su(DAT)
h(DAT)
REPEATED
START
STOP
START
图6-1. I2C-Compatible Interface Timing Diagrams
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6.13 SHUTDOWN and WAKE-UP Timing
tPUCD
tSHUP
tPUCD
tVDD
tSHDN
tWUVDD
REGIN
VDD
SHUTDOWN_
ENABLE
I2C Bus
SHUTDOWN
*
GPOUT
Off
WAKE-UP
Active
SHUTDOWN
WAKE-UP
Active
State
*
GPOUT is configured as an input for wake-up signaling.
图6-2. SHUTDOWN and WAKE-UP Timing Diagram
6.14 Typical Characteristics
0
10%
5%
-0.05%
-0.1%
0
-0.15%
-0.2%
-5%
-10%
-15%
-0.25%
-40
-20
0
20 40
Temperature (èC)
60
80
100
-40
-20
0
20
40
60
80
100
D001
Temperature (èC)
D002
图6-3. Voltage Accuracy Error
图6-4. Internal Temperature Accuracy Error
0.7%
0.6%
0.5%
0.4%
0.3%
0.2%
0.1%
0
-40
-20
0
20
40
60
80
100
Temperature (èC)
D003
图6-5. Current Accuracy Error
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7 Detailed Description
7.1 Overview
The BQ27427 fuel gauge accurately predicts the battery capacity and other operational characteristics of a
single Li-based rechargeable cell. It can be interrogated by a system processor to provide cell information, such
as state-of-charge (SOC).
备注
The following formatting conventions are used in this document:
Commands: italics with parentheses() and no breaking spaces, for example, Control().
Data flash: italics, bold, and breaking spaces, for example, Design Capacity.
Register bits and flags: italics with brackets [ ], for example, [TDA]
Data flash bits: italics, bold, and brackets [ ], for example, [LED1]
Modes and states: ALL CAPITALS, for example, UNSEALED mode
7.2 Functional Block Diagram
SRX
SCL
SDA
VSYS
2
I C
Coulomb
Counter
Integrated
Sense
Bus
Resistor
CPU
Battery Pack
GPOUT
BIN
PACKP
T
BAT
ADC
Li-Ion
Cell
Protection
IC
VDD
VSS
1 µF
2.2 µF
1.8 V
LDO
PACKN
NFET NFET
7.3 Feature Description
Information is accessed through a series of commands, called Standard Commands. Further capabilities are
provided by the additional Extended Commands set. Both sets of commands, indicated by the general format
Command), are used to read and write information contained within the control and status registers, as well as
its data locations. Commands are sent from system to gauge using the I2C serial communications engine, and
can be executed during application development, system manufacture, or end-equipment operation.
The key to the high-accuracy gas gauging prediction is Texas Instruments proprietary Impedance Track™
algorithm. This algorithm uses cell measurements, characteristics, and properties to create state-of-charge
predictions that can achieve high accuracy across a wide variety of operating conditions and over the lifetime of
the battery.
The fuel gauge measures the charging and discharging of the battery by monitoring the voltage across an
integrated small-value sense resistor. When a cell is attached to the fuel gauge, cell impedance is computed
based on cell current, cell open-circuit voltage (OCV), and cell voltage under loading conditions.
The fuel gauge uses an integrated temperature sensor for estimating cell temperature. Alternatively, the host
processor can provide temperature data for the fuel gauge.
For more details, see the BQ27427 Technical Reference Manual.
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7.3.1 Communications
7.3.1.1 I2C Interface
The fuel gauge supports the standard I2C read, incremental read, quick read, one-byte write, and incremental
write functions. The 7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as
1010101. The first 8 bits of the I2C protocol are, therefore, 0xAA or 0xAB for write or read, respectively.
Host generated
ADDR[6:0] 0 A
Gauge generated
S
CMD[7:0]
(a) 1-byte write
A
DATA [7:0]
A
P
S
ADDR[6:0]
1
A
DATA [7:0]
(b) quick read
DATA [7:0]
N P
S
ADDR[6:0] 0 A
CMD[7:0]
A
Sr
ADDR[6:0]
1
A
N P
(c) 1- byte read
S
ADDR[6:0] 0 A
CMD[7:0]
A
Sr
ADDR[6:0]
1
A
DATA [7:0]
A
A
. . .
DATA [7:0]
A . . . A P
N P
(d) incremental read
S
ADDR[6:0] 0 A
CMD[7:0]
A
DATA [7:0]
DATA [7:0]
(e) incremental write
(S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge , and P = Stop).
图7-1. I2C Interface
The quick read returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the fuel gauge or the
I2C primary. “Quick writes” function in the same manner and are a convenient means of sending multiple
bytes to consecutive command locations (such as two-byte commands that require two bytes of data).
The following command sequences are not supported:
图7-2. Attempt To Write a Read-only Address (NACK After Data Sent By Primary)
图7-3. Attempt To Read an Address Above 0x6B (NACK Command)
7.3.1.2 I2C Time Out
The I2C engine releases SDA and SCL if the I2C bus is held low for two seconds. If the fuel gauge is holding the
lines, releasing them frees them for the primary to drive the lines. If an external condition is holding either of the
lines low, the I2C engine enters the low-power SLEEP mode.
7.3.1.3 I2C Command Waiting Time
To ensure proper operation at 400 kHz, a t(BUF) ≥ 66 μs bus-free waiting time must be inserted between all
packets addressed to the fuel gauge. In addition, if the SCL clock frequency (fSCL) is > 100 kHz, use individual 1-
byte write commands for proper data flow control. The following diagram shows the standard waiting time
required between issuing the control subcommand the reading the status result. For read-write standard
command, a minimum of 2 seconds is required to get the result updated. For read-only standard commands,
there is no waiting time required, but the host must not issue any standard command more than two times per
second. Otherwise, the gauge could result in a reset issue due to the expiration of the watchdog timer.
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S
S
S
ADDR [6:0] 0 A
ADDR [6:0] 0 A
ADDR [6:0] 0 A
CMD [7:0]
CMD [7:0]
CMD [7:0]
A
A
A
DATA [7:0]
DATA [7:0]
ADDR [6:0]
A
A
P
P
66ms
66ms
Sr
1
A
DATA [7:0]
A
DATA [7:0]
N P
66ms
Waiting time inserted between two 1-byte write packets for a subcommand and reading results
(required for 100 kHz < fSCL £ 400 kHz)
S
S
ADDR [6:0] 0 A
ADDR [6:0] 0 A
CMD [7:0]
CMD [7:0]
A
A
DATA [7:0]
ADDR [6:0]
A
DATA [7:0]
DATA [7:0]
A
P
66ms
DATA [7:0]
Sr
1
A
A
N P
66ms
Waiting time inserted between incremental 2-byte write packet for a subcommand and reading results
(acceptable for fSCL £ 100 kHz)
S
ADDR [6:0] 0 A
DATA [7:0]
CMD [7:0]
DATA [7:0]
A
Sr
ADDR [6:0]
66ms
1
A
DATA [7:0]
A
DATA [7:0]
A
A
N P
Waiting time inserted after incremental read
图7-4. I2C Command Waiting Time
7.3.1.4 I2C Clock Stretching
A clock stretch can occur during all modes of fuel gauge operation. In SLEEP mode, a short ≤ 100-µs clock
stretch occurs on all I2C traffic as the device must wake-up to process the packet. In the other modes
(INITIALIZATION, NORMAL), a ≤ 4-ms clock stretching period may occur within packets addressed for the fuel
gauge as the I2C interface performs normal data flow control.
7.4 Device Functional Modes
To minimize power consumption, the fuel gauge has several power modes:
• INITIALIZATION
• NORMAL
• SLEEP
• and SHUTDOWN
The fuel gauge passes automatically between these modes, depending upon the occurrence of specific events,
though a system processor can initiate some of these modes directly. For more details, see the BQ27427
Technical Reference Manual.
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8 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The BQ27427 fuel gauge is a microcontroller peripheral that provides system-side fuel gauging for single-cell Li-
Ion batteries. Battery fuel gauging with the fuel gauge requires connections only to PACK+ and PACK– for a
removable battery pack or embedded battery circuit. To allow for optimal performance in the end application,
special considerations must be taken to ensure minimization of measurement error through proper printed circuit
board (PCB) board layout. Such requirements are detailed in 节8.2.1.
8.2 Typical Applications
The BQ27427 device can be used with a high-side current sense resistor (as shown in the schematic below).
Ext VCC
EXT_VCC
GND
TP4
EXT_VCC
J3
VDD
VDD
J4
R2
1.8 Meg
PGND
EXT_VCC
BIN
JP1
JP2
EXT_VCC
R3
5.1k
J2
R4 R5
10.0k 10.0k
GPOUT
GPOUT
J1
4
3
2
1
SDA
SDA
SCL
SCL
VSS
U1
VDD
TP5
C3
B3
BAT
VDD
VDD
C1
0.47 µF 2.2 µF
PGND
A3
A2
C1
C2
SCL
SDA
SRP
SRN
C3
Recommended to be connected
to a GPIO on the host.
A1
B1
GPOUT
BIN
GPOUT
BIN
B2
VSS
PGND PGND
Pack+
TP1
J6
Load+
TP2
Load+(Host)
Charger+
PGND
R1
0.01
Pack+
1
2
3
BIN
BIN
Pack-
J5
C2
1 µF
Load-
TP3
J7
Charger-
Load-(Host)
PGND
PGND
图8-1. Typical Application with High-Side Current Sense Resistor
8.2.1 Design Requirements
As shipped from the Texas Instruments factory, the BQ27427 fuel gauge comes with three preprogrammed
chemistry profiles and gauging parameters in ROM. Upon device reset, the contents of ROM are copied to
associated volatile RAM-based data memory blocks. For proper operation, all parameters in RAM-based data
memory require initialization. This can be done by updating data memory parameters in a lab/evaluation
situation or by downloading the parameters from a host. The BQ27427 Technical Reference Manual shows the
default and typically expected values appropriate for most applications.
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8.2.2 Detailed Design Procedure
8.2.2.1 BAT Voltage Sense Input
A ceramic capacitor at the input to the BAT pin is used to bypass AC voltage ripple to ground, greatly reducing
its influence on battery voltage measurements. It proves most effective in applications with load profiles that
exhibit high-frequency current pulses (that is, cell phones) but is recommended for use in all applications to
reduce noise on this sensitive high-impedance measurement node.
8.2.2.2 Integrated LDO Capacitor
The fuel gauge has an integrated LDO with an output on the VDD pin of approximately 1.8 V. A capacitor of value
at least 2.2 μF should be connected between the VDD pin and VSS. The capacitor must be placed close to the
gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be used to provide power
for other devices in the system.
8.2.3 External Thermistor Support
The fuel gauge temperature sensing circuitry is designed to work with a negative temperature coefficient-type
(NTC) thermistor with a characteristic 10-kΩ resistance at room temperature (25°C). The default curve-fitting
coefficients configured in the fuel gauge specifically assume a Semitec 103AT type thermistor profile and so that
is the default recommendation for thermistor selection purposes. Moving to a separate thermistor resistance
profile (for example, JT-2 or others) requires an update to the default thermistor coefficients which can be
modified in RAM to ensure highest accuracy temperature measurement performance.
8.2.4 Application Curves
0
-0.05%
-0.1%
10%
5%
0
-0.15%
-0.2%
-5%
-10%
-15%
-0.25%
-40
-20
0
20 40
Temperature (èC)
60
80
100
-40
-20
0
20
40
60
80
100
D001
Temperature (èC)
D002
图8-2. Voltage Accuracy Error
图8-3. Internal Temperature Accuracy Error
0.7%
0.6%
0.5%
0.4%
0.3%
0.2%
0.1%
0
-40
-20
0
20
40
60
80
100
Temperature (èC)
D003
图8-4. Current Accuracy Error
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9 Power Supply Recommendation
9.1 Power Supply Decoupling
The battery connection on the BAT pin is used for two purposes:
• To supply power to the fuel gauge
• To provide an input for voltage measurement of the battery.
A capacitor of value of at least 1 µF should be connected between BAT and VSS. The capacitor should be placed
close to the gauge IC and have short traces to both the BAT pin and VSS
.
The fuel gauge has an integrated LDO with an output on the VDD pin of approximately 1.8 V. A capacitor of value
at least 0.47 µF should be connected between the VDD pin and VSS. The capacitor should be placed close to the
gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be used to provide power
for other devices in the system.
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10 Layout
10.1 Layout Guidelines
• A capacitor of a value of at least 2.2 µF is connected between the VDD pin and VSS. The capacitor should be
placed close to the gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be
used to provide power for other devices in the system.
• It is required to have a capacitor of at least 1.0 µF connect between the BAT pin and VSS if the connection
between the battery pack and the gauge BAT pin has the potential to pick up noise. The capacitor should be
placed close to the gauge IC and have short traces to both the VDD pin and VSS
.
• If the external pullup resistors on the SCL and SDA lines will be disconnected from the host during low-power
operation, it is recommended to use external 1-MΩpulldown resistors to VSS to avoid floating inputs to the
I2C engine.
• The value of the SCL and SDA pullup resistors should take into consideration the pullup voltage and the bus
capacitance. Some recommended values, assuming a bus capacitance of 10 pF, can be seen in 表10-1.
表10-1. Recommended Values for SCL and SDA Pullup Resistors
VPU
1.8 V
3.3 V
Range
400 Ω≤RPU ≤37.6 kΩ
Typical
Range
900 Ω≤RPU ≤29.2 kΩ
Typical
RPU
10 kΩ
5.1 kΩ
• If the host is not using the GPOUT functionality, then it is recommended that GPOUT be connected to a
GPIO of the host so that in cases where the device is in SHUTDOWN, toggling GPOUT can wake the gauge
up from the SHUTDOWN state.
• If the battery pack thermistor is not connected to the BIN pin, the BIN pin should be pulled down to VSS with a
10-kΩresistor.
• The BIN pin should not be shorted directly to VDD or VSS
• The actual device ground is pin 3 (VSS).
.
• Kelvin connects the BAT pin to the battery PACKP terminal.
10.2 Layout Example
图10-1. BQ27427 Board Layout
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此
类产品或服务单独或与任何TI 产品或服务一起的表示或认可。
11.1.2 Related Documentation
• BQ27427 Technical Reference Manual
• Single Cell Gas Gauge Circuit Design
• Single Cell Impedance Track Printed-Circuit Board Layout Guide
• ESD and RF Mitigation in Handheld Battery Electronics
11.2 Trademarks
Impedance Track™ and NanoFree™ are trademarks of Texas Instruments.
所有商标均为其各自所有者的财产。
11.3 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.4 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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21-Dec-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
BQ27427YZFR
ACTIVE
DSBGA
YZF
9
3000 RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
BQ27427
Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Dec-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ27427YZFR
DSBGA
YZF
9
3000
180.0
8.4
1.78
1.78
0.69
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
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22-Dec-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
DSBGA YZF
SPQ
Length (mm) Width (mm) Height (mm)
182.0 182.0 20.0
BQ27427YZFR
9
3000
Pack Materials-Page 2
PACKAGE OUTLINE
YZF0009
DSBGA - 0.625 mm max height
SCALE 8.000
DIE SIZE BALL GRID ARRAY
A
B
E
BALL A1
CORNER
D
C
0.625 MAX
SEATING PLANE
0.05 C
BALL TYP
0.35
0.15
1 TYP
SYMM
C
1
TYP
SYMM
B
A
D: Max = 1.651 mm, Min = 1.59 mm
E: Max = 1.61 mm, Min = 1.55 mm
0.5
TYP
3
1
2
0.35
0.25
9X
0.015
0.5 TYP
C A B
4219558/A 10/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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EXAMPLE BOARD LAYOUT
YZF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
9X ( 0.245)
(0.5) TYP
1
2
3
A
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 40X
0.05 MIN
0.05 MAX
METAL UNDER
SOLDER MASK
(
0.245)
METAL
(
0.245)
EXPOSED
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4219558/A 10/2018
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YZF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
(R0.05) TYP
3
9X ( 0.25)
1
2
A
B
(0.5) TYP
SYMM
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE: 40X
4219558/A 10/2018
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
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