BUF07704 [TI]
6 通道 LCD 伽玛校正缓冲器 +1 Vcom;
| 型号： | BUF07704 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 6 通道 LCD 伽玛校正缓冲器 +1 Vcom CD |
| 文件： | 总38页 (文件大小：1976K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BUF05704, BUF06704
BUF07704, BUF11704
SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
18-V SUPPLY MULTI-CHANNEL GAMMA
CORRECTION BUFFER
FD EATURES
DESCRIPTION
The BUFxx704 are a series of multi-channel buffers
targeted towards gamma correction in high-resolution
LCD panels. They are pin-compatible with the existing
BUFxx702 and BUFxx703 families and operate at
higher supply voltages up to 18 V (19 V absolute max).
The higher supply voltage enables faster response
times and brighter images in large-screen LCD panels.
This is especially important in LCD TV applications.
Wide Supply Range: 4.5 V to 18 V
D
D
D
Gamma Correction Channels: 10, 6, and 4
Integrated V
Buffer
COM
Excellent Output Current Drive:
− Gamma Channels:
(1)
> 30 mA at 0.5 V Swing to Rails
− V
:
COM
(1)
> 100 mA typ at 2 V Swing to Rails
The number of gamma correction channels required
depends on a variety of factors and differs greatly from
design to design. Therefore, 10, 6, and 4 channel
options are offered. For additional space and cost
D
D
D
D
D
Large Capacitive Load Drive Capability
Rail-to-Rail Output
PowerPAD Package
Low-Power/Channel: < 500 µA
High ESD Rating: 8 kV HBM, 2 kV CDM,
300 V MM
savings, a V
channel with > 100mA drive capability
COM
is integrated into the BUF11704, BUF07704, and
BUF05704.
The BUF11704, BUF07704, BUF06704, and
BUF05704 are available in the TSSOP-28, TSSOP-20,
TSSOP-16, and TSSOP-14 PowerPAD packages for
dramatically increased power dissipation capability.
This way, a large number of channels can be handled
safely in one package.
D
Specified for −25°C to +85°C
See Typical Characteristic curves for details.
(1)
VDD
Source Driver
Gamma 1
BUFxx704
A flow-through pinout has been adopted to allow simple
PCB routing and maintain the cost-effectiveness of this
solution. All inputs and outputs of the BUFxx704
incorporate internal ESD protection circuits that prevent
functional failures at voltages up to 8 kV (HBM), 2 kV
(CDM), and 300 V (MM).
Gamma 2
Gamma 3
GAMMA
CHANNELS
MODEL
V
COM
CHANNELS
BUF11704
BUF07704
BUF06704
BUF05704
10
6
1
1
0
1
−
Gamma (n 2)
6
−
Gamma (n 1)
4
Gamma (n)
VCOM
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Incorporated. All other trademarks are the property of their respective owners.
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆꢇ ꢂꢈ ꢃ ꢉꢆꢉ ꢊꢋ ꢌꢍ ꢎ ꢏꢐ ꢑꢊꢍꢋ ꢊꢒ ꢓꢔ ꢎ ꢎ ꢕꢋꢑ ꢐꢒ ꢍꢌ ꢖꢔꢗ ꢘꢊꢓ ꢐꢑꢊ ꢍꢋ ꢙꢐ ꢑꢕꢚ ꢀꢎ ꢍꢙꢔ ꢓꢑꢒ
ꢓ ꢍꢋ ꢌꢍꢎ ꢏ ꢑꢍ ꢒ ꢖꢕ ꢓ ꢊ ꢌꢊ ꢓ ꢐ ꢑꢊ ꢍꢋꢒ ꢖ ꢕꢎ ꢑꢛꢕ ꢑꢕ ꢎ ꢏꢒ ꢍꢌ ꢆꢕꢜ ꢐꢒ ꢇꢋꢒ ꢑꢎ ꢔꢏ ꢕꢋꢑ ꢒ ꢒꢑ ꢐꢋꢙ ꢐꢎ ꢙ ꢝ ꢐꢎ ꢎ ꢐ ꢋꢑꢞꢚ
ꢀꢎ ꢍ ꢙꢔꢓ ꢑ ꢊꢍ ꢋ ꢖꢎ ꢍ ꢓ ꢕ ꢒ ꢒ ꢊꢋ ꢟ ꢙꢍ ꢕ ꢒ ꢋꢍꢑ ꢋꢕ ꢓꢕ ꢒꢒ ꢐꢎ ꢊꢘ ꢞ ꢊꢋꢓ ꢘꢔꢙ ꢕ ꢑꢕ ꢒꢑꢊ ꢋꢟ ꢍꢌ ꢐꢘ ꢘ ꢖꢐ ꢎ ꢐꢏ ꢕꢑꢕ ꢎ ꢒꢚ
Copyright 2004−2007, Texas Instruments Incorporated
www.ti.com
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ꢠ ꢄꢡꢢ ꢤ ꢤ ꢢ ꢥꢦ ꢠ ꢄꢡ ꢨꢨ ꢤ ꢢꢥ
www.ti.com
SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
(1)
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range unless otherwise noted
PARAMETERS
BUFxx704
UNIT
(2)
DD
Supply Voltage, V
Input Voltage Range, V
19
V
V
I
DD
See Dissipation Rating Table
Continuous Total Power Dissipation
Operating Free-Air Temperature Range, T
−25 to 85
125
°C
°C
°C
°C
A
Maximum Junction Temperature, T
J
Storage Temperature Range, T
−65 to 150
260
STG
Lead Temperature 1.6mm (1/16 inch) from Case for 10s
ESD Rating:
Human Body Model (HBM)
Charged-Device Model (CDM)
Machine Model (MM)
8
2
kV
kV
V
300
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to GND.
(2)
(1)
ORDERING INFORMATION
PRODUCT
BUF05704
BUF06704
BUF07704
BUF11704
PACKAGE-LEAD
TSSOP-14
PACKAGE MARKING
BUF05704
TSSOP-16
BUF06704
TSSOP-20
BUF07704
TSSOP-28
BUF11704
(1)
For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
DISSIPATION RATING TABLE
(1)
JC
(1)
JA
PACKAGE
DESIGNATOR
θ
q
T ≤ 25°C
A
POWER RATING
PACKAGE TYPE
(°C/W)
(°C/W)
TSSOP-28
TSSOP-20
TSSOP-16
TSSOP-14
PWP (28)
0.72
27.9
3.58 W
PWP (20)
1.40
32.63
36.51
37.47
3.06 W
PWP (16)
2.07
2.74
PWP (14)
2.07
2.67
(1)
PowerPAD attached to PCB, 0 lfm airflow, and 76mm x 76mm copper area.
RECOMMENDED OPERATING CONDITIONS
MIN
7
NOM
MAX UNIT
Supply Voltage, V
DD
18
V
Operating Free-Air Temperature, T
−25
+85
°C
A
2
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
EQUIVALENT SCHEMATICS OF INPUTS AND OUTPUTS
INPUT STAGE OF BUFFERS
BUF11704: 1 to 5 and VCOM
BUF07704: 1 to 3 and VCOM
BUF06704: 1 to 3
INPUT STAGE OF BUFFERS
BUF11704: 6 to 10
BUF07704: 4 to 6
OUTPUT STAGE OF ALL BUFFERS
BUF06704: 4 to 6
BUF05704: 1 to 2 and VCOM
BUF05704: 3 to 4
VS
VS
VS
Previous
Stage
Next Stage
Inverting
Buffer
Input
Buffer
Output
Input
Next Stage
Buffer
Buffer
Input
Buffer
Output
Output
Next Stage
Next Stage
Previous
Stage
GND
GND
GND
Internal to BUF11704
Internal to BUF11704
ELECTRICAL CHARACTERISTICS: BUFxx704
Over operating free-air temperature range, V
= 18 V, T = 25°C, unless otherwise noted.
DD
A
PARAMETER
TEST CONDITIONS
T
MIN
TYP
−1
MAX
20
UNIT
A
25°C
Full range
25°C
Gamma buffers
(1)
(1)
(1)
(1)
20
V
IO
Input offset voltage
Input bias current
V = 9V
mV
I
−1
30
V
COM
Full range
25°C
30
1
200
80
I
IB
V = V /2
pA
I
DD
Full range
25°C
62
60
PSRR
Power-Supply Rejection Ratio
Buffer gain
V
= 4.5 V to 19 V
dB
V/V
MHz
DD
Full range
25°C
V = 5 V
0.9995
I
Gamma buffers
buffer
C
L
= 100 pF, R = 2 kΩ
1
0.6
L
BW_3dB
SR
3dB bandwidth
25°C
V
COM
Gamma buffers
buffer
C
= 100 pF, R = 2 kΩ
1.6
4.6
L
L
Slew rate
Crosstalk
25°C
25°C
V/µs
V
COM
V
V
= 2 V to 16 V
IN
= 6 V, f = 1 kHz
85
dB
IP−P
(1)
Full range is −25°C to 85°C.
3
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
ELECTRICAL CHARACTERISTICS: BUF11704
Over operating free-air temperature range, V
= 18 V, T = 25°C, unless otherwise noted.
DD
A
(1)
PARAMETER
TEST CONDITIONS
T
MIN
TYP
MAX
9.0
UNIT
A
25°C
5
V
O
= V /2
DD
No Load
I
Supply current
ALL
mA
DD
Full range
9.0
Buffers 1-5
1
V
DD
− 1
Buffers 6-10
GND
1
V
Common-mode input range
25°C
V
DD
V
V
buffer
COM
COM
DD
5
25°C
Full range
25°C
1
1
1
1
I
V
= 1 mA to 100 mA,
= 2 V
O
IN
V
buffer sinking
5
5
5
5
5
5
5
I
V
= −1 mA to −100 mA
= 16 V
O
V
COM
buffer sourcing
Full range
25°C
IN
Load regulation
mV/mA
I
V
= 1 mA to 10 mA
= 1 V
O
Buffers 1-10 sinking
Full range
25°C
IN
I
V
= −1 mA to −10 mA
= 17 V
O
Buffers 1-10 sourcing
Buffers 1-5
Full range
IN
V
= 18 V
IN
V
V
25°C
25°C
17.85
16.85
0.85
17.9
17
17
1.0
1.0
0
V
V
OH1-5
I
= 10 mA
SOURCE
V
I
= 17 V
= 10 mA
High-level output
voltage
IN
17.15
1.15
SINK
Buffers 6-10
OH6-10
V
= 17 V
IN
I
= 10 mA
SOURCE
V
= 1 V
= 10 mA
IN
I
SINK
V
V
V
Buffers 1-5
25°C
25°C
25°C
V
V
V
OL1-5
V
I
= 1 V
Low-level output
voltage
IN
= 10 mA
SOURCE
V
= 0 V
= 10 mA
IN
Buffers 6-10
0.15
OL6-10
OHCOM
I
SINK
V
= 16 V
= 100 mA
IN
16
16
2
16.15
I
SINK
High-level output
voltage
V
buffer
buffer
COM
COM
V
= 16 V
IN
15.85
1.85
I
= 100 mA
SOURCE
V
= 2 V
= 100 mA
IN
2.15
I
SINK
Low-level output
voltage
V
V
25°C
V
OLCOM
V
= 2 V
IN
2
I
= 100 mA
SOURCE
(1)
Full range is −25°C to 85°C.
4
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
ELECTRICAL CHARACTERISTICS: BUF07704
Over operating free-air temperature range, V
= 18 V, T = 25°C, unless otherwise noted.
DD
A
(1)
PARAMETER
TEST CONDITIONS
T
MIN
TYP
MAX
7.5
UNIT
A
25°C
5
V
O
= V /2
DD
No Load
I
Supply current
ALL
mA
DD
Full range
7.5
Buffers 1-3
Buffers 4-6
1
V
DD
− 1
GND
1
V
Common-mode input range
25°C
V
DD
V
V
buffer
COM
COM
DD
5
25°C
Full range
25°C
1
1
1
1
I
V
= 1 mA to 100 mA
= 2 V
O
IN
V
buffer sinking
5
5
5
5
5
5
5
I
V
= −1 mA to −100 mA
= 16 V
O
V
COM
buffer sourcing
Full range
25°C
IN
Load regulation
mV/mA
I
V
= 1 mA to 10 mA
= 1 V
O
Buffers 1-6 sinking
Full range
25°C
IN
I
V
= −1 mA to −10 mA
= 17 V
O
Buffers 1-6 sourcing
Buffers 1-3
Full range
IN
V
= 18 V
IN
V
V
25°C
25°C
17.85
16.85
0.85
17.9
17
17
1.0
1.0
0
V
V
OH1-3
I
= 10 mA
SOURCE
V
I
= 17 V
= 10 mA
High-level output
voltage
IN
17.15
1.15
SINK
Buffers 4-6
OH4-6
V
= 17 V
IN
I
= 10 mA
SOURCE
V
= 1 V
= 10 mA
IN
I
SINK
V
V
V
Buffers 1-3
Buffers 4-6
25°C
25°C
25°C
V
V
V
OL1-3
V
I
= 1 V
Low-level output
voltage
IN
= 10 mA
SOURCE
V
= 0 V
= 10 mA
IN
0.15
OL4-6
I
SINK
V
= 16 V
= 100 mA
IN
16
16
2
16.15
I
SINK
High-level output
voltage
V
buffer
buffer
OHCOM
COM
COM
V
= 16 V
IN
15.85
1.85
I
= 100 mA
SOURCE
V
= 2 V
= 100 mA
IN
2.15
I
SINK
Low-level output
voltage
V
V
25°C
V
OLCOM
V
= 2 V
IN
2
I
= 100 mA
SOURCE
(1)
Full range is −25°C to 85°C.
5
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
ELECTRICAL CHARACTERISTICS: BUF06704
Over operating free-air temperature range, V
= 18 V, T = 25°C, unless otherwise noted.
DD
A
(1)
PARAMETER
TEST CONDITIONS
T
A
MIN
TYP
MAX
7.5
UNIT
25°C
5
V
= V /2
DD
No Load
O
I
Supply current
ALL
mA
V
DD
Full range
7.5
Buffers 1-3
Buffers 4-6
1
V
DD
Common-mode input range
Load regulation
25°C
GND
V
DD
− 1
25°C
Full range
25°C
1
1
5
5
5
5
I
V
= 1 mA to 10 mA
= 1 V
O
IN
Buffers 1-6 sinking
mV/mA
I
V
= −1 mA to −10 mA
= 17 V
O
IN
Buffers 1-6 sourcing
Buffers 1-3
Full range
V
= 18 V
SOURCE
IN
V
V
25°C
25°C
17.85
16.85
0.85
17.9
17
V
V
OH1-3
I
= 10 mA
V
IN
I
= 17 V
High-level output
voltage
17.15
1.15
0.15
= 10 mA
SINK
Buffers 4-6
OH4-6
V
= 17 V
SOURCE
IN
17
I
= 10 mA
V
= 1 V
IN
1.0
1.0
0
I
= 10 mA
SINK
V
V
Buffers 1-3
Buffers 4-6
25°C
25°C
V
V
OL1-3
V
IN
I
= 1 V
SOURCE
Low-level output
voltage
= 10 mA
V
= 0 V
IN
OL4-6
I
= 10 mA
SINK
(1)
Full range is −25°C to 85°C.
6
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www.ti.com
SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
ELECTRICAL CHARACTERISTICS: BUF05704
Over operating free-air temperature range, V
= 18 V, T = 25°C, unless otherwise noted.
DD
A
(1)
PARAMETER
TEST CONDITIONS
T
MIN
TYP
MAX
7.5
UNIT
A
25°C
5
V
O
= V /2
DD
No Load
I
Supply current
ALL
mA
DD
Full range
7.5
Buffers 1-2
Buffers 3-4
1
V
DD
− 1
GND
1
V
Common-mode input range
25°C
V
DD
V
V
buffer
COM
COM
DD
5
25°C
Full range
25°C
1
1
1
1
I
V
= 1 mA to 100 mA
= 2 V
O
IN
V
buffer sinking
5
5
5
5
5
5
5
I
V
= −1 mA to −100 mA
= 16 V
O
V
COM
buffer sourcing
Full range
25°C
IN
Load regulation
mV/mA
I
V
= 1 mA to 10 mA
= 1 V
O
Buffers 1-4 sinking
Full range
25°C
IN
I
V
= −1 mA to −10 mA
= 17 V
O
Buffers 1-4 sourcing
Buffers 1-2
Full range
IN
V
= 18 V
IN
V
V
25°C
25°C
17.85
16.85
0.85
17.9
17
17
1.0
1.0
0
V
V
OH1-3
I
= 10 mA
SOURCE
V
I
= 17 V
= 10 mA
High-level output
voltage
IN
17.15
1.15
SINK
Buffers 3-4
OH4-6
V
= 17 V
IN
I
= 10 mA
SOURCE
V
= 1 V
= 10 mA
IN
I
SINK
V
V
V
Buffers 1-2
Buffers 3-4
25°C
25°C
25°C
V
V
V
OL1-3
V
I
= 1 V
Low-level output
voltage
IN
= 10 mA
SOURCE
V
= 0 V
= 10 mA
IN
0.15
OL4-6
I
SINK
V
= 16 V
= 100 mA
IN
16
16
2
16.15
I
SINK
High-level output
voltage
V
buffer
buffer
OHCOM
COM
COM
V
= 16 V
IN
15.85
1.85
I
= 100 mA
SOURCE
V
= 2 V
= 100 mA
IN
2.15
I
SINK
Low-level output
voltage
V
V
25°C
V
OLCOM
V
= 2 V
IN
2
I
= 100 mA
SOURCE
(1)
Full range is −25°C to 85°C.
7
ꢠꢄ ꢡ ꢢ ꢣꢤ ꢢ ꢥ ꢦ ꢠ ꢄꢡ ꢢ ꢧꢤ ꢢ ꢥ
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
BUF11704 Pin Configuration
BUF07704 Pin Configuration
BUF11704
VDD
NC
1
2
3
4
5
6
7
8
9
28 VDD
27 NC
BUF07704
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
26 IN1(1)
25 IN2(1)
24 IN3(1)
23 IN4(1)
22 IN5(1)
21 IN6(1)
20 IN7(1)
19 IN8(1)
18 IN9(1)
17 IN10(1)
16 INCOM(1)
15 GND
VDD
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
NC
1
2
3
4
5
6
7
8
9
20 VDD
19 IN1(1)
18 IN2(1)
17 IN3(1)
16 IN4(1)
15 IN5(1)
14 IN6(1)
13 NC
TSSOP−28
PowerPAD
TSSOP−20
PowerPAD
OUT8 10
OUT9 11
OUTCOM
12 INCOM(1)
11 GND
OUT10 12
OUTCOM 13
GND 14
GND 10
NC = No Internal Connection
NC = No Internal Connection
(1) Connecting a capacitor to this node is not recommended.
(1) Connecting a capacitor to this node is not recommended.
BUF06704 Pin Configuration
BUF05704 Pin Configuration
BUF06704
BUF05704
VDD
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
GND
1
2
3
4
5
6
7
8
16 VDD
VDD
OUT1
1
2
3
4
5
6
7
14 VDD
15 IN1(1)
14 IN2(1)
13 IN3(1)
12 IN4(1)
11 IN5(1)
10 IN6(1)
13 IN1(1)
12 IN2(1)
11 IN3(1)
10 IN4(1)
OUT2
TSSOP−14
PowerPAD
TSSOP−16
PowerPAD
OUT3
OUT4
OUTCOM
GND
9
8
INCOM(1)
GND
9
GND
(1) Connecting a capacitor to this node is not recommended.
(1) Connecting a capacitor to this node is not recommended.
8
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
TYPICAL CHARACTERISTICS
DC CURVES
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
VS = 18 V
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
20
20
15
10
5
VS = 18 V
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
15
10
5
0
0
−
−
5
5
−
−
−
−
−
−
10
15
20
10
15
20
0
3
6
9
12
15
18
0
3
6
9
12
15
18
−
−
−
−
VIN Input Voltage
V
VIN Input Voltage V
Figure 1
Figure 2
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
INPUT BIAS CURRENT vs FREE−AIR TEMPERATURE
20
15
10
5
250
200
150
100
50
Channels VCOM
VS = 18 V
0
−
5
−
−
−
10
15
20
0
0
10
20
30
40
50
60
70
80 85
0
3
6
9
12
15
18
−
− _
−
−
TA Free−Air Temperature
C
VIN Input Voltage
V
Figure 3
Figure 4
BLANK SPACE
OUTPUT VOLTAGE vs OUTPUT CURRENT
HIGH−LEVEL OUTPUT VOLTAGE vs
HIGH−LEVEL OUTPUT CURRENT
18
16
14
12
10
8
18.0
17.9
17.8
17.7
17.6
17.5
17.4
17.3
17.2
17.1
17.0
−
_
TA
=
10 C
_
25 C
−
_
10 C
VDD = 18 V
_
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
TA = 25 C
_
85 C
_
25 C
VDD = 18 V
6
_
TA = 85 C
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
4
2
−
_
10 C
0
0
10
20
30
40
50
60
70
80
90 100
0
5
10
15
20
25
30
35
40
45
50
−
−
−
−
IO Output Current mA
IOH High−Level Output Current mA
Figure 5
Figure 6
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
TYPICAL CHARACTERISTICS
DC CURVES (continued)
BLANK SPACE
LOW−LEVEL OUTPUT VOLTAGE vs
OUTPUT VOLTAGE vs OUTPUT CURRENT
LOW−LEVEL OUTPUT CURRENT (Detailed View)
18
16
14
12
10
8
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
_
85 C
−
_
10 C
VSUPPLY = 18 V
6
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
_
25 C
_
25 C
4
_
85 C
−
_
10 C
2
0
0
10
20
30
40
50
60
70
80
90 100
0
10
20
30
40
50
−
−
−
−
IO Output Current mA
IOL Low−Level Output Current mA
Figure 7
Figure 8
OUTPUT VOLTAGE vs OUTPUT CURRENT
SUPPLY CURRENT vs SUPPLY VOLTAGE
6
5
4
3
2
1
0
18
16
14
12
10
8
VSUPPLY = 18 V
VCOM Buffer
_
_
−
_
85 C 25 C
10 C
6
4
2
0
0
2
4
6
8
10
12
14
16
18
20
0
25
50
75 100 125 150 175 200 225 250
−
V
−
−
Supply Voltage
IO Output Current mA
Figure 9
Figure 10
SUPPLY CURRENT vs FREE−AIR TEMPERATURE
VS = 18 V
INPUT BIAS CURRENT vs INPUT VOLTAGE
6
5
4
3
2
1
0
5
4
3
2
1
0
−
−
−
−
−
1
2
3
4
5
−
−
25
50
0
25
50
75
100
125
0
2
4
6
8
10
12
14
16
18
20
−
− _
TA Free−Air Temperature
C
−
−
V
VIN Input Voltage
Figure 11
Figure 12
10
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
TYPICAL CHARACTERISTICS
AC CURVES
POWER−SUPPLY REJECTION RATIO vs FREQUENCY
CROSSTALK vs FREQUENCY
0
20
VDD = 10 V
RL = 2 k
CL = 100 pF
80
70
60
50
40
30
20
10
VSUPPLY = 10 V
VIN = 1 VPP
40
60
Gamma Channels
80
VCOM Buffer
100
120
140
0
10
100
1 k
10 k
100 k
1 M
10 M
10
100
1 k
10 k
100 k
1 M
−
−
− −
Frequency Hz
f
Frequency Hz
f
Figure 13
Figure 14
11
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
TYPICAL CHARACTERISTICS
SMALL- AND LARGE-SIGNAL WAVEFORM CURVES
SMALL−SIGNAL WAVEFORM
SMALL−SIGNAL WAVEFORM
Ω
RLOAD = 2 k
Ω
RLOAD = 2 k
CLOAD = 100 pF
CLOAD = 100 pF
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
−
−
− −
Time 500 ns/div
t
Time 500 ns/div
t
Figure 15
Figure 16
LARGE−SIGNAL WAVEFORM
SMALL−SIGNAL WAVEFORM VCOM BUFFER
Ω
LOAD = 100 pF
VDD = 15 V
RLOAD = 2 k
Ω
RLOAD = 2 k
C
CLOAD = 100 pF
VCOM Buffer
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
−
−
µ
4 s/div
t
Time
−
−
Time 500 ns/div
t
Figure 17
Figure 18
LARGE−SIGNAL WAVEFORM
LARGE−SIGNAL WAVEFORM VCOM BUFFER
Ω
RLOAD = 2 k
Ω
RLOAD = 2 k
CLOAD = 100 pF
CLOAD = 100 pF
VCOM Buffer
VDD = 15 V
VDD = 15 V
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
−
−
µ
4 s/div
t
Time
−
−
µ
4 s/div
t
Time
Figure 19
Figure 20
12
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
Gamma correction voltages are often generated using
a simple resistor ladder, as shown in Figure 21. The
BUFxx704 buffers the various nodes on the gamma
correction resistor ladder. The low output impedance of
the BUFxx704 forces the external gamma correction
voltage on the respective reference node of the LCD
source driver. Figure 21 shows an example of the
BUFxx704 in a typical block diagram driving an LCD
source driver with 10- or 6-channel gamma correction
reference inputs.
APPLICATION INFORMATION
The requirements on the number of gamma correction
channels vary greatly from panel to panel. Therefore,
the BUFxx704 series of gamma correction buffers offer
different channel combinations. The BUF11704 offers
10 gamma channels plus one V
channel, whereas
COM
the BUF07704 provides six gamma channels plus one
V
. The V
channel on both models can be used
node on the LCD panel.
COM
COM
COM
to drive the V
VDD
Source Driver
BUFxx704
(1)
RS
Gamma 1
(2)
(1)
Gamma 2
(2)
(1)
Gamma 3
(2)
(1)
−
Gamma (n 2)
(2)
(1)
−
Gamma (n 1)
(2)
(1)
Gamma (n)(3)
(2)
VCOM
(1) Optional Increases stability.
(2) Optional capacitor.
(3) n = max number of gamma channels
on respective BUFxx704.
Figure 21. LCD Source Driver Typical Block Diagram
13
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
this architecture, the correct buffer needs to be
connected to the correct gamma correction voltage.
ESD RATINGS
The BUFxx704 has excellent ESD performance: 8 kV
HBM; 2 kV CDM; and 300 V MM. These ESD ratings
allow for increased manufacturability, fewer production
failures, and higher reliability.
Connect buffer 1 to the gamma voltage closest to V
,
DD
and buffers 2 through 5 to the following voltages. Buffer
10 should be connected to the gamma correction
voltage closest to GND (or the negative rail), and
buffers 9 through 6 to the following higher voltages.
INPUT VOLTAGE RANGE GAMMA BUFFERS
Figure 22 shows a typical gamma correction curve with
10 gamma correction reference points (GMA1 through
GMA10). As can be seen from this curve, the voltage
requirements for each buffer vary greatly. The swing
capability of the input stages of the various buffers is
carefully matched to the application. Using the example
of the BUF11704 with 10 gamma correction channels,
COMMON BUFFER (V
)
COM
The common buffer output of the BUFxx704 has a
greater output drive capability than the gamma buffers
to meet the heavier current demands of driving the
common node of the LCD panel. The common buffer
output was also designed to drive heavier capacitive
loads. Excellent output swing is possible with high
currents ( > 100 mA), as shown in Figure 23.
buffers 1 to 5 have input stages that include V , but will
DD
only swing within 1 V to GND. Buffers 1 through 5 have
only a single NMOS input stage. Buffers 6 through 10
have only a single PMOS input stage. The input range
of the PMOS input stage includes GND.
OUTPUT VOLTAGE vs OUTPUT CURRENT
18
17
16
15
14
13
12
11
V
DD1
GMA1
VDD = 18 V
_
TA = 25 C
GMA2
7
6
5
4
3
2
1
0
GMA3
GMA4
GMA5
GMA6
GMA7
GMA8
GMA9
0
25
50
75 100 125 150 175 200 225 250
−
Output Current mA
GMA10
V
SS1
0
10
20
30
40
Figure 23. V
Output Drive Capability
COM
Input Data (Hex)
CAPACITIVE LOAD DRIVE
Figure 22. Gamma Correction Curve
The BUFxx704 has been designed to be able to
sink/source large dc currents. Its output stage has been
designed to deliver output current transients with little
disturbance of the output voltage. However, there are
times when very fast current pulses are required.
Therefore, in LCD source driver buffer applications, it is
quite normal for capacitors to be placed at the outputs
of the reference buffers. These capacitors improve the
transient load regulation and will typically vary from
100 pF and more. The BUFxx704 gamma buffers were
designed to drive capacitances in excess of 100 pF. The
output is able to swing within 150 mV of the rails on 10
mA of output current; see Figure 24.
OUTPUT VOLTAGE SWING GAMMA BUFFERS
The output stages have been designed to match the
characteristic of the input stage. Once again, using the
example of the BUF11704, this means that the output
stage of buffers 1 to 5 swing very close to V , typically
DD
V
− 100 mV at 10 mA; its ability to swing to GND is
CC
limited. Buffers 6 through 10 swing closer to GND than
. Buffers 6 to 10 are designed to swing very close
V
DD
to GND; typically, GND + 100 mV at a 10 mA load
current. See the Typical Characteristics for more
details. This approach significantly reduces the silicon
area and cost of the whole solution. However, due to
14
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
MULTIPLE V
CHANNELS
OUTPUT VOLTAGE vs OUTPUT CURRENT
DD = 18 V
COM
18.0
In some LCD panels, more than one V
required for best panel performance. Figure 26 uses
three BUF07704s to create a total of 18 gamma-correc-
driver is
V
COM
17.8
17.6
17.4
17.2
17.0
_
TA = 25 C
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
tion and three V
channels. This solution saves
COM
considerable space and cost over the more convention-
al approach of using five or six quad-channel buffers or
op amps.
1.0
0.8
0.6
0.4
0.2
0
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
BUF07704
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
GMA1
0
5
10
15
20
25
30
35
40
45 50
2
−
Output Current mA
3
4
Figure 24. Gamma Buffer Drive Capability
5
APPLICATIONS WITH >10 GAMMA CHANNELS
When a greater number of gamma correction channels
are required, two or more BUFxx704 devices can be
used in parallel, as shown in Figure 25. This capability
provides a cost-effective way of creating more refer-
ence voltages over the use of quad-channel op amps or
buffers. The suggested configuration in Figure 25
simplifies layout. The various different channel versions
provide a high degree of flexibility and also minimize
total cost and space.
GMA6
VCOM1
VCOM2
VCOM3
VCOM1
VCOM2
VCOM3
BUF07704
OUT1
GMA7
OUT2
OUT3
OUT4
OUT5
OUT6
8
9
10
BUF11704
11
OUT1
GMA1
GMA12
OUT2
OUT3
OUT4
OUT5
OUT6
2
3
4
5
6
BUF07704
OUT7
OUT8
7
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
GMA13
14
8
OUT9
9
OUT10
GMA10
15
16
OUT1
OUT2
OUT3
GMA11
12
17
GMA18
13
OUT4
OUT5
OUT6
14
15
GMA16
BUF07704
Figure 26. 18-Channel Application with Three
Integrated V Channels
COM
Figure 25. Creating > 10 Gamma Voltage
Channels
15
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Table 1. How to Combine for > 10 Channels
TPA3005D2, but is capable of 8 W of output power.
Texas Instruments offers a full line of linear and
switch-mode audio power amplifiers. For more
information, visit www.ti.com. For excellent audio
performance, TI recommends the OPA364 (SBOS259)
or OPA353 (SBOS103) as headphone drivers.
BUF05704 BUF06704 BUF07704 BUF11704
12ch
12ch + V
14ch + V
16ch + V
18ch + V
20ch + V
—
—
1
2
1
—
1
—
—
1
COM
COM
COM
COM
COM
—
1
—
—
—
—
—
—
—
1
INTEGRATED DC/DC CONVERTERS FOR
LCD PANELS: TPS65100 and TPS65140
—
—
2
2
The TPS65100 and TPS65140 offer a very compact
and small power supply solution to provide all three
power-supply voltages required by TFT (thin film
transistor) LCD displays. Additionally the devices have
COMPLETE LCD SOLUTION FROM TI
In addition to the BUFxx704 line of gamma correction
buffers, TI offers a complete set of ICs for the LCD panel
market, including source and gate drivers, timing
controllers, various power-supply solutions, and audio
power solutions. Figure 27 shows the total IC solution
from TI.
an integrated V
buffer. The auxiliary linear regulator
COM
controller can be used to generate the 3.3 V logic power
rail for systems powered by a 5 V supply rail only. The
main output can power the LCD source drivers as well
as the BUFxx704. An integrated adjustable charge
pump doubler/tripler provides the positive LCD gate
drive voltage. An externally adjustable negative charge
pump provides the negative gate drive voltage. The
AUDIO POWER AMPLIFIER FOR TV
SPEAKERS
TPS65100 has an integrated V
buffer to power the
COM
The TPA3005D2 is a 6 W (per channel) stereo audio
amplifier specifically targeted towards LCD monitors
and TVs. It offers highly efficient, filter-free Class-D
operation for driving bridge-tied stereo speakers. The
TPA3005D2 is designed to drive stereo speakers as low
as 8 Ω without an output filter. The high efficiency of the
TPA3005D2 eliminates the need for external heatsinks
when playing music. The TPA3008D2 is similar to the
LCD backplane. A version of the BUFxx704 without the
integrated V buffer could be used for minimum
COM
redundancy and lowest cost. For LCD panels powered
by 5 V only, the TPS65100 has a linear regulator
controller that uses an external transistor to provide a
regulated 3.3 V output for the digital circuits. Contact
the local sales office for more information.
Reference
VCOM
Gamma Correction
BUFxx704
15 V
26 V
TPS65140
TPS65100
LCD
2.7 V−5 V
−
14 V
Supply
3.3 V
TPA3005D2
TPA3008D2
Audio
n
n
Speaker
Driver
Source Driver
Logic and
Timing
Controller
High−Resolution
TFT−LCS Panel
Figure 27. TI LCD Solution
16
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
3. Additional vias may be placed anywhere along the
thermal plane outside of the thermal pad area. This
helps dissipate the heat generated by the
BUFxx704 IC. These additional vias may be larger
than the 13-mil diameter vias directly under the
thermal pad. They can be larger because they are
not in the thermal pad area to be soldered; thus,
wicking is not a problem.
GENERAL PowerPAD DESIGN
CONSIDERATIONS
The BUFxx704 is available in the thermally-enhanced
PowerPAD family of packages. These packages are
constructed using a downset leadframe upon which the
die is mounted, as shown in Figure 28(a) and (b). This
arrangement results in the lead frame being exposed as
a thermal pad on the underside of the package; see
Figure 28(c). Due to this thermal pad having direct
thermal contact with the die, excellent thermal
performance is achieved by providing a good thermal
path away from the thermal pad.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground plane,
do not use the typical web or spoke via connection
methodology. Web connections have a high thermal
resistance connection that is useful for slowing the
heat transfer during soldering operations. This
makes the soldering of vias that have plane
connections easier. In this application, however, low
thermal resistance is desired for the most efficient
heat transfer. Therefore, the holes under the
BUFxx704 PowerPAD package should make their
connection to the internal ground plane with a
The PowerPAD package allows for both assembly and
thermal management in one manufacturing operation.
During the surface-mount solder operation (when the
leads are being soldered), the thermal pad must be
soldered to a copper area underneath the package.
Through the use of thermal paths within this copper
area, heat can be conducted away from the package
into either a ground plane or other heat-dissipating
device. Soldering the PowerPAD to the PCB is
always required, even with applications that have
low power dissipation. This provides the necessary
thermal and mechanical connection between the lead
frame die pad and the PCB.
complete
connection
around
the
entire
circumference of the plated-through hole.
6. The top-side solder mask should leave the terminals
of the package and the thermal pad area with its six
holes (BUF05704 and BUF06704), eight holes
(BUF07704) or ten holes (BUF11704) exposed. The
bottom-side solder mask should cover the holes of
the thermal pad area. This prevents solder from
being pulled away from the thermal pad area during
the reflow process.
The PowerPAD must be connected to the device’s most
negative supply voltage.
1. Prepare the PCB with a top-side etch pattern. There
should be etching for the leads as well as etch for the
thermal pad.
7. Apply solder paste to the exposed thermal pad area
and all of the IC terminals.
2. Place recommended holes in the area of the thermal
pad. Ideal thermal land size and thermal via patterns
(2x3 for BUF05704 PWP-14 and BUF06704
PWP-16; 2x4 for BUF07704 PWP-20; and 2x5 for
BUF11704 PWP-28) can be seen in the technical
brief, PowerPAD Thermally-Enhanced Package
(SLMA002), available for download at www.ti.com.
These holes should be 13 mils (0.33 mm) in diame-
ter. Keep them small, so that solder wicking through
the holes is not a problem during reflow.
8. With these preparatory steps in place, the
BUFxx704 IC is simply placed in position and run
through the solder reflow operation as any standard
surface-mount component. This preparation results
in a properly installed part.
DIE
Side View (a)
Thermal
Pad
DIE
End View (b)
Bottom View (c)
The thermal pad is electrically isolated from all terminals in the package.
Figure 28. Views of Thermally-Enhanced DGN Package
17
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SBOS277F − JUNE 2004 − REVISED DECEMBER 2007
For a given q , the maximum power dissipation is
shown in Figure 29, and is calculated by the following
formula:
JA
8
7
6
5
4
3
2
1
0
TSSOP−28
TSSOP−20
TSSOP−16
TSSOP−14
TMAX * TA
qJA
P + ǒ Ǔ
D
Where:
P = maximum power dissipation (W)
D
TMAX = absolute maximum junction temperature (125°C)
T = free-ambient air temperature (°C)
A
JA
JC
q
= q + q
JC CA
q
= thermal coefficient from junction to case (°C/W)
qCA = thermal coefficient from case-to-ambient air (°C/W)
Dissipation with PowerPAD
soldered down.
−
−
20
40
0
20
40
60
80
100
_
T
A −Free−Air Temperature − C
Figure 29. Maximum Power Dissipation vs
Free-Air Temperature
18
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
BUF05704AIPWPR
BUF07704AIPWPR
NRND
HTSSOP
HTSSOP
PWP
PWP
14
20
2000 RoHS & Green
2000 RoHS & Green
NIPDAU
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
BUF5704
ACTIVE
-25 to 85
BUF07704
BUF11704AIPWP
BUF11704AIPWPR
NRND
NRND
HTSSOP
HTSSOP
PWP
PWP
28
28
50
RoHS & Green
NIPDAU
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-25 to 85
-25 to 85
BUF11704
BUF11704
2000 RoHS & Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BUF05704AIPWPR
BUF07704AIPWPR
BUF07704AIPWPR
BUF11704AIPWPR
HTSSOP PWP
HTSSOP PWP
HTSSOP PWP
HTSSOP PWP
14
20
20
28
2000
2000
2000
2000
330.0
330.0
330.0
330.0
12.4
16.4
16.4
16.4
6.9
6.95
6.95
6.9
5.6
7.1
1.6
1.6
1.6
1.8
8.0
8.0
12.0
16.0
16.0
16.0
Q1
Q1
Q1
Q1
7.1
8.0
10.2
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
BUF05704AIPWPR
BUF07704AIPWPR
BUF07704AIPWPR
BUF11704AIPWPR
HTSSOP
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
PWP
14
20
20
28
2000
2000
2000
2000
350.0
350.0
356.0
350.0
350.0
350.0
356.0
350.0
43.0
43.0
35.0
43.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
PWP HTSSOP
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
BUF11704AIPWP
28
50
530
10.2
3600
3.5
Pack Materials-Page 3
GENERIC PACKAGE VIEW
PWP 28
4.4 x 9.7, 0.65 mm pitch
PowerPADTM TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224765/B
www.ti.com
GENERIC PACKAGE VIEW
PWP 14
4.4 x 5.0, 0.65 mm pitch
PowerPAD TSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224995/A
www.ti.com
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