C3216X5R1A226 [TI]
High-Vin, High-Efficiency Power Solution Using DC/DC Converter With DVFS; 高输入电压，高效率电源解决方案采用DC / DC转换器DVFS
| 型号： | C3216X5R1A226 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | High-Vin, High-Efficiency Power Solution Using DC/DC Converter With DVFS |
| 文件： | 总9页 (文件大小：245K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Application Report
SLVA339A–June 2009–Revised May 2010
High-Vin, High-Efficiency Power Solution Using DC/DC
Converter With DVFS
Ambreesh Tripathi .......................................................................... PMP - DC/DC Low-Power Converters
ABSTRACT
This reference design is intended for users designing with the TMS320C6742, TMS320C6746,
TMS320C6748, or OMAP-L138 processor. Using sequenced power supplies, this reference design
describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with integrated FETs
and dynamic voltage and frequency scaling (DVFS) for a small, simple design.
Sequenced power supply architectures are becoming commonplace in high-performance microprocessor
and digital signal processor (DSP) systems. To save power and increase processing speeds, processor
cores have smaller geometry cells and require lower supply voltages than the system bus voltages. Power
management in these systems requires special attention. This application report addresses these topics
and suggests solutions for output voltage sequencing.
Contents
1
2
3
4
Introduction .................................................................................................................. 2
Power Requirements ....................................................................................................... 2
Features ...................................................................................................................... 3
Bill of Materials .............................................................................................................. 6
List of Figures
1
2
3
4
5
6
7
PMP4976 Reference Design Schematic.................................................................................
Optional Circuit for DVDD_A, DVDD_B, and DVDD_C................................................................
Sequencing in Start-up Waveform........................................................................................
Efficiency vs Output Current...............................................................................................
Efficiency vs Output Current...............................................................................................
Efficiency vs Output Current...............................................................................................
Efficiency vs Output Current...............................................................................................
4
5
7
7
7
7
7
List of Tables
1
2
General Requirements .....................................................................................................
PMP4976 Bill of Materials .................................................................................................
2
6
1
SLVA339A–June 2009–Revised May 2010
High-Vin, High-Efficiency Power Solution Using DC/DC Converters With DVFS
Copyright © 2009–2010, Texas Instruments Incorporated
Introduction
www.ti.com
1
Introduction
In dual voltage architectures, coordinated management of power supplies is necessary to avoid potential
problems and ensure reliable performance. Power supply designers must consider the timing and voltage
differences between core and input/output (I/O) voltage supplies during power-up and power-down
operations.
Sequencing refers to the order, timing, and differential in which the two voltage rails are powered up and
down. A system designed without proper sequencing may be at risk for two types of failures. The first of
these represents a threat to the long-term reliability of the dual voltage device, whereas the second is
more immediate, with the possibility of damaging interface circuits in the processor or system devices
such as memory, logic, or data converter integrated circuits (IC).
Another potential problem with improper supply sequencing is bus contention. Bus contention is a
condition in which the processor and another device both attempt to control a bidirectional bus during
power up. Bus contention may also affect I/O reliability. Power supply designers must check the
requirements regarding bus contention for individual devices.
The power-on sequencing for the OMAP-L138, TMS320C6742, TMS320C6746, and TMS320C6748 are
shown in Table 1. None of the supplies for these devices require a specific voltage ramp rate as long as
the 3.3-V rail does not exceeds the 1.8-V rail by more than 2 V.
In order to reduce the power consumption of the processor core, dynamic voltage and frequency scaling
(DVFS) is used in the reference design. DVFS is a power management technique used while active
processing is going on in the system-on-chip (SoC), which matches the operating frequency of the
hardware to the performance requirement of the active application scenario. Whenever clock frequencies
are lowered, operating voltages are also lowered to achieve power savings. In the reference design, the
TPS62353 is used, which can scale its output voltage.
2
Power Requirements
The power requirements are as specified in the following table.
Table 1. General Requirements
(1) (2)
VOLTAGE
(V)
Imax
(mA)
SEQUENCING
ORDER
TIMING
DELAY
PIN NAME
RTC_CVDD
CVDD(4)
TOLERANCE
I/O
1.2
1.0 / 1.1 / 1.2
1.2
1
–25%, +10%
–9.75%, +10%
–5%, +10%
1(3)
Core
I/O
600
200
2
RVDD, PLL0_VDDA,
3
PLL1_VDDA, SATA_VDD,
USB_CVDD, USB0_VDDA12
I/O
USB0_VDDA18, USB1_VDDA18,
DDR_DVDD18, SATA_VDDR,
DVDD18
1.8
180
±5%
4
I/O
I/O
USB0_VDDA33, USB1_VDDA33
3.3
24
50 / 90(5)
±5%
±5%
5
DVDD3318_A, DVDD3318_B,
DVDD3318_C
1.8 / 3.3
4 / 5
(1)
(2)
If 1.8-V LVCMOS is used, power rails up with the 1.8-V rails. If 3.3-V LVCMOS is used, power it up with the ANALOG33 rails
(VDDA33_USB0/1).
No specific voltage ramp rate is required for any of the supplies LVCMOS33 (USB0_VDDA33, USB1_VDDA33) as long as
STATIC18 (USB0_VDDA18, USB1_VDDA18, DDR_DVDD18, SATA_VDDR, DVDD18) never exceeds more than 2 V.
If RTC is not used/maintained on a separate supply, it can be included in the STATIC12 (fixed 1.2 V) group.
If using CVDD at fixed 1.2 V, all 1.2-V rails may be combined.
If DVDD3318_A, B, and C are powered independently, maximum power for each rail is 1/3 above maximum power.
(3)
(4)
(5)
NanoFree is a trademark of Texas Instruments.
2
High-Vin, High-Efficiency Power Solution Using DC/DC Converters With DVFS
SLVA339A–June 2009–Revised May 2010
Copyright © 2009–2010, Texas Instruments Incorporated
www.ti.com
Features
3
Features
The design uses the following high-efficiency dc/dc converters with integrated FETs.
HIGH EFFICIENCY (With DVFS)
INPUT VOLTAGE
~12 V/3.3 V
OUTPUT VOLTAGES
Core 1.2 V at 600 mA
Fixed 1.2 V + VRTC at 251 mA
1.8 V at 230 mA
TPS62353
TPS62232
TPS62231
TPS62111
3.3 V at 115 mA
In the preceding table, VRTC is included in the STATIC12 (fixed 1.2-V) group.
TPS62353
•
•
•
•
•
•
•
•
•
88% efficiency at 3-MHz operation
Output peak current up to 800 mA
3-MHz fixed frequency operation
Best in class load and line transient
±2% PWM dc voltage accuracy
Efficiency optimized Power-Save mode
Transient optimized Power-Save mode
Fixed 1.2-V output eliminates need for external voltage-setting resistors
Available in a 10-pin QFN (3 × 3 mm) 12-pin NanoFree™ (CSP) packaging
TPS62231 and TPS62232
•
•
•
•
•
•
3-MHz switch frequency
Up to 94% efficiency
Output peak current up to 500 mA
Small external output filter components (1 mH/4.7 mF)
Small 1 × 1,5 × 0,6 mm 3 SON package
Fixed 1.8-V and 1.2-V output, respectively, eliminates need for external voltage-setting resistors
TPS62111
•
•
•
•
High-efficiency synchronous step-down converter with up to 95% efficiency
Up to 1.5-A output current
High efficiency over a wide load-current range due to PFM/PWM operation mode
Fixed 3.3-V output eliminates need for external voltage-setting resistors
More information on the devices can be found in the data sheets.
•
•
•
TPS62111, SLVS585
TPS62231 and TPS62232, SLVS941
TPS62353, SLVS540
3
SLVA339A–June 2009–Revised May 2010
High-Vin, High-Efficiency Power Solution Using DC/DC Converters With DVFS
Copyright © 2009–2010, Texas Instruments Incorporated
Features
www.ti.com
Figure 1. PMP4976 Reference Design Schematic
4
High-Vin, High-Efficiency Power Solution Using DC/DC Converters With DVFS
SLVA339A–June 2009–Revised May 2010
Copyright © 2009–2010, Texas Instruments Incorporated
www.ti.com
Features
Proper sequencing is ensured in the design with the use of a NPN transistor and a P-channel MOSFET.
As required, Core 1.2 V at 600 mA comes first, and is followed by Static 1.2 V + VRTC at 251 mA. Then
comes Static 1.8 V at 230 mA, which in turn pulls down the gate of a P-channel MOSFET with the use of
a NPN transistor. Last, Static 3.3 V at 115 mA comes up.
(1) Use three such LDOs to power up DVDDA, DVDDB, and DVDDC. (It can be either 1.8 V or 3.3 V.)
(2) Rx = 0.499 MΩ, Ry = 1 MΩ for Vout = 1.8 V
(3) Rx = 1.8 MΩ, Ry = 1 MΩ for Vout = 3.3 V
(4) For proper sequencing of output, the enable of the LDOs are fed either from a 1.2-V output from TPS62232 if
DVDDX is 1.8 V or from a 1.8-V output from TPS62231 if DVDDX is 3.3 V.
Figure 2. Optional Circuit for DVDD_A, DVDD_B, and DVDD_C
5
SLVA339A–June 2009–Revised May 2010
High-Vin, High-Efficiency Power Solution Using DC/DC Converters With DVFS
Copyright © 2009–2010, Texas Instruments Incorporated
Bill of Materials
www.ti.com
4
Bill of Materials
Table 2. PMP4976 Bill of Materials
Count RefDes
Value
10 mF
Description
Size
Part Number
C3216X5R1E106
C3216X5R1E106
C3216X5R1A226
C3216X5R1A226
C1608X7R1E105K
C1608X5R0J106KT
C1608X5R0J106KT
C4532X5R1A476M
Std
MFR
AREA
15390
15390
15390
15390
5650
2
C1
Capacitor, Ceramic, 25V, X5R, 20%
Capacitor, Ceramic, 25V, X5R, 20%
Capacitor, Ceramic, 10V, X5R, 20%
Capacitor, Ceramic, 10V, X5R, 20%
Capacitor, Ceramic, 25V, X7R, 10%
Capacitor, Ceramic, 6.3V, X5R, 10%
Capacitor, Ceramic, 6.3V, X5R, 10%
Capacitor, Ceramic, 10V, X5R, 20%
Capacitor, Ceramic, 10V, X5R, 20%
Capacitor, Ceramic, 6.3V, X5R, 20%
Capacitor, Ceramic, 6.3V, X5R, 20%
Capacitor, Ceramic, 10V, X5R, 20%
Capacitor, Ceramic, 6.3V, X5R, 20%
Capacitor, Ceramic, 6.3V, X5R, 20%
1206
1206
1206
1206
603
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
Std
C2
10 mF
2
C3
22 mF
C4
22 mF
1
2
C5
1 mF
C6
10 mF
603
5650
C7
10 mF
603
5650
1
2
2
2
C8
47 mF
1812
1210
402
43,360
83,600
C9
22 mF
C10
C11
C12
C13
C14
J1
2.2 mF
4.7 mF
22 mF
JDK105BJ225MV
JDK105BJ475MV
Std
Taiyo Yuden
Taiyo Yuden
Std
2800
402
2800
1210
402
83,600
2800
2.2 mF
4.7 mF
PTC36SAAN
2510-6002UB
JDK105BJ225MV
JDK105BJ475MV
PTC36SAAN
Taiyo Yuden
Taiyo Yuden
Sullins
402
2800
1
1
Header, Male 6-pin, 100mil spacing, (36-pin strip) 0.100 inch × 6
70000
J2
Connector, Male Straight 2×10 pin, 100mil
spacing, 4 Wall
0.338 × 0.788
2510-6002UB
3M
301.02
4
1
1
1
1
2
J3
PEC36SAAN
PTC36SAAN
6.8 mH
1 mH
Header, Male 5-pin, 100mil spacing, (36-pin strip) 0.100 inch × 5
PEC36SAAN
PTC36SAAN
Sullins
Sullins
Coiltronics
Coilcraft
FDK
FDK
Vishay
Fairchild
Std
60000
34100
90000
26,560
10160
10160
14105
37800
9100
JP1
L1
Header, 3-pin, 100mil spacing, (36-pin strip)
Inductor, SMT, 3.0A, 97 mΩ
Inductor, SMT, 1.6A, ±30%
Inductor, SMT, 0.7A, 230-mΩ
Inductor, SMT, 0.7A, 230-mΩ
MOSFET, P-ch, -12 V, 4 A, 51 mΩ
Transistor, NPN, 40V, 200mA, 625mW
Resistor, Chip, 1/16-W, 1%
Resistor, Chip, 1/16W, x%
0.100 × 3
0.276 × 0.276 inch HA3808-AL
L2
0.118 × 0.118
805
LPS3010-102NLC
L3
2.2 mH
2.2 mH
Si2335DS
2N3904
1M
MIPSZ20120D2R2
L4
805
MIPSZ20120D2R2
1
1
1
2
Q1
Q2
R1
R2
R3
R4
R5
R6
R7
R8
R9
U1
SOT23
TO-92
603
Si2335DS
2N3904
Std
10K
603
Std
Std
5,650
5,650
5,650
5650
10K
Resistor, Chip, 1/16W, x%
603
Std
Std
1
1
2
1M
Resistor, Chip, 1/16W, x%
603
Std
Std
1M
Resistor, Chip, 1/16W, 1%
603
Std
Std
10k
Resistor, Chip, 1/16W, 1%
603
Std
Std
5650
10k
Resistor, Chip, 1/16W, 1%
603
Std
Std
5650
2
1K
Resistor, Chip, 1/16W, x%
603
Std
Std
5,650
5,650
54289
1K
Resistor, Chip, 1/16W, x%
603
Std
Std
1
1
TPS62111RSA IC, Synchronous Step-Down Converter, 17V,
1.2A
QFN-16
TPS62111RSA
TI
U2
TPS62353YZG IC, 3MHz Synchronous Step Down Converter
with I2C, 800mA
CSP-12
TPS62353YZG
TI
12,000
1
1
U3
U4
TPS62232DRY IC, 3MHz Ultra Small Step Down Converter, x.x V QFN
TPS62231DRY IC, 3MHz Ultra Small Step Down Converter, x.x V QFN
TPS62232DRY
TPS62232DRY
TI
TI
6020
6020
Notes: 1. These assemblies are ESD sensitive, ESD precautions shall be observed.
2. These assemblies must be clean and free from flux and all contaminants. Failure to use clean flux is unacceptable.
3. These assemblies must comply with workmanship standards IPC-A-610 Class 2.
4. Reference designators marked with an asterisk ('**') cannot be substituted. All other components can be substituted with equivalent MFG's
components.
6
High-Vin, High-Efficiency Power Solution Using DC/DC Converters With DVFS
SLVA339A–June 2009–Revised May 2010
Copyright © 2009–2010, Texas Instruments Incorporated
www.ti.com
Bill of Materials
4.1 Test Result
The start-up waveform Figure 3 specifies the sequencing order that is required.
Figure 3. Sequencing in Start-up Waveform
100
90
80
70
60
50
40
30
20
10
0
100
4.2 V
90
V
= 2.3 V
IN
80
V
= 2.7 V
IN
V
= 3.3 V
IN
5 V
70
V
= 3.6 V
IN
60
50
40
30
20
8.4 V
V
= 4.2 V
IN
12 V
V
= 5 V
IN
MODE = GND,
= 1.8 V,
V
V
= 3.3 V
= 25oC
OUT
O
L = 2.2 mH (MIPSA25202R2),
= 4.7 mF
T
A
PFM Mode
C
10
0
OUT
0.0001
0.001
0.01
0.1
1
10
0.1
1
I
10
- Output Current - mA
100
1000
I
- Output Current- A
O
O
Figure 4. Efficiency vs Output Current
Figure 5. Efficiency vs Output Current
7
SLVA339A–June 2009–Revised May 2010
High-Vin, High-Efficiency Power Solution Using DC/DC Converters With DVFS
Copyright © 2009–2010, Texas Instruments Incorporated
Bill of Materials
www.ti.com
100
90
80
70
60
50
100
90
V
= 2.3 V
LPFM/PWM
IN
80
70
60
50
40
30
20
V
= 2.7 V
IN
V
= 3.6 V
IN
V
= 4.2 V
IN
3-MHz PWM
FPFM/PWM
V
= 5 V
40
30
20
10
0
IN
MODE = GND,
= 1.2 V,
V
V
= 3.6 V
I
V
OUT
= 1.35 V
O
L = 2.2 mH MIPSZ2012 2R2 (2012 size),
= 4.7 mF
L = 1 mH
= 10 mF
C
10
0
OUT
C
O
0.1
1
I
10
100
1000
0.1
1
10
- Output Current - mA
100
1000
I
− Output Current − mA
O
O
Figure 6. Efficiency vs Output Current
Figure 7. Efficiency vs Output Current
8
High-Vin, High-Efficiency Power Solution Using DC/DC Converters With DVFS
SLVA339A–June 2009–Revised May 2010
Copyright © 2009–2010, Texas Instruments Incorporated
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相关型号：
C3216X5R1A475KT
Ceramic Capacitor, Multilayer, Ceramic, 10V, 10% +Tol, 10% -Tol, X5R, 15% TC, 4.7uF, Surface Mount, 1206, CHIP, ROHS COMPLIANT
TDK
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