CC1201 [TI]
高性能低功耗无线收发器;
| 型号： | CC1201 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 高性能低功耗无线收发器 无线 |
| 文件： | 总36页 (文件大小：2155K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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CC1201
ZHCSBX5B –OCTOBER 2013–REVISED OCTOBER 2014
CC1201 低功率、高性能射频 (RF) 收发器
1 器件概述
1.1 特性
1
• RF 性能和模拟特性：
• 数字特性：
– 高性能、单芯片收发器
– 波形监视：针对改进的同步检测性能的高级数字
信号处理
•
出色的接收器灵敏度：
– 自主图像删除
– 安全性：硬件 AES128 加速器
–
–
1.2kbps 时为 -120dBm
50kbps 时为 -109dBm
– 数据先入先出 (FIFO)：独立的 128 字节 RX 和
•
•
•
阻断性能：10MHz 时为 85dB
邻道选择性：50kHz 偏移时高达 62dB
极低相位噪声：10kHz 偏移 (169 MHz) 时为
-114dBc/Hz
TX
– 包括针对天线多样性支持的功能
– 支持重传
– 支持接收到的数据包自动确认
– 步长为 0.4dB，高达 +16dBm 的可编程输出功率
– 自动输出功率斜升
– 所支持的调制格式：
– 针对载波监听 (LBT) 系统的自动空闲信道评估
(CCA)
– 增加范围和提高稳定耐用性的内置编码增益支持
– 数字接收信号强度指示 (RSSI) 测量
– 用于实现更少占用带宽的经改进 OOK 整形，从
而在满足规定要求的同时实现更高的输出功率
2 - 频移键控 (FSK)，2 - 高斯频移监控
(GFSK)，4-FSK，4-GFSK，最小频移键控
(MSK)，开关键控 (OOK)
– 发送和接收时支持高达 1.25Mbps 的数据速率
• 低流耗：
• 针对 802.15.4g 的专用数据包处理：
– 循环冗余校验 (CRC) 16/32
– 针对自动低功率接收轮询的增强型无线电唤醒
(eWOR) 功能
– 断电：0.12μA（eWOR 定时器激活时为 0.5μA）
– 前向纠错 (FEC)，双同步检测（FEC 和无 FEC
数据包）
– 数据白化
• 总体说明：
•
•
•
•
RX：在 RX 嗅探模式中为 0.5mA
RX：在低功耗模式中，峰值电流为 19mA
RX：在高性能模式中，峰值电流为 23mA
TX: +14dBm 时为 46mA
– 符合 RoHS 标准的 5mm × 5mm 无脚四方扁平无
引线 (QFN) 32 引脚封装 (RHB)
– 与 CC1120 器件引脚兼容
• 法规 - 适用于符合下列标准的系统：
– 欧洲: ETSI EN 300 220
• 其他：
– 数据先入先出 (FIFO)：独立的 128 字节 RX 和
TX
– 美国：FCC CFR47 第 15 部分
– 日本： ARIB STD-T108
– 支持与 CC1190 器件无缝集成以实现范围扩展，
从而使 RX 灵敏度提升 3dB 并且实现高达
+27dBm 的 TX 输出功率
1.2 应用
•
•
数据速率高达 1250kbps 的低功耗高性能无线系统
•
•
•
•
•
•
家庭和楼宇自动化
ISM/SRD 频带：169、433、868、915 和
920MHz
无线警报和安全系统
工业用监控和控制
•
•
有可能支持额外的频率频带：137 至
158.3MHz，205 至 237.5MHz，以及 274 至
316.6MHz
无线医疗应用
无线传感器网络和有源射频识别 (RFID)
IEEE 802.15.4g 应用
智能仪表计量（自动计量读取 (AMR) / 自动计量基
础设施 (AMI)）
1.3 说明
CC1201 是一款全集成单芯片射频收发器，此器件设计用于在成本有效无线系统中实现极低功耗和低压运行
的高性能。 所有滤波器都已集成，因此无需昂贵的外部 SAW 和 IF 滤波器。 该器件主要用于 ISM（工业、
科学和医疗）以及处于 164 - 190MHz，410 - 475MHz 和 820 - 950MHz 的 SRD（短程设备）频带。
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
English Data Sheet: SWRS154
CC1201
ZHCSBX5B –OCTOBER 2013–REVISED OCTOBER 2014
www.ti.com.cn
CC1201 器件提供大量硬件，以支持数据包处理、数据缓冲、突发传输、空闲信道评估、链路质量指示和无
线唤醒。 CC1201 器件的主要运行参数可由 SPI 接口控制。 在典型系统中，CC1201 器件将与微控制器和
极少的外部无源组件搭配使用。
对于 50kHz 或更高的信道滤波带宽，CC1201 提供与 CC1200 同样的性能，因此为无需窄带支持的应用提
供一个更低成本选择。
器件信息(1)
封装
部件号
封装尺寸
CC1201RHB
超薄四方扁平无引线 (VQFN) (32)
5.00mm x 5.00mm
(1) 更多信息请参见 节 8，机械封装和可订购产品信息
1.4 功能方框图
图 1-1 显示 CC120x 系列器件的系统方框图。
CC120x
4 kbyte
ROM
MARC
SPI
Serial configuration
CSn (chip select)
SI (serial input)
Ultra low power 40 kHz
auto-calibrated RC oscillator
Main Radio Control unit
Ultra low power 16 bit
MCU
(optional 40 kHz
clock input)
Power on reset
and data interface
AES-128
accelerator
Interrupt and
IO handler
System bus
SO (serial output)
SCLK (serial clock)
(optional GPIO3/2/0)
256 byte
FIFO RAM
buffer
eWOR
Enhanced ultra low power
Wake On Radio timer
Packet handler
and FIFO control
Battery sensor /
temp sensor
Configuration and
status registers
RF and DSP frontend
Output power ramping and OOK / ASK modulation
(optional auto detected
external XOSC / TCXO)
I
+16 dBm high
efficiency PA
XOSC_Q1
XOSC_Q2
PA out
Fully integrated fractional-N
frequency synthesizer
Data interface with
signal chain access
XOSC
Q
90 dB dynamic
range ADC
IF amp
IF amp
LNA_P
LNA_N
(optional bit clock)
Highly flexible FSK / OOK
demodulator
High linearity
LNA
(optional low jitter serial
data output for legacy
protocols)
90 dB dynamic
range ADC
AGC
Automatic Gain Control, 60dB VGA range
RSSI measurements and carrier sense detection
(optional GPIO for
antenna diversity)
图 1-1. 系统方框图
2
器件概述
版权 © 2013–2014, Texas Instruments Incorporated
CC1201
www.ti.com.cn
ZHCSBX5B –OCTOBER 2013–REVISED OCTOBER 2014
内容
1
器件概述.................................................... 1
4.15 40-MHz Clock Input (TCXO) ........................ 16
4.16 32-kHz Clock Input.................................. 17
4.17 40-kHz RC Oscillator................................ 17
4.18 I/O and Reset ....................................... 17
4.19 Temperature Sensor ................................ 17
4.20 Typical Characteristics .............................. 18
Detailed Description ................................... 21
5.1 Block Diagram....................................... 21
5.2 Frequency Synthesizer.............................. 21
5.3 Receiver ............................................. 22
5.4 Transmitter .......................................... 22
5.5 Radio Control and User Interface ................... 22
5.6 Enhanced Wake-On-Radio (eWOR) ................ 22
5.7 RX Sniff Mode....................................... 23
5.8 Antenna Diversity ................................... 23
5.9 WaveMatch.......................................... 24
Typical Application Circuit ........................... 25
器件和文档支持 .......................................... 26
7.1 器件支持............................................. 26
7.2 文档支持............................................. 27
7.3 社区资源............................................. 27
7.4 商标.................................................. 27
7.5 静电放电警告 ........................................ 27
7.6 术语表 ............................................... 27
机械封装和可订购信息 .................................. 28
1.1 特性 ................................................... 1
1.2 应用 ................................................... 1
1.3 说明 ................................................... 1
1.4 功能方框图............................................ 2
修订历史记录............................................... 4
Terminal Configuration and Functions.............. 5
3.1 Pin Diagram .......................................... 5
3.2 Pin Configuration ..................................... 6
Specifications ............................................ 7
4.1 Absolute Maximum Ratings .......................... 7
4.2 Handling Ratings ..................................... 7
2
3
5
4
4.3
Recommended Operating Conditions (General
Characteristics) ....................................... 7
Thermal Resistance Characteristics for RHB
4.4
Package .............................................. 7
4.5 RF Characteristics.................................... 8
4.6 Regulatory Standards ................................ 8
4.7 Current Consumption, Static Modes ................. 9
4.8 Current Consumption, Transmit Modes .............. 9
4.9 Current Consumption, Receive Modes.............. 10
4.10 Receive Parameters................................. 11
4.11 Transmit Parameters................................ 14
4.12 PLL Parameters ..................................... 15
4.13 Wake-up and Timing ................................ 16
4.14 40-MHz Crystal Oscillator ........................... 16
6
7
8
版权 © 2013–2014, Texas Instruments Incorporated
内容
3
CC1201
ZHCSBX5B –OCTOBER 2013–REVISED OCTOBER 2014
www.ti.com.cn
2 修订历史记录
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
本数据手册修订历史记录强调了使 SWRS154A 器件专用数据手册变为 SWRS154B 修订版本所做的更改。
Changes from Revision A (June 2014) to Revision B
Page
•
•
Added Ambient to the temperature range condition and removed Tj from Temperature range ........................... 7
Added data to TCXO table......................................................................................................... 16
4
修订历史记录
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3 Terminal Configuration and Functions
3.1 Pin Diagram
Figure 3-1 shows pin names and locations for the CC1201 device.
Figure 3-1. Package 5-mm × 5-mm QFN
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Terminal Configuration and Functions
5
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3.2 Pin Configuration
The following table lists the pin-out configuration for the CC1201 device.
PIN NO. PIN NAME
TYPE / DIRECTION DESCRIPTION
1
VDD_GUARD
RESET_N
GPIO3
GPIO2
DVDD
Power
2.0–3.6 V VDD
2
Digital input
Digital I/O
Digital I/O
Power
Asynchronous, active-low digital reset
General-purpose I/O
3
4
General-purpose I/O
5
2.0–3.6 VDD to internal digital regulator
Digital regulator output to external decoupling capacitor
Serial data in
6
DCPL
Power
7
SI
Digital input
Digital input
Digital I/O
Digital I/O
Digital input
Power
8
SCLK
Serial data clock
9
SO(GPIO1)
GPIO0
CSn
Serial data out (general-purpose I/O)
General-purpose I/O
10
11
12
13
14
15
16
17
Active-low chip select
DVDD
2.0–3.6 V VDD
AVDD_IF
RBIAS
AVDD_RF
N.C.
Power
2.0–3.6 V VDD
Analog
External high-precision resistor
2.0–3.6 V VDD
Power
Not connected
PA
Analog
Analog
Single-ended TX output (requires DC path to VDD)
TX and RX switch. Connected internally to GND in TX and floating (high-
impedance) in RX.
18
TRX_SW
19
20
21
22
23
24
25
26
27
28
29
LNA_P
Analog
Analog
Power
Power
Analog
Analog
Power
Power
Power
Power
Power
Differential RX input (requires DC path to ground)
Differential RX input (requires DC path to ground)
Pin for external decoupling of VCO supply regulator
2.0–3.6 V VDD
LNA_N
DCPL_VCO
AVDD_SYNTH1
LPF0
External loopfilter components
LPF1
External loopfilter components
AVDD_PFD_CHP
DCPL_PFD_CHP
AVDD_SYNTH2
AVDD_XOSC
DCPL_XOSC
2.0–3.6 V VDD
Pin for external decoupling of PFD and CHP regulator
2.0–3.6 V VDD
2.0–3.6 V VDD
Pin for external decoupling of XOSC supply regulator
Crystal oscillator pin 1 (must be grounded if a TCXO or other external clock
connected to EXT_XOSC is used)
30
31
XOSC_Q1
XOSC_Q2
Analog
Analog
Crystal oscillator pin 2 (must be left floating if a TCXO or other external clock
connected to EXT_XOSC is used)
Pin for external clock input (must be grounded if a regular crystal connected to
XOSC_Q1 and XOSC_Q2 is used)
32
–
EXT_XOSC
GND
Digital input
Ground pad
The ground pad must be connected to a solid ground plane.
6
Terminal Configuration and Functions
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4 Specifications
All measurements performed on CC1200EM_868_930 rev.1.0.0, CC1200EM_420_470 rev.1.0.1, or
CC1200EM_169 rev.1.2.
4.1 Absolute Maximum Ratings(1)(2)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
MAX
3.9
UNIT
V
CONDITION
Supply voltage (VDD, AVDD_x)
Input RF level
–0.3
All supply pins must have the same voltage
+10
dBm
V
Voltage on any digital pin
–0.3
–0.3
VDD+0.3
max 3.9 V
Voltage on any analog Pin
(including DCPL pins)
2.0
V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to VSS, unless otherwise noted.
4.2 Handling Ratings
MIN
–40
–2
MAX
125
2
UNIT
°C
Tstg
Storage temperature range
Electrostatic Human body model (HBM), per ANSI/ESDA/JEDEC JS001(1)
kV
discharge
(ESD)
performance:
VESD
Charged device model (CDM), per JESD22-
All pins
–500
500
V
C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V HBM allows safe manufacturing with a standard ESD control process.
4.3 Recommended Operating Conditions (General Characteristics)
PARAMETER
MIN
2.0
0
TYP
MAX
3.6
UNIT CONDITION
Voltage supply range
Voltage on digital inputs
Temperature range
V
V
All supply pins must have the same voltage
Ambient
VDD
85
–40
°C
4.4 Thermal Resistance Characteristics for RHB Package
°C/W(1)
21.1
5.3
AIR FLOW (m/s)(2)
RθJC
RθJB
RθJA
PsiJT
PsiJB
RθJC
Junction-to-case (top)
Junction-to-board
0.00
0.00
0.00
0.00
0.00
0.00
Junction-to-free air
31.3
0.2
Junction-to-package top
Junction-to-board
5.3
Junction-to-case (bottom)
0.8
(1) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RΘJC] value, which is based on a
JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these
EIA/JEDEC standards:
•
•
•
•
JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)
JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements
Power dissipation of 40 mW and an ambient temperature of 25ºC is assumed.
(2) m/s = meters per second
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4.5 RF Characteristics
PARAMETER
MIN
820
410
164
TYP
MAX
950
UNIT CONDITION
MHz
MHz
MHz
MHz
475
190
Frequency bands
(274)
(205)
(137)
(316.6)
(237.5)
(158.3)
Contact TI for more information about the use
of these frequency bands.
MHz
MHz
Hz
30
15
6
In 820–950 MHz band
In 410–475 MHz band
In 164–190 MHz band
Packet mode
Frequency resolution
Data rate
Hz
Hz
0
0
1250
625
kbps
kbps
Transparent mode
4.6 Regulatory Standards
FREQUENCY BAND
SUITABLE FOR COMPLIANCE
WITH
COMMENTS
PERFORMANCE MODE
Performance also suitable for
systems targeting maximum
allowed output power in the
respective bands, using a
range extender such as the
CC1190
ARIB STD-T108
ETSI EN 300 220 receiver categories
2 and 3
820–950 MHz
FCC PART 15.247
FCC PART 15.249
Performance also suitable for
systems targeting maximum
allowed output power in the
respective bands, using a
range extender
High-performance mode
ETSI EN 300 220 receiver categories
2 and 3
410–475 MHz
Performance also suitable for
systems targeting maximum
allowed output power in the
respective bands, using a
range extender
164–190 MHz
820–950 MHz
ETSI EN 300 220
ETSI EN 300 220 receiver categories
2 and 3
FCC PART 15.247
FCC PART 15.249
Low-power mode
ETSI EN 300 220 receiver categories
2 and 3
410–475 MHz
164–190 MHz
ETSI EN 300 220
8
Specifications
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4.7 Current Consumption, Static Modes
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
0.12
0.5
MAX
UNIT CONDITION
1
µA
µA
µA
mA
Power down with retention
Low-power RC oscillator running
XOFF mode
IDLE mode
180
1.5
Crystal oscillator / TCXO disabled
Clock running, system waiting with no radio activity
4.8 Current Consumption, Transmit Modes
4.8.1 868-, 915-, and 920-MHz Bands (High-Performance Mode)
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
mA
CONDITION
TX current consumption +14 dBm
TX current consumption +10 dBm
46
36
mA
4.8.2 433-MHz Band (High-Performance Mode)
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
mA
CONDITION
TX current consumption +15 dBm
TX current consumption +14 dBm
TX current consumption +10 dBm
49
46
mA
35
mA
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4.8.3 169-MHz Band (High Performance Mode)
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
mA
CONDITION
TX current consumption +15 dBm
TX current consumption +14 dBm
TX current consumption +10 dBm
54
50
mA
39
mA
4.8.4 Low-Power Mode
TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
TX Current Consumption +10 dBm
33.6
mA
4.9 Current Consumption, Receive Modes
4.9.1 High-Performance Mode
TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
RX wait for sync
Using RX Sniff Mode, where the receiver wakes up
at regular intervals looking for an incoming packet.
Sniff mode configured to terminate on carrier
sense, and is measured using RSSI_VALID
_COUNT = 1 (0 for 1.2 kbps), AGC_WIN_SIZE = 0,
and SETTLE_WAIT = 1.(1)
1.2 kbps, 4-byte preamble
38.4 kbps, 12-byte preamble
50 kbps, 24-byte preamble
0.5
3.5
2.1
mA
mA
mA
RX peak current
1.2 kbps
Peak current consumption during packet reception
23.6
8
mA
µA
Average current consumption
Check for data packet every 1 second using
eWOR
50 kbps, 5-byte preamble, 40-kHz RC oscillator
used as eWOR timer
(1) See the sniff mode design note for more information (SWRA428)
4.9.2 Low-Power Mode
TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
RX Peak current low-power RX mode
50 kbps
Peak current consumption during packet reception
at the sensitivity limit
19
mA
10
Specifications
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4.10 Receive Parameters
All RX measurements made at the antenna connector, to a bit error rate (BER) limit of 1%. Selectivity and
blocking is measured with the desired signal 3 dB above the sensitivity level.
4.10.1 General Receive Parameters (High-Performance Mode)
TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
Saturation
+10
dBm
Digital channel filter programmable
bandwidth
50
1600
kHz
IIP3
–14
±14
dBm
%
At maximum gain
With carrier sense detection enabled
With carrier sense detection disabled
Data rate offset tolerance
±1600
ppm
Spurious emissions
Radiated emissions measured according to ETSI
EN 300 220, fc = 869.5 MHz
1–13 GHz (VCO leakage at 3.5 GHz)
30 MHz to 1 GHz
< –56
< –57
dBm
dBm
Optimum source impedance
868-, 915-, and 920-MHz bands
433-MHz band
60 + j60 / 30 + j30
Ω
Ω
Ω
(Differential or Single-Ended RX Configurations)
100 + j60 / 50 + j30
140 + j40 / 70 + j20
169-MHz band
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Specifications
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4.10.2 RX Performance in 868-, 915-, and 920-MHz Bands (High-Performance Mode)
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
–119
–113
MAX
UNIT
dBm
dBm
CONDITION
1.2 kbps 2-FSK, DEV=20 kHz CHF=50 kHz(1)
4.8 kbps OOK CHF=128 kHz(1)
32.768 kbps 2-GFSK, DEV=50 kHz CHF=208
kHz(1)
–108
dBm
Sensitivity
–110
–109
–97
–97
50
50
75
80
38
46
66
70
44
44
64
72
41
46
65
71
45
54
63
68
42
42
57
46
52
59
dBm
dBm
dBm
dBm
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
38.4 kbps 2-GFSK, DEV=20 kHz CHF=104 kHz(1)
50 kbps 2-GFSK, DEV=25 kHz, CHF=104 kHz(1)
500 kbps 2-GMSK, CHF=833 kHz(1)
1 Mbps 4-GFSK, DEV=400 kHz, CHF=1.66 MHz(1)
± 50 kHz (adjacent channel)
± 100 kHz (alternate channel)
± 2 MHz
Blocking and selectivity
1.2-kbps 2-FSK, 50-kHz channel
separation, 20-kHz deviation, 50-kHz
channel filter
± 10 MHz
± 200 kHz
Blocking and selectivity
± 400 kHz
32.768-kbps 2-GFSK, 200-kHz channel
separation, 50-kHz deviation, 208-kHz
channel filter
± 2 MHz
± 10 MHz
+ 100 kHz (adjacent channel)
± 200 kHz (alternate channel)
± 2 MHz
Blocking and selectivity
38.4-kbps 2-GFSK, 100-kHz channel
separation, 20-kHz deviation, 104-kHz
channel filter
± 10 MHz
± 200 kHz (adjacent channel)
± 400 kHz (alternate channel)
± 2 MHz
Blocking and selectivity
50-kbps 2-GFSK, 200-kHz channel
separation, 25-kHz deviation, 104-kHz
channel filter (Same modulation format as
802.15.4g Mandatory Mode)
± 10 MHz
± 400 kHz (adjacent channel)
± 800 kHz (alternate channel)
± 2 MHz
Blocking and selectivity
100-kbps 2-GFSK, 50-kHz deviation,
208-kHz channel filter
± 10 MHz
+ 1 MHz (adjacent channel)
± 2 MHz (alternate channel)
± 10 MHz
Blocking and selectivity
500-kbps GMSK, 833-kHz channel filter
± 2 MHz (adjacent channel)
± 4 MHz (alternate channel)
± 10 MHz
Blocking and selectivity
1-Mbps 4-GFSK, 400-kHz deviation,
1.6-MHz channel filter
(1) DEV is short for deviation, CHF is short for Channel Filter Bandwidth
12
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4.10.3 RX Performance in 433-MHz Band (High-Performance Mode)
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
1.2 kbps 2-FSK, DEV=20 kHz
CHF=50 kHz(1)
–120
dBm
Sensitivity
–111
56
dBm
dB
dB
dB
dB
dB
dB
dB
dB
38.4 kbps 2-GFSK, DEV=20 kHz CHF=104 kHz(1)
± 50 kHz (adjacent channel)
± 100 kHz (alternate channel)
± 2 MHz
Blocking and selectivity
56
1.2-kbps 2-FSK, 50-kHz channel
separation, 20-kHz deviation, 50-kHz
channel filter
79
84
± 10 MHz
49
+ 100 kHz (adjacent channel)
± 200 kHz (alternate channel)
± 2 MHz
Blocking and selectivity
48
38.4-kbps 2-GFSK, 100-kHz channel
separation, 20-kHz deviation, 104-kHz
channel filter
66
74
± 10 MHz
(1) DEV is short for deviation, CHF is short for Channel Filter Bandwidth
4.10.4 RX Performance in 169-MHz Band (High-Performance Mode)
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
–119
62
MAX
UNIT
dBm
dB
CONDITION
Sensitivity
1.2 kbps 2-FSK, DEV=20 kHz CHF=50 kHz(1)
± 50 kHz (adjacent channel)
± 100 kHz (alternate channel)
± 2 MHz
Blocking and Selectivity
62
dB
1.2 kbps 2-FSK, 50 kHz channel
separation, 20 kHz deviation, 50 kHz
channel filter
81
dB
85
dB
± 10 MHz
Image rejection
(Image compensation enabled)
1.2 kbps, DEV=20 kHz, CHF=50 kHz, image at
–417 kHz(1)
67
dB
(1) DEV is short for deviation, CHF is short for Channel Filter Bandwidth
4.10.5 RX Performance in Low-Power Mode
TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz (unless otherwise noted)
PARAMETER
MIN
TYP
–96
41
MAX
UNIT
dBm
dB
CONDITION
Sensitivity
50 kbps 2-GFSK, DEV=25 kHz, CHF=119 kHz(1)
+ 200 kHz (adjacent channel)
+ 400 kHz (alternate channel)
± 2 MHz
Blocking and selectivity
50 kbps 2-GFSK, 200-kHz channel
separation, 25-kHz deviation, 104-kHz
channel filter
45
dB
62
dB
(Same modulation format as 802.15.4g
Mandatory Mode)
60
10
dB
± 10 MHz
Saturation
dBm
(1) DEV is short for deviation, CHF is short for Channel Filter Bandwidth
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4.11 Transmit Parameters
TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz (unless otherwise noted)
PARAMETER
MIN
TYP
+14
+15
+15
+16
+15
+16
+15
+16
–12
–38
0.4
MAX
UNIT
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dB
CONDITION
At 915/920 MHz
At 915/920 MHz with VDD = 3.6 V
At 868 MHz
At 868 MHz with VDD = 3.6 V
At 433 MHz
Max output power
At 433 MHz with VDD = 3.6 V
At 169 MHz
At 169 MHz with VDD = 3.6 V
Within fine step size range
Within coarse step size range
Within fine step size range
Min output power
Output power step size
Adjacent channel power
4-GFSK 9.6 kbps in 12.5 kHz channel, measured in
8.75 kHz bandwidth (ETSI 300 220 compliant)
–60
dBc
Spurious emissions
(Excluding harmonics)
Transmission at +14 dBm
Suitable for systems targeting compliance with ETSI
EN 300-220, FCC part 15, ARIB STD-T108
Measured in 1 MHz bandwidth
30 MHz–1 GHz
< –57
< –50
dBm
dBm
1–12.75 GHz
Harmonics
Second Harm, 169 MHz (ETSI)
Third Harm, 169 MHz (ETSI)
Fourth Harm, 169 MHz (ETSI)
–43
–57
–63
dBm
dBm
dBm
Second Harm, 433 MHz (ETSI)
Third Harm, 433 MHz (ETSI)
Fourth Harm, 433 MHz (ETSI)
–59
–51
–63
dBm
dBm
dBm
Transmission at +14 dBm (or maximum allowed in
applicable band where this is less than +14 dBm)
using TI reference design
Suitable for systems targeting compliance with ETSI
EN 300-220, FCC part 15, ARIB STD-T108
Second Harm, 868 MHz (ETSI)
Third Harm, 868 MHz (ETSI)
Fourth Harm, 868 MHz (ETSI)
–50
–44
–56
dBm
dBm
dBm
Second Harm, 915 MHz (FCC)
Third Harm, 915 MHz (FCC)
Fourth Harm, 915 MHz (FCC)
–58
–46
–62
dBm
dBm
dBm
Second Harm, 920 MHz (ARIB)
Third Harm, 920 MHz (ARIB)
Optimum load impedance
868-, 915-, and 920-MHz bands
433-MHz band
–65
–60
dBm
dBm
35 + j35
55 + j25
80 + j0
Ω
Ω
Ω
169-MHz band
14
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4.12 PLL Parameters
4.12.1 High Performance Mode
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
–94
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
± 10 kHz offset
± 100 kHz offset
± 1 MHz offset
± 10 MHz offset
± 10 kHz offset
± 100 kHz offset
± 1 MHz offset
± 10 MHz offset
± 10 kHz offset
± 100 kHz offset
± 1 MHz offset
± 10 MHz offset
± 10 kHz offset
± 100 kHz offset
± 1 MHz offset
± 10 MHz offset
± 10 kHz offset
± 100 kHz offset
± 1 MHz offset
± 10 MHz offset
± 10 kHz offset
± 100 kHz offset
± 1 MHz offset
± 10 MHz offset
Phase noise in 868-, 915-, and 920-MHz
Bands
200-kHz loop bandwidth setting
–96
–123
–137
–100
–102
–121
–136
–103
–104
–119
–133
–104
–106
–116
–130
–106
–107
–127
–141
–114
–114
–132
–142
Phase noise in 868-, 915-, and 920-MHz
Bands
300-kHz loop bandwidth setting
Phase noise in 868-, 915-, and 920-MHz
Bands
400-kHz loop bandwidth setting
Phase noise in 868-, 915-, and 920-MHz
Bands
500-kHz loop bandwidth setting
Phase noise in 433-MHz band
300-kHz loop bandwidth setting
Phase noise in 169-MHz band
300-kHz loop bandwidth setting
4.12.2 Low-Power Mode
PARAMETER
MIN
TYP
–99
MAX
UNIT
CONDITION
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
± 10 kHz offset
± 100 kHz offset
± 1 MHz offset
± 10 MHz offset
Phase noise in 868-, 915-, and 920-MHz
bands
200-kHz loop bandwidth setting
–101
–121
–135
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4.13 Wake-up and Timing
TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz (unless otherwise noted)
The turnaround behavior to and from RX and/or TX is highly configurable, and the time it takes will depend on
how the device is set up. See the CC120X user guide (SWRU346) for more information.
PARAMETER
MIN
TYP
0.24
133
369
43
MAX
UNIT
ms
µs
CONDITION
Powerdown to IDLE
Depends on crystal
Calibration disabled
Calibration enabled
IDLE to RX/TX
µs
RX/TX turnaround
RX-to-RX turnaround
µs
369
0
µs
With PLL calibration
µs
Without PLL calibration
369
0
µs
With PLL calibration
TX-to-TX turnaround
µs
Without PLL calibration
237
0
µs
Calibrate when leaving RX/TX enabled
Calibrate when leaving RX/TX disabled
When using SCAL strobe
RX/TX to IDLE time
µs
Frequency synthesizer calibration
314
µs
Minimum required number of preamble
bytes
Time from start RX until valid RSSI(1)
Including gain settling (function of channel
bandwidth. Programmable for trade-off
between speed and accuracy)
Required for RF front end gain settling only. Digital
demodulation does not require preamble for settling
0.5
bytes
ms
0.25
120-kHz channels
(1) See the design note on RSSI and response time. It is written for the CC112X devices, but the same principles apply for the CC1201
device.
4.14 40-MHz Crystal Oscillator
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
It is expected that there will be degraded sensitivity
at multiples of XOSC/2 in RX, and an increase in
spurious emissions when the RF channel is close to
multiples of XOSC in TX. We recommend that the
RF channel is kept RX_BW/2 away from XOSC/2 in
RX, and that the level of spurious emissions be
evaluated if the RF channel is closer than 1 MHz to
multiples of XOSC in TX.
Crystal frequency
38.4
40
MHz
Load capacitance (CL)
ESR
10
pF
Ω
60
Simulated over operating conditions
Depends on crystal
Start-up time
0.24
ms
4.15 40-MHz Clock Input (TCXO)
TA = 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
Clock frequency
38.4
40
MHz
TCXO with CMOS output
High input voltage
Low input voltage
Rise / Fall time
TCXO with CMOS output directly
coupled to pin EXT_OSC
1.4
0
VDD
0.6
2
V
V
ns
Clipped sine output
TCXO clipped sine output connected
to pin EXT_OSC through series
capacitor
0.8
1.5
V
Clock input amplitude (peak-to-peak)
16
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4.16 32-kHz Clock Input
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT CONDITION
Clock frequency
32
kHz
V
32-kHz clock input pin input high voltage
32-kHz clock input pin input low voltage
0.8 x VDD
0.2 x VDD
V
4.17 40-kHz RC Oscillator
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
After calibration (frequency calibrated against the
40-MHz crystal or TCXO)
Frequency
40
kHz
Relative to frequency reference (that is, 40-MHz
crystal or TCXO)
Frequency accuracy after calibration
Initial calibration time
±0.1
1.32
%
ms
4.18 I/O and Reset
TA = 25°C, VDD = 3.0 V (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
0.8 x
VDD
Logic input high voltage
V
0.2 x
VDD
Logic input low voltage
Logic output high voltage
V
V
0.8 x
VDD
At 4-mA output load or less
Voltage on DVDD pin
0.2 x
VDD
Logic output low voltage
Power-on reset threshold
V
V
1.3
4.19 Temperature Sensor
TA = 25°C, VDD = 3.0 V (unless otherwise noted).
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
Temperature sensor range
–40
85
°C
Change in sensor output voltage versus change in
temperature
Temperature coefficient
Typical output voltage
VDD coefficient
2.66
794
mV / °C
mV
Typical sensor output voltage at TA = 25°C, VDD =
3.0 V
Change in sensor output voltage versus change in
VDD
1.17
mV / V
The CC1201 device can be configured to provide a voltage proportional to temperature on GPIO1. The
temperature can be estimated by measuring this voltage (see Section 4.19, Temperature Sensor). For more
information, see the temperature sensor design note (SWRA415).
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4.20 Typical Characteristics
TA = 25°C, VDD = 3.0 V, fc = 869.5 MHz (unless otherwise noted)
80
70
60
50
40
30
20
10
0
80
60
40
20
0
-20
-40
-10
-20
-110
-90
-70
-50
-30
-10
-2
-1
0
1
2
Input Level (dBm)
Offset Frequency (MHz)
50-kbps GFSK, 25-kHz Deviation, 104-kHz Channel Filter Bandwidth
50 kbps, 25-kHz Deviation, 104-kHz Channel Filter Bandwidth Image
Frequency at –0.28-MHz Offset
Figure 4-2. Selectivity vs Offset Frequency (100-kHz Channels)
Figure 4-1. RSSI vs Input Level
16
15
14
13
12
16
15
14
13
12
11
10
-40
0
40
Temperature (ºC)
80
2
2.5
3
3.5
Supply Voltage (V)
Maximum Output Power Setting (0x7F)
Figure 4-4. Output Power vs Temperature
Maximum Output Power Setting (0x7F)
Figure 4-3. Output Power vs Supply Voltage
20
10
60
50
40
30
20
10
0
0
-10
-20
-30
-40
-50
PA power setting
PA power setting
Figure 4-5. Output Power at 868 MHz
vs PA Power Setting
Figure 4-6. TX Current at 868 MHz
vs PA Power Setting
18
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Typical Characteristics (continued)
1 Mbps 4-GFSK, 400-kHz Deviation 500-kHz Loop Bandwidth
1 Mbps 4-GFSK, 400-kHz Deviation 300-kHz Loop Bandwidth
Figure 4-7. Eye Diagram
Figure 4-8. Eye Diagram
3.1
1.4
1.2
1
2.9
2.7
2.5
2.3
2.1
1.9
1.7
1.5
0.8
0.6
0.4
0.2
0
Output High Voltage
Output Low Voltage
0
5
10
15
20
25
30
Current (mA)
1 kbps GFSK, 25-kHz Deviation 200-kHz Loop Bandwidth
Figure 4-10. GPIO Output High and Low Voltage
vs Current Being Sourced and Sinked
Figure 4-9. Eye Diagram
200-kHz Loop Bandwidth
300-kHz Loop Bandwidth
Figure 4-11. Phase Noise 869.5 MHz (10-kHz to 100-MHz Offset) Figure 4-12. Phase Noise 869.5 MHz (10-kHz to 100-MHz Offset)
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Typical Characteristics (continued)
500-kHz Loop Bandwidth
Figure 4-14. Phase Noise 869.5 MHz (10-kHz to 100-MHz Offset)
400-kHz Loop Bandwidth
Figure 4-13. Phase Noise 869.5 MHz (10-kHz to 100-MHz Offset)
20
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5 Detailed Description
5.1 Block Diagram
Figure 5-1 shows the system block diagram of the CC120x family of devices.
CC120x
4 kbyte
ROM
MARC
SPI
Serial configuration
CSn (chip select)
SI (serial input)
Ultra low power 40 kHz
auto-calibrated RC oscillator
Main Radio Control unit
Ultra low power 16 bit
MCU
(optional 40 kHz
clock input)
Power on reset
and data interface
AES-128
accelerator
Interrupt and
IO handler
System bus
SO (serial output)
SCLK (serial clock)
(optional GPIO3/2/0)
256 byte
FIFO RAM
buffer
eWOR
Enhanced ultra low power
Wake On Radio timer
Packet handler
and FIFO control
Battery sensor /
temp sensor
Configuration and
status registers
RF and DSP frontend
Output power ramping and OOK / ASK modulation
(optional auto detected
external XOSC / TCXO)
I
+16 dBm high
efficiency PA
XOSC_Q1
XOSC_Q2
PA out
Fully integrated fractional-N
frequency synthesizer
Data interface with
signal chain access
XOSC
Q
90 dB dynamic
range ADC
IF amp
IF amp
LNA_P
LNA_N
(optional bit clock)
Highly flexible FSK / OOK
demodulator
High linearity
LNA
(optional low jitter serial
data output for legacy
protocols)
90 dB dynamic
range ADC
AGC
Automatic Gain Control, 60dB VGA range
RSSI measurements and carrier sense detection
(optional GPIO for
antenna diversity)
Figure 5-1. System Block Diagram
5.2 Frequency Synthesizer
At the center of the CC1201 device there is a fully integrated, fractional-N, ultra-high-performance
frequency synthesizer. The frequency synthesizer is designed for excellent phase noise performance,
providing very high selectivity and blocking performance. The system is designed to comply with the most
stringent regulatory spectral masks at maximum transmit power.
Either a crystal can be connected to XOSC_Q1 and XOSC_Q2, or a TCXO can be connected to the
EXT_XOSC input. The oscillator generates the reference frequency for the synthesizer, as well as clocks
for the analog-to-digital converter (ADC) and the digital part. To reduce system cost, the CC1201 device
has high-accuracy frequency estimation and compensation registers to measure and compensate for
crystal inaccuracies. This compensation enables the use of lower cost crystals. If a TCXO is used, the
CC1201 device automatically turns on and off the TCXO when needed to support low-power modes and
Wake-On-Radio operation.
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5.3 Receiver
The CC1201 device features a highly flexible receiver. The received RF signal is amplified by the low-
noise amplifier (LNA) and is down-converted in quadrature (I/Q) to the intermediate frequency (IF). At IF,
the I/Q signals are digitized by the high dynamic-range ADCs.
An advanced automatic gain control (AGC) unit adjusts the front-end gain, and enables the CC1201
device to receive strong and weak signals, even in the presence of strong interferers. High-attenuation
channel and data filtering enable reception with strong neighbor channel interferers. The I/Q signal is
converted to a phase and magnitude signal to support the FSK and OOK modulation schemes.
NOTE
A unique I/Q compensation algorithm removes any problem of I/Q mismatch, thus avoiding
time-consuming and costly I/Q image calibration steps.
5.4 Transmitter
The CC1201 transmitter is based on direct synthesis of the RF frequency (in-loop modulation). To use the
spectrum effectively, the CC1201 device has extensive data filtering and shaping in TX mode to support
high throughput data communication in narrowband channels. The modulator also controls power ramping
to remove issues such as spectral splattering when driving external high-power RF amplifiers.
5.5 Radio Control and User Interface
The CC1201 digital control system is built around the main radio control (MARC), which is implemented
using an internal high-performance, 16-bit ultra-low-power processor. MARC handles power modes, radio
sequencing, and protocol timing.
A 4-wire SPI serial interface is used for configuration, strobe commands, and FIFO access. The digital
baseband includes support for channel configuration, packet handling, and data buffering. The host MCU
can stay in sleep mode until a valid RF packet is received. This greatly reduces power consumption.
When the host MCU receives a valid RF packet, it burst-reads the data. This reduces the required
computing power.
The CC1201 radio control and user interface are based on the widely used CC1101 transceiver. This
relationship enables an easy transition between the two platforms. The command strobes and the main
radio states are the same for the two platforms.
For legacy formats, the CC1201 device also supports two serial modes.
•
Synchronous serial mode: The CC1201 device performs bit synchronization and provides the MCU
with a bit clock with associated data.
•
Transparent mode: The CC1201 device outputs the digital baseband signal using a digital interpolation
filter to eliminate jitter introduced by digital filtering and demodulation.
5.6 Enhanced Wake-On-Radio (eWOR)
eWOR, using a flexible integrated sleep timer, enables automatic receiver polling with no intervention from
the MCU. When the CC1201 device enters RX mode, it listens and then returns to sleep if a valid RF
packet is not received. The sleep interval and duty cycle can be configured to make a trade-off between
network latency and power consumption. Incoming messages are time-stamped to simplify timer re-
synchronization.
The eWOR timer runs off an ultra-low-power RC oscillator. To improve timing accuracy, the RC oscillator
can be automatically calibrated to the RF crystal in configurable intervals.
22
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5.7 RX Sniff Mode
The CC1201 device supports quick start up times, and requires few preamble bits. RX Sniff Mode uses
these conditions to dramatically reduce the current consumption while the receiver is waiting for data.
Because the CC1201 device can wake up and settle much faster than the duration of most preambles, it
is not required to be in RX mode continuously while waiting for a packet to arrive. Instead, the Enhanced
Wake On Radio feature can be used to put the device into sleep mode periodically. By setting an
appropriate sleep time, the CC1201 device can wake up and receive the packet when it arrives with no
performance loss. This sequence removes the need for accurate timing synchronization between
transmitter and receiver, and lets the user trade off current consumption between the transmitter and
receiver.
For more information, see the sniff mode design note (SWRA428).
5.8 Antenna Diversity
Antenna diversity can increase performance in a multipath environment. An external antenna switch is
required. The CC1201 device uses one of the GPIO pins to automatically control the switch. This device
also supports differential output control signals typically used in RF switches.
If antenna diversity is enabled, the GPIO alternates between high and low states until a valid RF input
signal is detected. An optional acknowledge packet can be transmitted without changing the state of the
GPIO.
An incoming RF signal can be validated by received signal strength or by using the automatic preamble
detector. Using the automatic preamble detector ensures a more robust system and avoids the need to
set a defined signal strength threshold (such a threshold sets the sensitivity limit of the system).
Copyright © 2013–2014, Texas Instruments Incorporated
Detailed Description
23
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CC1201
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5.9 WaveMatch
Advanced capture logic locks onto the synchronization word and does not require preamble settling bytes.
Therefore, receiver settling time is reduced to the settling time of the AGC, typically 4 bits.
The WaveMatch feature also greatly reduces false sync triggering on noise, further reducing the power
consumption and improving sensitivity and reliability. The same logic can also be used as a high-
performance preamble detector to reliably detect a valid preamble in the channel.
See swrc046 for more information.
Figure 5-2. Receiver Configurator in SmartRF™ Studio
24
Detailed Description
Copyright © 2013–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: CC1201
CC1201
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ZHCSBX5B –OCTOBER 2013–REVISED OCTOBER 2014
6 Typical Application Circuit
NOTE
This section is intended only as an introduction.
Very few external components are required for the operation of the CC1201 device. Figure 6-1 shows a
typical application circuit. The board layout will greatly influence the performance of the CC1201 device.
Figure 6-1 does not show decoupling capacitors for power pins.
Optional
40 MHz
crystal
XOSC/
TCXO
(optional control pin
from CC1200)
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
LPF1
LPF0
VDD
VDD_GUARD
RESET_N
GPIO3
GPIO2
DVDD
DCPL
SI
AVDD_SYNTH1
DCPL_VCO
LNA_N
VDD
VDD
CC1201
LNA_P
TRX_SW
PA
SCLK
MCU connection
SPI interface and
optional gpio pins
Figure 6-1. Typical Application Circuit
For more information, see the reference designs available for the CC1201 device in 节 7.2,
Documentation Support.
版权 © 2013–2014, Texas Instruments Incorporated
Typical Application Circuit
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7 器件和文档支持
7.1 器件支持
7.1.1 开发支持
7.1.1.1 配置软件
CC1201 器件可使用 SmartRF Studio 软件 (SWRC046) 进行配置。 强烈建议使用 SmartRF Studio 软件来
获取最优寄存器设置并评估相关性能和功能。
7.1.2 器件和支持开发工具命名规则
为了指出产品开发周期所处的阶段，TI 为所有微处理器 (MPU) 和支持工具的产品型号分配了前缀。 每个器
件都具有以下三个前缀中的一个：X、P 或无（无前缀）（例如，CC1201）。 德州仪器 (TI) 建议为其支持
的工具使用三个可用前缀指示符中的两个：TMDX 和 TMDS。 这些前缀代表了产品开发的发展阶段，即从
工程原型 (TMDX) 直到完全合格的生产器件和工具 (TMDS)。
器件开发进化流程：
X
试验器件不一定代表最终器件的电气规范标准并且不可使用生产组装流程。
原型器件不一定是最终芯片模型并且不一定符合最终电气标准规范。
完全合格的芯片模型的生产版本。
P
无
支持工具开发发展流程：
TMDX
TMDS
还未经德州仪器 (TI) 完整内部质量测试的开发支持产品。
完全合格的开发支持产品.
X 和 P 器件和 TMDX 开发支持工具在供货时附带如下免责条款：
“开发的产品用于内部评估用途。”
生产器件和 TMDS 开发支持工具已进行完全特性描述，并且器件的质量和可靠性已经完全论证。 TI 的标准
保修证书适用。
预测显示原型器件（X 或者 P）的故障率大于标准生产器件。 由于它们的预计的最终使用故障率仍未定义，
德州仪器 (TI) 建议不要将这些器件用于任何生产系统。 只有合格的产品器件将被使用。
TI 器件的命名规则也包括一个带有器件系列名称的后缀。 这个后缀表示封装类型（例如，RHB），温度范
围（例如，“空白”是默认的商业级温度范围）以及器件速度范围（以
CC1201 器件完整器件名称的图例。
MHz
为单位），提供了读取任一
要获得
QFN
封装类型的
CC1201
器件订购部件号，请参见本文档的“封装选项附录”（TI
网站
www.ti.com），或者联系您的 TI 销售代表。
26
器件和文档支持
版权 © 2013–2014, Texas Instruments Incorporated
提交文档反馈意见
产品主页链接: CC1201
CC1201
www.ti.com.cn
ZHCSBX5B –OCTOBER 2013–REVISED OCTOBER 2014
7.2 文档支持
以下文档介绍了 CC1201 处理器。 www.ti.com 网站上提供了这些文档的副本。 提示：请在 www.ti.com 上
提供的搜索框中输入文献编号。
SWRR106 CC112x IPC 868MHz 和 915MHz 2 层参考设计
SWRR107 CC112x IPC 868MHz 和 915MHz 4 层参考设计
SWRR122 CC1201EM 420MHz 至 470MHz 参考设计
SWRR121 CC1201EM 868MHz 至 930MHz 参考设计
SWRC046 SmartRF Studio 软件
SWRA428 CC112x/CC120x 嗅探模式应用手册
7.3 社区资源
下列链接提供到 TI 社区资源的连接。 链接的内容由各个分销商“按照原样”提供。 这些内容并不构成 TI 技术
规范和标准且不一定反映 TI 的观点；请见 TI 的使用条款。
TI E2E™ 在线社区 TI 工程师对工程师 (E2E) 社区。 此社区的创建目的是为了促进工程师之间协作。 在
e2e.ti.com 中，您可以咨询问题、共享知识、探索思路，在同领域工程师的帮助下解决问题。
德州仪器 (TI) 嵌入式处理器维基网站 德州仪器 (TI) 嵌入式处理器维基网站。 此网站的建立是为了帮助开发
人员从德州仪器 (TI) 的嵌入式处理器入门并且也为了促进与这些器件相关的硬件和软件的总体
知识的创新和增长。
7.4 商标
SmartRF, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
7.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
7.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、首字母缩略词和定义。
版权 © 2013–2014, Texas Instruments Incorporated
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器件和文档支持
27
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ZHCSBX5B –OCTOBER 2013–REVISED OCTOBER 2014
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8 机械封装和可订购信息
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知
且不对本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
28
机械封装和可订购信息
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提交文档反馈意见
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CC1201RHBR
CC1201RHBT
ACTIVE
ACTIVE
VQFN
VQFN
RHB
RHB
32
32
3000 RoHS & Green NIPDAU | NIPDAUAG Level-3-260C-168 HR
250 RoHS & Green NIPDAU | NIPDAUAG Level-3-260C-168 HR
-40 to 85
-40 to 85
CC1201
CC1201
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
GENERIC PACKAGE VIEW
RHB 32
5 x 5, 0.5 mm pitch
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224745/A
www.ti.com
PACKAGE OUTLINE
RHB0032E
VQFN - 1 mm max height
S
C
A
L
E
3
.
0
0
0
PLASTIC QUAD FLATPACK - NO LEAD
5.1
4.9
B
A
PIN 1 INDEX AREA
(0.1)
5.1
4.9
SIDE WALL DETAIL
20.000
OPTIONAL METAL THICKNESS
C
1 MAX
SEATING PLANE
0.08 C
0.05
0.00
2X 3.5
(0.2) TYP
3.45 0.1
9
EXPOSED
THERMAL PAD
16
28X 0.5
8
17
SEE SIDE WALL
DETAIL
2X
SYMM
33
3.5
0.3
0.2
32X
24
0.1
C A B
C
1
0.05
32
25
PIN 1 ID
(OPTIONAL)
SYMM
0.5
0.3
32X
4223442/B 08/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
RHB0032E
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
3.45)
SYMM
32
25
32X (0.6)
1
24
32X (0.25)
(1.475)
28X (0.5)
33
SYMM
(4.8)
(
0.2) TYP
VIA
8
17
(R0.05)
TYP
9
16
(1.475)
(4.8)
LAND PATTERN EXAMPLE
SCALE:18X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4223442/B 08/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
RHB0032E
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
4X ( 1.49)
(0.845)
(R0.05) TYP
32
25
32X (0.6)
1
24
32X (0.25)
28X (0.5)
(0.845)
SYMM
33
(4.8)
17
8
METAL
TYP
16
9
SYMM
(4.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 33:
75% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:20X
4223442/B 08/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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