CD54AC139_14 [TI]
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS;
| 型号： | CD54AC139_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
| 文件： | 总9页 (文件大小：204K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD54AC139, CD74AC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCHS332 – MARCH 2003
CD54AC139 . . . F PACKAGE
CD74AC139 . . . E OR M PACKAGE
(TOP VIEW)
AC Types Feature 1.5-V to 5.5-V Operation
and Balanced Noise Immunity at 30% of the
Supply Voltage
1G
1A
V
CC
2G
2A
1
2
3
4
5
6
7
8
16
15
14
Buffered Inputs
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
1B
1Y0
1Y1
1Y2
1Y3
GND
13 2B
Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
12
11
10
9
2Y0
2Y1
2Y2
2Y3
Balanced Propagation Delays
±24-mA Output Drive Current
– Fanout to 15 F Devices
SCR-Latchup-Resistant CMOS Process and
Circuit Design
Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
description/ordering information
The’AC139devicesaredual2-lineto4-linedecoders/demultiplexersdesignedfor1.5-Vto5.5-VV operation.
CC
These devices are designed to be used in high-performance memory-decoding or data-routing applications
requiring very short propagation delay times. In high-performance memory systems, these decoders can be
used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable
circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical
access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
The active-low enable (G) input can be used as a data line in demultiplexing applications. These
decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its
driving circuit.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – E
SOIC – M
CDIP – F
Tube
Tube
CD74AC139E
CD74AC139M
CD74AC139E
–55°C to 125°C
AC139M
Tape and reel CD74AC139M96
Tube CD54AC139F3A
CD54AC139F3A
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD54AC139, CD74AC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCHS332 – MARCH 2003
FUNCTION TABLE
(each decoder/demultiplexer)
INPUTS
OUTPUTS
SELECT
G
B
X
L
A
X
L
Y0
H
L
Y1
H
H
L
Y2
H
H
H
L
Y3
H
H
H
H
L
H
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
logic diagram (positive logic)
4
1Y0
1Y1
1Y2
1
1G
5
6
2
1A
Select
Inputs
7
1Y3
3
1B
Data
Outputs
12
2Y0
2Y1
2Y2
15
2G
11
10
14
2A
Select
Inputs
9
2Y3
13
2B
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
CC
I
Input clamp current, I (V < 0 V or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
CC
Output clamp current, I
(V < 0 V or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V > 0 V or V < V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
O
O
CC
O
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
JA
M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD54AC139, CD74AC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCHS332 – MARCH 2003
recommended operating conditions (see Note 3)
–55°C to
125°C
–40°C to
85°C
T
A
= 25°C
UNIT
MIN
1.5
MAX
MIN
1.5
MAX
MIN
1.5
MAX
V
V
Supply voltage
5.5
5.5
5.5
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.5 V
= 3 V
1.2
1.2
1.2
High-level input voltage
2.1
2.1
2.1
V
V
IH
= 5.5 V
= 1.5 V
= 3 V
3.85
3.85
3.85
0.3
0.9
0.3
0.9
0.3
0.9
V
IL
Low-level input voltage
= 5.5 V
1.65
1.65
1.65
V
V
Input voltage
0
0
V
V
0
0
V
0
0
V
V
V
I
CC
CC
CC
Output voltage
V
CC
V
CC
O
CC
I
I
High-level output current
Low-level output current
V
CC
V
CC
V
CC
V
CC
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
= 1.5 V to 3 V
–24
24
–24
24
–24
24
mA
mA
OH
OL
50
50
50
∆t/∆v
Input transition rise or fall rate
ns/V
= 3.6 V to 5.5 V
20
20
20
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
–55°C to
125°C
–40°C to
85°C
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
CC
UNIT
MIN
1.4
MAX
MIN
1.4
MAX
MIN
1.4
MAX
1.5 V
3 V
I
= –50 µA
2.9
2.9
2.9
OH
4.5 V
3 V
4.4
4.4
4.4
V
OH
V = V or V
IH
I
I
I
I
= –4 mA
2.58
3.94
2.4
2.48
3.8
V
I
IL
OH
OH
OH
OH
= –24 mA
= –50 mA
= –75 mA
4.5 V
5.5 V
5.5 V
1.5 V
3 V
3.7
†
†
3.85
3.85
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.44
0.44
–
I
= 50 µA
OL
4.5 V
3 V
0.1
0.1
V
OL
V = V or V
I
I
I
I
= 12 mA
= 24 mA
0.36
0.36
0.5
V
I
IH
IL
OL
OL
OL
OL
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
0.5
†
= 50 mA
= 75 mA
1.65
†
1.65
±1
I
I
V = V
or GND
or GND,
±0.1
8
±1
160
10
µA
µA
pF
I
I
CC
CC
V = V
I
I
O
= 0
80
CC
C
10
10
i
†
Testoneoutputatatime, notexceeding1-secondduration. Measurementismadebyforcingindicatedcurrentandmeasuringvoltagetominimize
power dissipation. Test verifies a minimum 50-Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD54AC139, CD74AC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCHS332 – MARCH 2003
switching characteristics over recommended operating free-air temperature range,
V
= 1.5 V, C = 50 pF (unless otherwise noted) (see Figure 1)
CC
L
–55°C to
125°C
–40°C to
85°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
MIN
MAX
t
t
t
t
131
131
131
131
119
119
119
119
PLH
PHL
PLH
PHL
A or B
G
Any Y
Any Y
C
C
= 50 pF
= 50 pF
ns
ns
L
L
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V, C = 50 pF (unless otherwise noted) (see Figure 1)
CC
L
–55°C to
125°C
–40°C to
85°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
3.7
MAX
MIN
MAX
13.4
13.4
t
t
14.7
14.7
3.9
3.9
PLH
Any Y
Any Y
C
C
= 50 pF
= 50 pF
ns
ns
A or B
G
L
L
3.7
PHL
t
t
3.7
3.7
14.7
14.7
3.9
3.9
13.4
13.4
PLH
PHL
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V, C = 50 pF (unless otherwise noted) (see Figure 1)
CC
L
–55°C to
125°C
–40°C to
85°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
2.6
MAX
MIN
MAX
9.5
t
t
10.5
10.5
2.8
2.8
PLH
PHL
Any Y
Any Y
C
C
= 50 pF
= 50 pF
ns
ns
A or B
G
L
L
2.6
9.5
t
2.6
2.6
10.5
10.5
2.8
2.8
9.5
9.5
PLH
PHL
t
operating characteristics, V
= 5 V, T = 25°C
CC
A
PARAMETER
TYP
UNIT
C
Power dissipation capacitance
83
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD54AC139, CD74AC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCHS332 – MARCH 2003
PARAMETER MEASUREMENT INFORMATION
2 × V
TEST
S1
CC
Open
GND
S1
†
R1 = 500 Ω
t
/t
Open
PLH PHL
From Output
Under Test
t
/t
2 × V
CC
GND
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
†
L
R2 = 500 Ω
(see Note A)
t
w
V
CC
†
When V
= 1.5 V, R1 = R2 = 1 kΩ
CC
Input
50% V
50% V
CC
CC
0 V
LOAD CIRCUIT
VOLTAGE WAVEFORMS
PULSE DURATION
V
CC
Reference
Input
V
CC
50% V
CC
CLR
Input
50% V
CC
0 V
0 V
t
t
h
su
t
rec
V
CC
CC
0 V
Data
Input
90%
90%
V
CC
50%
10%
50% V
10%
50% V
CC
CLK
t
t
f
0 V
r
VOLTAGE WAVEFORMS
RECOVERY TIME
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
V
CC
V
CC
Input
50% V
50% V
CC
CC
Output
Control
50% V
50% V
CC
CC
0 V
0 V
t
t
PLH
PHL
90%
t
t
PLZ
PZL
V
OH
In-Phase
Output
Output
Waveform 1
90%
≈V
CC
50%
10%
50% V
10%
CC
V
50% V
20% V
CC
CC
S1 at 2 × V
(see Note B)
OL
CC
V
OL
t
t
f
r
t
t
PHL
90%
PLH
t
t
PHZ
PZH
V
V
OH
Output
Waveform 2
S1 at GND
90%
Out-of-Phase
Output
50% V
10%
50%
10%
V
OH
CC
80% V
50% V
CC
OL
CC
t
f
t
≈0 V
r
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
Phase relationships between waveforms are arbitrary.
D. For clock inputs, f is measured with the input duty cycle at 50%.
max
E. The outputs are measured one at a time with one input transition per measurement.
F.
G.
H.
t
t
t
and t
and t
and t
are the same as t
.
pd
PLH
PZL
PLZ
PHL
PZH
PHZ
are the same as t
are the same as t
.
en
dis
.
I. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL
MPDI002C – JANUARY 1995 – REVISED DECEMBER 20002
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
DIM
0.775
0.775
0.920
1.060
A MAX
A
(19,69) (19,69) (23,37) (26,92)
16
9
0.745
0.745
0.850
0.940
A MIN
(18,92) (18,92) (21,59) (23,88)
MS-100
VARIATION
0.260 (6,60)
0.240 (6,10)
AA
BB
AC
AD
C
1
8
0.070 (1,78)
0.045 (1,14)
D
0.045 (1,14)
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
D
0.030 (0,76)
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.430 (10,92) MAX
0.021 (0,53)
0.015 (0,38)
0.010 (0,25)
M
14/18 PIN ONLY
20 pin vendor option
D
4040049/E 12/2002
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A).
D. The 20 pin end lead shoulder width is a vendor option, either half or full width.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSOI002B – JANUARY 1995 – REVISED SEPTEMBER 2001
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
0.050 (1,27)
8
0.010 (0,25)
5
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.069 (1,75) MAX
0.004 (0,10)
0.004 (0,10)
PINS **
8
14
16
DIM
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/E 09/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Mailing Address:
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Post Office Box 655303
Dallas, Texas 75265
Copyright 2003, Texas Instruments Incorporated
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