CD74AC04M96E4 [TI]
8 通道、1.5V 至 5.5V 反相器 | D | 14 | -55 to 125;
| 型号： | CD74AC04M96E4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8 通道、1.5V 至 5.5V 反相器 | D | 14 | -55 to 125 栅 光电二极管 逻辑集成电路 触发器 栅极 |
| 文件： | 总6页 (文件大小：34K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD74AC04, CD74ACT04,
CD74AC05, CD74ACT05
Data sheet acquired from Harris Semiconductor
SCHS225
Hex Inverters
September 1998
Features
Description
• CD74AC04, CD74ACT04 . . . . . . . . . . . . Active Outputs The CD74AC04, CD74ACT04, CD74AC05 and CD74ACT05
are hex inverters that utilize the Harris Advanced CMOS
Logic technology.
• CD74AC05, CD74ACT05 . . . . . . . .Open-Drain Outputs
• Buffered Inputs
Ordering Information
• Typical Propagation Delay
o
PART
NUMBER
TEMP.
PKG.
NO.
- 3.5ns at V
CC
= 5V, T = 25 C, C = 50pF
A L
o
RANGE ( C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
14 Ld PDIP
14 Ld PDIP
14 Ld PDIP
14 Ld PDIP
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015
CD74AC04E
CD74ACT04E
CD74AC05E
CD74ACT05E
CD74AC04M
CD74ACT04M
CD74AC05M
CD74ACT05M
NOTES:
E14.3
[ /Title
(CD74
AC04,
CD74
ACT04
,
E14.3
• SCR-Latchup-Resistant CMOS Process and Circuit
Design
E14.3
E14.3
• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption
M14.15
M14.15
M14.15
M14.15
• Balanced Propagation Delays
CD74
AC05,
CD74
ACT05
)
• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
• ±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local sales office or Harris
customer service for ordering information.
- Drives 50Ω Transmission Lines
/Sub-
ject
(Hex
Invert-
ers)
/Autho
r ()
/Key-
words
(Har-
ris
Semi-
con-
ductor,
Advan
ced
Pinout
Functional Diagram
CD74AC04, CD74ACT04, CD74AC05, CD74ACT05
(PDIP, SOIC)
TOP VIEW
2
4
1
3
1Y
2Y
3Y
4Y
5Y
6Y
1A
2A
3A
4A
5A
6A
1A
1Y
1
2
3
4
5
6
7
14 V
CC
6
5
13 6A
12 6Y
11 5A
10 5Y
8
2A
9
2Y
10
12
11
13
3A
3Y
9
8
4A
4Y
GND
GND = 7
= 14
CMOS
,Harris
Semi-
con-
ductor,
Advan
V
CC
TRUTH TABLE
CD74AC/ACT04
INPUT OUTPUT
CD74AC/ACT05
INPUT
OUTPUT
L
H
L
L
Z
L
H
H
Z = High Impedance
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.
Copyright © Harris Corporation 1998
File Number 1945.1
1
CD74AC04, CD74ACT04, CD74AC05, CD74ACT05
Absolute Maximum Ratings
Thermal Information
o
DC Supply Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V Thermal Resistance (Typical, Note 5)
θ
( C/W)
CC
DC Input Diode Current, I
JA
IK
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
For V < -0.5V or V > V
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
OK
For V < -0.5V or V > V
I
I
CC
175
o
DC Output Diode Current, I
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300 C
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
O
O
CC
o
DC Output Source or Sink Current per Output Pin, I
O
For V > -0.5V or V < V
+ 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
O
O
CC
DC V
or Ground Current, I
I
(Note 3) . . . . . . . . .±100mA
CC
CC or GND
Operating Conditions
o
o
Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
A
Supply Voltage Range, V
(Note 4)
CC
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V
I
O
CC
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. For up to 4 outputs per device, add ±25mA for each additional output.
4. Unless otherwise specified, all voltages are referenced to ground.
5. θ is measured with the component mounted on an evaluation PC board in free air.
JA
DC Electrical Specifications
o
o
TEST
CONDITIONS
-40 C TO
-55 C TO
o
25 C
o
o
85 C
125 C
V
CC
PARAMETER
AC TYPES
SYMBOL
V (V)
I
I
(mA)
(V)
MIN
MAX
MIN
MAX
MIN
MAX UNITS
O
High Level Input Voltage
V
-
-
-
1.5
3
1.2
2.1
3.85
-
-
1.2
2.1
3.85
-
-
1.2
2.1
3.85
-
-
V
V
V
V
V
V
V
V
V
V
V
V
IH
-
-
-
5.5
1.5
3
-
-
-
Low Level Input Voltage
V
-
0.3
0.3
0.3
IL
-
0.9
-
0.9
-
0.9
5.5
1.5
3
-
1.65
-
1.65
-
1.65
High Level Output Voltage
(04)
V
V
or V
IH IL
-0.05
1.4
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
1.4
2.9
4.4
2.48
3.8
3.85
-
-
-
-
-
-
1.4
2.9
4.4
2.4
3.7
-
-
-
-
-
-
-
OH
-0.05
-0.05
-4
4.5
3
-24
4.5
5.5
-75
(Note 6, 7)
-50
5.5
-
-
-
-
3.85
-
V
(Note 6, 7)
2
CD74AC04, CD74ACT04, CD74AC05, CD74ACT05
DC Electrical Specifications (Continued)
o
o
TEST
CONDITIONS
-40 C TO
-55 C TO
o
o
o
25 C
MIN
85 C
125 C
V
CC
PARAMETER
SYMBOL
V (V)
I
(mA)
(V)
1.5
3
MAX
0.1
0.1
0.1
0.36
0.36
-
MIN
MAX
MIN
MAX UNITS
I
O
Low Level Output Voltage
V
V
or V
IH IL
0.05
0.05
0.05
12
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.5
0.5
-
V
V
V
V
V
V
OL
4.5
3
0.1
0.44
0.44
1.65
24
4.5
5.5
75
(Note 6, 7)
50
5.5
5.5
5.5
-
-
-
-
±0.1
4
-
-
-
-
-
-
-
1.65
±1
V
(Note 6, 7)
Input Leakage Current
I
V
or
-
±1
40
µA
µA
I
CC
GND
Quiescent Supply Current,
SSI
I
V
GND
or
0
80
CC
CC
ACT TYPES
High Level Input Voltage
V
-
-
-
-
4.5 to
5.5
2
-
-
2
-
-
2
-
-
V
V
IH
Low Level Input Voltage
V
4.5 to
5.5
0.8
0.8
0.8
IL
High Level Output Voltage
(04)
V
V
V
or V
-0.05
-24
4.5
4.5
5.5
5.5
4.5
4.5
5.5
4.4
-
4.4
-
-
4.4
-
V
V
V
V
V
V
V
OH
IH
IH
IL
IL
3.94
-
3.8
3.7
-
-
-75
-
-
-
-
-
-
-
3.85
-
-
-50
-
-
-
-
-
3.85
-
Low Level Output Voltage
V
or V
0.05
24
0.1
0.36
-
0.1
0.44
1.65
-
-
-
0.1
0.5
-
OL
75
(Note 6, 7)
50
5.5
5.5
5.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.65
±1
80
3
V
(Note 6, 7)
Input Leakage Current
I
V
or
-
0
-
±0.1
4
±1
40
2.8
µA
µA
mA
I
CC
GND
Quiescent Supply Current,
SSI
I
V
GND
or
CC
CC
Additional Supply Current per
Input Pin TTL Inputs High
1 Unit Load
∆I
V
4.5 to
5.5
2.4
CC
CC
-2.1
NOTES:
6. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.
o
o
7. Test verifies a minimum 50Ω transmission-line-drive capability at 85 C, 75Ω at 125 C.
ACT Input Load Table
INPUT
UNIT LOAD
nA
0.18
NOTE: Unit load is ∆I limit specified in DC Electrical Specifications
CC
o
Table, e.g., 2.4mA max at 25 C.
3
CD74AC04, CD74ACT04, CD74AC05, CD74ACT05
Switching Specifications Input t , t = 3ns, C = 50pF (Worst Case)
r
f
L
o
o
o
o
-40 C TO 85 C
TYP
-55 C TO 125 C
PARAMETER
AC TYPES
SYMBOL
V
(V)
MIN
MAX
MIN
TYP
MAX
UNITS
CC
Propagation Delay, Input to
Output (CD74AC/ACT04)
t
, t
PLH PHL
1.5
3.3
-
-
-
74
-
-
-
81
ns
ns
2.3
8.3
2.3
9.1
(Note 9)
5
1.7
-
5.9
1.6
-
6.5
ns
(Note 10)
Propagation Delay, High Z to
Output Low (CD74AC/ACT05)
t
t
1.5
3.3
5
-
2.3
1.7
-
-
74
8.3
5.9
94
-
2.3
1.6
-
-
81
9.1
6.5
103
11.5
8.2
10
ns
ns
ns
ns
ns
ns
pF
pF
PZL
-
-
-
-
Propagation Delay, Output Low
to High Z (CD74AC/ACT05)
1.5
3.3
5
-
-
PLZ
3
-
10.4
7.5
10
2.9
2.1
-
-
2.2
-
-
-
-
-
Input Capacitance
C
-
I
Power Dissipation Capacitance
C
-
-
105
-
-
105
-
PD
(Note 11)
ACT TYPES
Propagation Delay, Input to
Output (CD74AC/ACT04)
t
, t
PLH PHL
5
2.4
2.8
2.4
-
-
-
8.5
9.8
8.5
2.3
2.7
2.3
-
-
-
9.3
10.8
9.3
ns
ns
ns
(Note 10)
Propagation Delay, Output Low
to High Z
t
5
PLZ
PZL
Propagation Delay, High Z to
Output Low (CD74AC/ACT05)
t
5
Input Capacitance
C
-
-
-
-
-
10
-
-
-
-
10
-
pF
pF
I
Power Dissipation Capacitance
C
105
105
PD
(Note 11)
NOTES:
8. Limits tested at 100%.
9. 3.3V Min at 3.6V, Max at 3V.
10. 5V Min at 5.5V, Max at 4.5V.
11. C
is used to determine the dynamic power consumption per gate.
PD
AC: P = V
2
f (C
+ C )
D
CC
i
PD
L
2
ACT: P = V
f (C
+ C ) + V
∆I
where f = input frequency, C = output load capacitance, V
= supply voltage.
D
CC
i
PD
L
CC CC
i
L
CC
t
t
f
r
OUTPUT
90%
R
(NOTE)
500Ω
V
L
S
INPUT
GND
DUT
OUTPUT
LOAD
C
L
50pF
OUTPUT
V
S
NOTE: For AC Series Only: When V
Input Level
= 1.5V, R = 1kΩ.
t
t
CC
L
PHL
PLH
CD74AC
CD74ACT
FIGURE 2. WAVEFORMS
V
3V
CC
Input Switching Voltage, V
0.5 V
0.5 V
1.5V
S
CC
CC
Output Switching Voltage, V
0.5 V
CC
S
FIGURE 1. PROPAGATION DELAY TIMES
4
CD74AC04, CD74ACT04, CD74AC05, CD74ACT05
INPUT LEVEL
nA
V
V
S
S
t
PZL
t
PLZ
V
S
nY
20%
OUTPUT
LOW
OUTPUT
OFF
OUTPUT
LOW
500Ω
V
CC
50pF
nA
500Ω
FIGURE 3. PROPAGATION DELAY TIMES AND TEST CIRCUIT
5
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