CD74AC14M96E4 [TI]
HEX SCHMITT-TRIGGER INVERTER; 六角施密特触发器逆变器
| 型号： | CD74AC14M96E4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HEX SCHMITT-TRIGGER INVERTER |
| 文件： | 总8页 (文件大小：248K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀ ꢁꢂ ꢃꢄ ꢀꢅ ꢃ
ꢆꢇꢈ ꢉꢀꢆ ꢊꢋ ꢌꢌꢍꢌ ꢎꢋꢏ ꢏ ꢇꢎ ꢋ ꢐꢑ ꢇ ꢎꢌ ꢇꢎ
SCHS228B − SEPTEMBER 1998 − REVISED MARCH 2004
E OR M PACKAGE
(TOP VIEW)
D
AC Types Feature 1.5-V to 5.5-V Operation
and Balanced Noise Immunity at 30% of the
Supply Voltage
1A
1Y
V
CC
1
2
3
4
5
6
7
14
D
D
D
Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
13 6A
12 6Y
11 5A
2A
Greater Noise Immunity Than Standard
Inverters
2Y
10
9
3A
5Y
4A
4Y
Operates With Much Slower Than Standard
Input Rise and Fall Slew Rates
3Y
8
GND
D
Balanced Propagation Delays
D
24-mA Output Drive Current
− Fanout to 15 F Devices
D
D
SCR Latchup-Resistant CMOS Process and
Circuit Design
Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
description/ordering information
The CD74AC14 contains six independent inverters. This device performs the Boolean function Y = A.
Each circuit functions as an independent inverter, but because of the Schmitt action, the inverters have different
input threshold levels for positive-going (V ) and negative-going (V ) signals.
T+
T−
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − E
SOIC − M
Tube
CD74AC14E
CD74AC14E
−55°C to 125°C
Tube
CD74AC14M
AC14M
Tape and reel
CD74AC14M96
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram, each inverter (positive logic)
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄꢀ ꢅ ꢃ
ꢆ ꢇꢈ ꢉꢀ ꢆ ꢊꢋ ꢌ ꢌꢍꢌ ꢎꢋ ꢏ ꢏꢇ ꢎ ꢋ ꢐꢑ ꢇ ꢎꢌꢇ ꢎ
SCHS228B − SEPTEMBER 1998 − REVISED MARCH 2004
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Package thermal impedance, θ (see Note 2): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
JA
M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
−55°C to
125°C
−40°C to
85°C
T
A
= 25°C
UNIT
MIN
1.5
0
MAX
MIN
1.5
0
MAX
MIN
MAX
V
V
V
Supply voltage
5.5
5.5
1.5
0
5.5
V
V
CC
Input voltage
V
V
V
V
V
V
I
CC
CC
CC
Output voltage
0
0
0
V
O
CC
CC
CC
I
I
High-level output current
Low-level output current
V
V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
−24
24
−24
24
−24
24
mA
mA
OH
CC
OL
CC
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢀꢅ ꢃ
ꢆꢇꢈ ꢉꢀꢆ ꢊꢋ ꢌꢌꢍꢌ ꢎꢋꢏ ꢏ ꢇꢎ ꢋ ꢐꢑ ꢇ ꢎꢌ ꢇꢎ
SCHS228B − SEPTEMBER 1998 − REVISED MARCH 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
−55°C to
125°C
−40°C to
85°C
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
CC
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
V
T+
Positive-going
threshold
5 V
5 V
5 V
2.6
3.4
2.6
3.4
2.4
2.6
3.4
2.4
V
V
V
V
T−
Negative-going
threshold
1.6
0.5
2.4
1.6
0.5
1.6
0.5
∆V
T
Hysteresis
(V − V
)
T−
T+
1.5 V
3 V
1.4
2.9
1.4
2.9
1.4
2.9
I
= −50 µA
OH
4.5 V
3 V
4.4
4.4
4.4
I
I
I
I
= −4 mA
2.58
3.94
2.4
2.48
3.8
V
OH
V = V
I
V
OH
OH
OH
OH
T+
= −24 mA
= −50 mA
= −75 mA
4.5 V
5.5 V
5.5 V
1.5 V
3 V
3.7
†
†
3.85
3.85
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 µA
OL
4.5 V
3 V
0.1
0.1
0.1
I
I
I
I
= 12 mA
= 24 mA
0.36
0.36
0.5
0.44
0.44
V
V = V
I
V
OL
OL
OL
OL
OL
T−
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
0.5
†
= 50 mA
= 75 mA
1.65
†
1.65
1
I
I
V = V
or GND
or GND,
0.1
4
1
80
10
µA
µA
pF
I
I
CC
V = V
I
O
= 0
40
10
CC
I
CC
C
10
i
†
Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize
power dissipation. Test verifies a minimum 50-Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C.
switching characteristics over recommended operating free-air temperature range,
= 5 V 0.5 V, C = 50 pF (unless otherwise noted) (see Figure 1)
V
CC
L
−55°C TO
125°C
−40°C TO
85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
2.6
MAX
MIN
2.7
MAX
t
t
10.5
10.5
9.5
9.5
PLH
A
Y
ns
2.6
2.7
PHL
operating characteristics, V
= 5 V, T = 25°C
CC
A
PARAMETER
TYP
UNIT
C
Power dissipation capacitance
45
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄꢀ ꢅ ꢃ
ꢆ ꢇꢈ ꢉꢀ ꢆ ꢊꢋ ꢌ ꢌꢍꢌ ꢎꢋ ꢏ ꢏꢇ ꢎ ꢋ ꢐꢑ ꢇ ꢎꢌꢇ ꢎ
SCHS228B − SEPTEMBER 1998 − REVISED MARCH 2004
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
TEST
S1
S1
†
R1 = 500 Ω
t
/t
Open
Open
GND
PLH PHL
From Output
Under Test
t
/t
2 × V
CC
GND
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
†
L
R2 = 500 Ω
(see Note A)
t
w
V
CC
†
When V
CC
= 1.5 V, R1 = R2 = 1 kΩ
Input
50% V
50% V
CC
CC
0 V
LOAD CIRCUIT
VOLTAGE WAVEFORMS
PULSE DURATION
V
CC
Reference
Input
V
CC
50% V
CC
CLR
Input
50% V
CC
0 V
0 V
t
t
h
su
t
rec
V
CC
CC
0 V
Data
Input
90%
90%
V
CC
50%
10%
50% V
10%
50% V
CC
CLK
t
t
f
0 V
r
VOLTAGE WAVEFORMS
RECOVERY TIME
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
V
CC
V
CC
Input
50% V
CC
50% V
CC
Output
Control
50% V
50% V
CC
CC
0 V
0 V
t
t
PLH
PHL
90%
t
t
PLZ
PZL
V
OH
In-Phase
Output
Output
Waveform 1
90%
≈V
CC
50%
10%
50% V
10%
CC
V
50% V
CC
20% V
CC
S1 at 2 × V
(see Note B)
OL
CC
V
OL
t
t
f
r
t
t
PHL
90%
PLH
t
t
PHZ
PZH
V
V
OH
Output
Waveform 2
S1 at GND
90%
Out-of-Phase
Output
50% V
10%
50%
10%
V
OH
CC
80% V
50% V
CC
CC
OL
t
f
t
≈0 V
r
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
Phase relationships between waveforms are arbitrary.
D. For clock inputs, f is measured with the input duty cycle at 50%.
max
E. The outputs are measured one at a time, with one input transition per measurement.
F.
G.
H.
t
t
t
and t
and t
and t
are the same as t
.
.
.
PLH
PZL
PLZ
PHL
PZH
PHZ
pd
are the same as t
are the same as t
en
dis
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
17-Oct-2005
PACKAGING INFORMATION
Orderable Device
CD74AC14E
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
N
14
14
14
14
14
14
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
CD74AC14EE4
CD74AC14M
PDIP
SOIC
SOIC
SOIC
SOIC
N
D
D
D
D
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74AC14M96
CD74AC14M96E4
CD74AC14ME4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
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Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
相关型号：
CD74AC151EX
Multiplexer, AC Series, 1-Func, 8 Line Input, 1 Line Output, Complementary Output, CMOS, PDIP16,
GE
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