CD74AC541MG4 [TI]

Non-Inverting Octal Buffer/Line Drivers with 3-State Outputs 20-SOIC -55 to 125;


型号：	CD74AC541MG4
厂家：	TEXAS INSTRUMENTS
描述：	Non-Inverting Octal Buffer/Line Drivers with 3-State Outputs 20-SOIC -55 to 125 驱动光电二极管输出元件逻辑集成电路
文件：	总16页 (文件大小：808K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Data sheet acquired from Harris Semiconductor

SCHS285A – Revised November 1999

The CD54/74AC540, -541, and CD54/74ACT540, -541 octal

buffer/line drivers use the RCA ADVANCED CMOS technology. The

CD54/74AC/ACT540 are inverting 3-state buffers having two

active-LOW output enables. The CD54/74AC/ACT541 are

non-inverting3-statebuffershavingtwoactive-LOWoutputenables.

The CD74AC540, -541, and CD74ACT540, -541 are supplied in

20-lead dual-in-line plastic packages (E suffix) and in 20-lead

dual-in-line small-outline plastic packages (M suffix). Both package

types are operable over the following temperature ranges: Industrial

(–40 to +85°C) and Extended Industrial/Military (–55 to +125°C).

The CD54AC540, -541, and CD54ACT540, -541, available in chip

form (H suffix), are operable over the –55 to +125°C temperature

range.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MAXIMUM RATINGS, Absolute-Maximum Values:

DC SUPPLY-VOLTAGE (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 to 6 V

DC INPUT DIODE CURRENT, I (for V < –0.5 or V > V

+ 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA

(for V < –0.5 or V > V + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA

DC OUTPUT DIODE CURRENT, I

DC OUTPUT SOURCE OR SINK CURRENT per Output Pin, I (for V > –0.5 or V < V

OR GROUND CURRENT (I or I

CC GND

PACKAGE THERMAL IMPEDANCE, θ (see Note 1): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W

+ 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . ±50 mA

DC V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA*

M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W

STORAGE TEMPERATURE (T ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to +150°C

stg

LEAD TEMPERATURE (DURING SOLDERING):

At distance 1/16 ± 1/32 in. (1.59 ± 0.79 mm) from case for 10 s maximum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +265°C

Unit inserted into PC board min. thickness 1/16 in. (1.59 mm) with solder contacting lead tips only . . . . . . . . . . . . . . . . . . . . . . . . +300°C

* For up to 4 outputs per device: add ±25 mA for each additional output.

NOTE 1:

The package thermal impedance is calculated in accordance with JESD 51.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

10-Jun-2014

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(6)

(3)

(4/5)

CD54AC541F3A

CD54ACT540F3A

CD54ACT541F3A

CD74AC540M

ACTIVE

CDIP

SOIC

TBD

A42

N / A for Pkg Type

Level-1-260C-UNLIM

-55 to 125

CD54AC541F3A

ACTIVE

CD54ACT540F3A

CD54ACT541F3A

AC540M

A42

Green (RoHS

& no Sb/Br)

CU NIPDAU

CD74AC540ME4

CD74AC541E

ACTIVE

SOIC

PDIP

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

N / A for Pkg Type

-55 to 125

AC540M

Pb-Free

(RoHS)

CD74AC541E

AC541M

CD74AC541EE4

CD74AC541M

Pb-Free

(RoHS)

N / A for Pkg Type

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

CD74AC541M96

CD74AC541M96E4

CD74AC541M96G4

CD74AC541MG4

2000

Green (RoHS

& no Sb/Br)

AC541M

Green (RoHS

& no Sb/Br)

AC541M

Green (RoHS

& no Sb/Br)

AC541M

Green (RoHS

& no Sb/Br)

AC541M

CD74AC541SM

OBSOLETE

ACTIVE

SSOP

TBD

Call TI

-55 to 125

AC541SM

CD74AC541SM96

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

CD74AC541SM96G4

CD74ACT540E

ACTIVE

SSOP

PDIP

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

N / A for Pkg Type

Level-1-260C-UNLIM

-55 to 125

AC541SM

Pb-Free

(RoHS)

CD74ACT540E

ACT540M

CD74ACT540EE4

CD74ACT540M

Pb-Free

(RoHS)

Green (RoHS

& no Sb/Br)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Jun-2014

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

-55 to 125

Device Marking

Samples

Drawing

Qty

(1)

(2)

(6)

(3)

(4/5)

CD74ACT540M96

CD74ACT540M96G4

CD74ACT540MG4

CD74ACT541E

ACTIVE

SOIC

PDIP

SOIC

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

N / A for Pkg Type

ACT540M

ACTIVE

2000

Green (RoHS

& no Sb/Br)

ACT540M

Green (RoHS

& no Sb/Br)

ACT540M

Pb-Free

(RoHS)

CD74ACT541E

ACT541M

CD74ACT541EE4

CD74ACT541M

Pb-Free

(RoHS)

N / A for Pkg Type

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

CD74ACT541M96

CD74ACT541M96E4

CD74ACT541M96G4

CD74ACT541MG4

2000

Green (RoHS

& no Sb/Br)

ACT541M

Green (RoHS

& no Sb/Br)

ACT541M

Green (RoHS

& no Sb/Br)

ACT541M

Green (RoHS

& no Sb/Br)

ACT541M

CD74ACT541SM

OBSOLETE

ACTIVE

SSOP

TBD

Call TI

-55 to 125

CD74ACT541SM96

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

ACT541SM

CD74ACT541SM96E4

ACTIVE

SSOP

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

-55 to 125

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

10-Jun-2014

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

⁽⁶⁾Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF CD54AC541, CD54ACT540, CD54ACT541, CD74AC541, CD74ACT540, CD74ACT541 :

Catalog: CD74AC541, CD74ACT540, CD74ACT541

•

Military: CD54AC541, CD54ACT540, CD54ACT541

•

NOTE: Qualified Version Definitions:

Catalog - TI's standard catalog product

•

Military - QML certified for Military and Defense Applications

•

Addendum-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

CD74AC541M96

CD74AC541SM96

CD74ACT540M96

CD74ACT541M96

CD74ACT541SM96

SOIC

SSOP

SOIC

SSOP

2000

330.0

24.4

16.4

24.4

16.4

10.8

8.2

13.0

7.5

2.7

2.5

2.7

2.5

12.0

24.0

16.0

24.0

16.0

10.8

8.2

13.0

7.5

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

CD74AC541M96

CD74AC541SM96

CD74ACT540M96

CD74ACT541M96

CD74ACT541SM96

SOIC

SSOP

SOIC

SSOP

2000

367.0

45.0

38.0

45.0

38.0

Pack Materials-Page 2

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38

0,22

0,65

0,15

0,25

0,09

5,60

5,00

8,20

7,40

Gage Plane

0,25

0°–ā8°

0,95

0,55

Seating Plane

0,10

2,00 MAX

0,05 MIN

PINS **

DIM

6,50

5,90

6,50

5,90

7,50

8,50

7,90

10,50

9,90

10,50 12,90

A MAX

A MIN

6,90

9,90

12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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CD74AC541MG4 [TI]

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