CD74HC08-Q1 [TI]
QUADRUPLE 2-INPUT POSITIVE-AND GATE; 四路2输入正与门
| 型号： | CD74HC08-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE 2-INPUT POSITIVE-AND GATE |
| 文件： | 总7页 (文件大小：151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD74HC08-Q1
QUADRUPLE 2-INPUT POSITIVE-AND GATE
SCLS512A − JULY 2003 − REVISED FEBRUARY 2008
D
D
Qualified for Automotive Applications
D
D
D
2-V to 6-V V Operation
CC
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
High Noise Immunity N or N = 30% of
IL
IH
V at V = 5 V
CC CC
CMOS Input Compatibility, I ≤ 1 µA at V
,
l
OL
D
D
D
Buffered Inputs
V
OH
Typical Propagation Delay 7 ns
at V = 5 V, C = 15 pF, T = 25°C
M PACKAGE
(TOP VIEW)
CC
L
A
Fanout (Over Temperature Range)
− Standard Outputs . . . 10 LSTTL Loads
− Bus Driver Outputs . . . 15 LSTTL Loads
1
2
3
4
5
6
7
1A
1B
1Y
2A
2B
VCC
13 4B
12
11
10
9
14
D
D
D
Extended Temperature Performance of
−40°C to 125°C
Balanced Propagation Delay and Transition
Times
4A
4Y
3B
3A
3Y
2Y
GND
Significant Power Reduction, Compared to
LSTTL Logic ICs
8
description/ordering information
The CD74HC08 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL
gates, with the low power consumption of standard CMOS integrated circuits. The device can drive 10 LSTTL
loads.
†
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
T
A
PACKAGE
−40°C to 125°C
SOIC − M
Tape and reel
CD74HC08QM96Q1
HC08Q
†
‡
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at http://www.ti.com.
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
H
X
L
H
L
H
L
L
X
logic diagram (positive logic)
A
B
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC08-Q1
QUADRUPLE 2-INPUT POSITIVE-AND GATE
SCLS512A − JULY 2003 − REVISED FEBRUARY 2008
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input clamp current, I (V < −0.5 V or V > V + 0.5 V) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
I
CC
Output clamp current, I (V < −0.5 V or V > V + 0.5 V) (see Note 1) . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O
O
CC
Continuous output current, I (V > −0.5 or V < V + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
O
O
O
CC
Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
CC
Package thermal impedance, θ (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180°C/W
JA
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Lead temperature (during soldering):
At distance 1/16 1/32 inch (1,59 0,79 mm) from case for 10 s max . . . . . . . . . . . . . . . . . . . . . . . 300°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN NOM
MAX
UNIT
V
Supply voltage
2
1.5
5
6
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
= 4.5 V
= 6 V
3.15
4.2
V
High-level input voltage
V
V
= 2 V
0.5
1.35
1.8
= 4.5 V
= 6 V
V
IL
Low-level input voltage
V
V
Input voltage
0
0
V
CC
V
CC
V
V
I
Output voltage
O
V
CC
V
CC
V
CC
= 2 V
1000
500
400
125
= 4.5 V
= 6 V
∆t/∆v
Input transition rise/fall time
ns
T
A
Operating free-air temperature
−40
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC08-Q1
QUADRUPLE 2-INPUT POSITIVE-AND GATE
SCLS512A − JULY 2003 − REVISED FEBRUARY 2008
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
CD74HC08-Q1
I
O
PARAMETER
TEST CONDITIONS
V
UNIT
CC
(mA)
MIN
1.9
TYP
MAX
MIN
1.9
4.4
5.9
3.7
5.2
MAX
−0.02
2 V
−0.02 4.5 V
4.4
CMOS loads
−0.02
−4
6 V
4.5 V
6 V
5.9
V
V
V = V or V
V
OH
I
IH
IL
3.98
5.48
TTL loads
CMOS loads
TTL loads
−5.2
0.02
0.02
0.02
4
2 V
0.1
0.1
0.1
0.26
0.26
0.1
2
0.1
0.1
0.1
0.4
0.4
1
4.5 V
6 V
V = V or V
V
OL
I
IH
IL
4.5 V
6 V
5.2
I
I
V = V or GND
6 V
µA
µA
pF
I
CC
I
V = V or GND
0
6 V
40
10
CC
I
CC
C
10
i
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
T = 25°C
A
CD74HC08-Q1
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
CONDITIONS
V
UNIT
CC
MIN
TYP
MAX
90
MIN
MAX
135
27
2 V
4.5 V
6 V
18
C = 50 pF
L
t
pd
A or B
Y
Y
ns
15
23
C = 15 pF
5 V
7
L
2 V
75
15
13
110
22
t
t
C = 50 pF
4.5 V
6 V
ns
L
19
operating characteristics, TA = 25°C, VCC = 5V
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance per gate (see Note 4)
No load
37
pF
pd
NOTE 4:
C
is used to determine the dynamic power consumption, per gate.
pd
2
P
D
= V
f (C + C )
CC
I
pd
L
f = input frequency
I
C = output load capacitance
L
V
CC
= supply voltage
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC08-Q1
QUADRUPLE 2-INPUT POSITIVE-AND GATE
SCLS512A − JULY 2003 − REVISED FEBRUARY 2008
PARAMETER MEASUREMENT INFORMATION
V
CC
From Output
Under Test
Test
Point
Input
50%
50%
0 V
C = 50 pF
(see Note A)
L
t
t
PHL
PLH
V
V
OH
In-Phase
Output
90%
t
90%
50%
10%
50%
10%
LOAD CIRCUIT
OL
t
r
f
f
t
t
PLH
PHL
V
CC
V
V
OH
90%
t
90%
Input
50%
10%
50%
10%
90%
90%
t
Out-of-Phase
Output
50%
10%
50%
10%
0 V
OL
t
r
f
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. C includes probe and test-fixture capacitance.
L
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
D. and t are the same as t
t
.
pd
PLH
PHL
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
15-Mar-2010
PACKAGING INFORMATION
Orderable Device
CD74HC08QM96G4Q1
CD74HC08QM96Q1
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
14
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
14
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF CD74HC08-Q1 :
Catalog: CD74HC08
Enhanced Product: CD74HC08-EP
Military: CD54HC08
•
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Enhanced Product - Supports Defense, Aerospace and Medical Applications
Military - QML certified for Military and Defense Applications
•
•
•
Addendum-Page 1
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