概述
规格参数
数据手册
替代型号CD74HC27E 概述
High Speed CMOS Logic Triple 3-Input NOR Gate 高速CMOS逻辑三路3输入或非门 逻辑芯片 栅极
CD74HC27E 规格参数
| 是否Rohs认证： | 符合 | 生命周期： | Active |
| 零件包装代码： | DIP | 包装说明： | DIP, DIP14,.3 |
| 针数： | 14 | Reach Compliance Code： | compliant |
| ECCN代码： | EAR99 | HTS代码： | 8542.39.00.01 |
| Factory Lead Time： | 6 weeks | 风险等级： | 1.36 |
| Is Samacsys： | N | 系列： | HC/UH |
| JESD-30 代码： | R-PDIP-T14 | JESD-609代码： | e4 |
| 长度： | 19.3 mm | 负载电容（CL）： | 50 pF |
| 逻辑集成电路类型： | NOR GATE | 最大I（ol）： | 0.0052 A |
| 功能数量： | 3 | 输入次数： | 3 |
| 端子数量： | 14 | 最高工作温度： | 125 °C |
| 最低工作温度： | -55 °C | 封装主体材料： | PLASTIC/EPOXY |
| 封装代码： | DIP | 封装等效代码： | DIP14,.3 |
| 封装形状： | RECTANGULAR | 封装形式： | IN-LINE |
| 包装方法： | TUBE | 峰值回流温度（摄氏度）： | NOT SPECIFIED |
| 电源： | 2/6 V | 最大电源电流（ICC）： | 0.04 mA |
| Prop。Delay @ Nom-Sup： | 29 ns | 传播延迟（tpd）： | 145 ns |
| 认证状态： | Not Qualified | 施密特触发器： | NO |
| 座面最大高度： | 5.08 mm | 子类别： | Gates |
| 最大供电电压 (Vsup)： | 6 V | 最小供电电压 (Vsup)： | 2 V |
| 标称供电电压 (Vsup)： | 4.5 V | 表面贴装： | NO |
| 技术： | CMOS | 温度等级： | MILITARY |
| 端子面层： | Nickel/Palladium/Gold (Ni/Pd/Au) | 端子形式： | THROUGH-HOLE |
| 端子节距： | 2.54 mm | 端子位置： | DUAL |
| 处于峰值回流温度下的最长时间： | NOT SPECIFIED | 宽度： | 6.35 mm |
| Base Number Matches： | 1 |
CD74HC27E 数据手册
通过下载CD74HC27E数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载CD74HC27,
CD74HCT27
Data sheet acquired from Harris Semiconductor
SCHS132
High Speed CMOS Logic
Triple 3-Input NOR Gate
August 1997
Features
Description
• Buffered Inputs
The Harris CD74HC27, CD74HCT27, logic gates utilize
silicon gate CMOS technology to achieve operating speeds
similar to LSTTL gates with the low power consumption of
standard CMOS integrated circuits. All devices have the
ability to drive 10 LSTTL loads. The 74HCT logic family is
functionally pin compatible with the standard 74LS logic
family.
• Typical Propagation Delay: 7ns at V
o
= 5V,
[ /Title
(CD74
HC27,
CD74
HCT27
)
/Sub-
ject
(High
Speed
CMOS
Logic
CC
C = 15pF, T = 25 C
L
A
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
Ordering Information
TEMP. RANGE
PKG.
NO.
o
PART NUMBER
CD74HC27E
CD74HCT27E
CD74HC27M
CD74HCT27M
NOTES:
( C)
PACKAGE
14 Ld PDIP
14 Ld PDIP
14 Ld SOIC
14 Ld SOIC
• Significant Power Reduction Compared to LSTTL
Logic ICs
-55 to 125
-55 to 125
-55 to 125
-55 to 125
E14.3
• HC Types
E14.3
- 2V to 6V Operation
M14.15
M14.15
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
2. Die for this part number is available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
Pinout
CD74HC27, CD74HCT27
(PDIP, SOIC)
TOP VIEW
1A
1B
1
2
3
4
5
6
7
14 V
CC
13 1C
12 1Y
11 3C
10 3B
2A
2B
2C
2Y
9
8
3A
3Y
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
File Number 1648.1
Copyright © Harris Corporation 1997
1
CD74HC27, CD74HCT27
Functional Diagram
14
13
12
11
10
9
1
2
3
4
5
6
7
V
1A
1B
CC
1C
1Y
3C
3B
3A
3Y
2A
2B
2C
2Y
8
GND
TRUTH TABLE
INPUTS
OUTPUT
nA
L
nB
L
nC
L
nY
H
L
L
L
H
L
L
H
L
L
H
H
L
L
L
H
H
L
L
L
H
H
H
L
H
H
L
H
L
NOTE: H = High Voltage Level, L = Low Voltage Level
Logic Symbol
nA
nY
nB
nC
2
CD74HC27, CD74HCT27
Absolute Maximum Ratings
Thermal Information
o
DC Supply Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
Thermal Resistance (Typical, Note 3)
θ
( C/W)
CC
DC Input Diode Current, I
For V < -0.5V or V > V
JA
IK
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
180
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
OK
For V < -0.5V or V > V
I
I
CC
o
DC Output Diode Current, I
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
O
O
CC
o
DC Output Source or Sink Current per Output Pin, I
O
For V > -0.5V or V < V
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
O
O
CC
(SOIC - Lead Tips Only)
DC V
or Ground Current, I
I
. . . . . . . . . . . . . . . . . .±50mA
CC
CC or GND
Operating Conditions
o
o
Temperature Range (T ) . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
A
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V
I
O
CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θ is measured with the component mounted on an evaluation PC board in free air.
JA
DC Electrical Specifications
TEST
CONDITIONS
o
o
o
o
o
25 C
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
HC TYPES
SYMBOL V (V)
I
(mA)
V
(V) MIN TYP MAX
MIN
MAX
MIN
MAX
UNITS
I
O
CC
High Level Input
Voltage
V
-
-
-
2
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.5
-
1.5
-
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
IH
4.5
3.15
-
-
3.15
-
-
3.15
6
2
4.2
4.2
4.2
-
Low Level Input
Voltage
V
-
-
0.5
1.35
1.8
-
-
0.5
1.35
1.8
-
-
0.5
1.35
1.8
-
IL
4.5
6
-
-
-
-
-
-
High Level Output
Voltage
CMOS Loads
V
V
or
-0.02
2
1.9
1.9
1.9
OH
IH
V
IL
-0.02
-0.02
-
4.5
6
4.4
-
4.4
-
4.4
-
5.9
-
5.9
-
5.9
-
High Level Output
Voltage
TTL Loads
-
-
-
-
-
-
-
-4
4.5
6
3.98
-
3.84
-
3.7
-
-5.2
0.02
0.02
0.02
-
5.48
-
5.34
-
5.2
-
Low Level Output
Voltage
CMOS Loads
V
V
or
2
-
-
-
-
-
-
-
0.1
0.1
0.1
-
-
-
-
-
-
-
-
0.1
0.1
0.1
-
-
-
-
-
-
-
-
0.1
0.1
0.1
-
OL
IH
V
IL
4.5
6
Low Level Output
Voltage
TTL Loads
-
4
4.5
6
0.26
0.26
±0.1
0.33
0.33
±1
0.4
0.4
±1
5.2
-
Input Leakage
Current
I
V
or
6
I
CC
GND
3
CD74HC27, CD74HCT27
DC Electrical Specifications (Continued)
TEST
o
o
o
o
o
CONDITIONS
25 C
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
SYMBOL V (V)
I
(mA)
V
(V) MIN TYP MAX
MIN
MAX
MIN
MAX
UNITS
I
O
CC
Quiescent Device
Current
I
V
GND
or
0
6
-
-
2
-
20
-
40
µA
CC
CC
HCT TYPES
High Level Input
Voltage
V
-
-
-
-
4.5 to
5.5
2
-
-
-
-
-
0.8
-
2
-
-
0.8
-
2
-
-
0.8
-
V
V
V
IH
Low Level Input
Voltage
V
4.5 to
5.5
IL
High Level Output
Voltage
CMOS Loads
V
V
or
IH
-0.02
4.5
4.5
4.5
4.5
5.5
5.5
4.4
4.4
4.4
OH
V
IL
High Level Output
Voltage
TTL Loads
-4
3.98
-
-
-
-
3.84
-
3.7
-
V
V
Low Level Output
Voltage
CMOS Loads
V
V
or
IH
0.02
4
-
-
-
0.1
-
-
-
0.1
0.33
±1
-
-
-
0.1
0.4
±1
OL
V
IL
Low Level Output
Voltage
TTL Loads
0.26
±0.1
V
Input Leakage
Current
I
V
0
µA
I
CC
and
GND
Quiescent Device
Current
I
V
or
0
-
-
-
-
2
-
-
20
-
-
40
µA
µA
CC
CC
GND
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
(Note 4)
∆I
CC
V
4.5 to
5.5
100
360
450
490
CC
-2.1
NOTE:
4. For dual-supply systems theorectical worst case (V = 2.4V, V
I
= 5.5V) specification is 1.8mA.
CC
HCT Input Loading Table
INPUT
All
UNIT LOADS
1.5
NOTE: Unit Load is ∆I
Specifications table, e.g. 360µA max at 25 C.
limit specified in DC Electrical
o
CC
Switching Specifications Input t , t = 6ns
r
f
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
TEST
V
CC
PARAMETER
HC TYPES
SYMBOL CONDITIONS (V)
MIN TYP MAX
MIN
MAX
MIN
MAX
UNITS
Propagation Delay, Input to
Output (Figure 1)
t
, t
PLH PHL
C = 50pF
2
4.5
6
-
-
-
-
-
-
95
19
16
-
-
-
-
-
120
24
20
-
-
-
-
-
145
29
25
-
ns
ns
ns
ns
L
-
Propagation Delay, Data Input to
Output Y
t , t
PLH PHL
C = 15pF
5
7
L
4
CD74HC27, CD74HCT27
Switching Specifications Input t , t = 6ns (Continued)
r
f
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
TEST
V
CC
PARAMETER
SYMBOL CONDITIONS (V)
MIN TYP MAX
MIN
MAX
95
19
16
10
-
MIN
MAX
110
22
UNITS
ns
Transition Times (Figure 1)
t
, t
TLH THL
C = 50pF
L
2
4.5
6
-
-
-
-
-
-
-
75
15
13
10
-
-
-
-
-
-
-
-
-
-
-
ns
-
19
ns
Input Capacitance
C
-
-
-
-
10
pF
I
Power Dissipation Capacitance
(Notes 5, 6)
C
5
26
-
pF
PD
HCT TYPES
Propagation Delay, Input to
Output (Figure 2)
t
, t
PLH PHL
C = 50pF
4.5
5
-
-
-
23
-
-
-
29
-
-
-
35
-
ns
ns
L
Propagation Delay, Data Input to
Output Y
t , t
PLH PHL
C = 15pF
9
L
Transition Times (Figure 2)
Input Capacitance
t
, t
TLH THL
C = 50pF
L
4.5
-
-
-
-
-
-
15
10
-
-
-
-
19
10
-
-
-
-
22
10
-
ns
pF
pF
C
-
-
I
Power Dissipation Capacitance
(Notes 5, 6)
C
5
28
PD
NOTES:
5. C
is used to determine the dynamic power consumption, per gate.
2
PD
6. P = V
f (C
PD
+ C ) where f = input frequency, C = output load capacitance, V = supply voltage.
CC
D
CC
i
L
i
L
Test Circuits and Waveforms
t = 6ns
f
t = 6ns
t = 6ns
t = 6ns
r
r
f
V
3V
CC
90%
50%
10%
2.7V
1.3V
0.3V
INPUT
INPUT
GND
GND
t
t
t
t
THL
TLH
THL
TLH
90%
1.3V
90%
50%
10%
INVERTING
OUTPUT
INVERTING
OUTPUT
10%
t
t
PLH
PHL
t
t
PLH
PHL
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
5
6
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
CD74HC27E CAD模型
引脚图
封装焊盘图
CD74HC27E 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| CD74HC27EE4 | TI | High-Speed CMOS Logic Triple 3-Input NOR Gate | 类似代替 |
|
| 74HC27N | NXP | Triple 3-input NOR gate | 功能相似 |
|
| M74HC27B1R | STMICROELECTRONICS | TRIPLE 3-INPUT NOR GATE | 功能相似 |
|
CD74HC27E 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| CD74HC27EE4 | TI | High-Speed CMOS Logic Triple 3-Input NOR Gate | 获取价格 |
|
| CD74HC27EN | ETC | Logic IC | 获取价格 |
|
| CD74HC27EX | RENESAS | IC,LOGIC GATE,3 3-INPUT NOR,HC-CMOS,DIP,14PIN,PLASTIC | 获取价格 |
|
| CD74HC27F | ETC | Logic IC | 获取价格 |
|
| CD74HC27H | ETC | Triple 3-input NOR Gate | 获取价格 |
|
| CD74HC27M | TI | High Speed CMOS Logic Triple 3-Input NOR Gate | 获取价格 |
|
| CD74HC27M96 | TI | High-Speed CMOS Logic Triple 3-Input NOR Gate | 获取价格 |
|
| CD74HC27M96E4 | TI | High-Speed CMOS Logic Triple 3-Input NOR Gate | 获取价格 |
|
| CD74HC27M96G4 | TI | HC/UH SERIES, TRIPLE 3-INPUT NOR GATE, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14 | 获取价格 |
|
| CD74HC27ME4 | TI | High-Speed CMOS Logic Triple 3-Input NOR Gate | 获取价格 |
|
CD74HC27E 相关文章
Bourns 密封通孔金属陶瓷微调电位计产品选型手册(英文版)
- 2024-09-20
- 6
Bourns 精密环境传感器产品选型手册(英文版)
- 2024-09-20
- 9
Bourns POWrTher 负温度系数(NTC)热敏电阻手册 (英文版)
- 2024-09-20
- 8
Bourns GMOV 混合过压保护组件产品选型手册(英文版)
- 2024-09-20
- 6
