概述
规格参数
数据手册
替代型号CD74HCT151M96G4 概述
High-Speed CMOS Logic 8-Input Multiplexer 高速CMOS逻辑8输入多路复用器 多工器 复用器/解复用器
CD74HCT151M96G4 规格参数
| 是否无铅： | 不含铅 | 是否Rohs认证： | 符合 |
| 生命周期： | Active | 零件包装代码： | SOIC |
| 包装说明： | SOP, SOP16,.25 | 针数： | 16 |
| Reach Compliance Code： | compliant | HTS代码： | 8542.39.00.01 |
| Factory Lead Time： | 6 weeks | 风险等级： | 5.26 |
| 系列： | HCT | JESD-30 代码： | R-PDSO-G16 |
| JESD-609代码： | e4 | 长度： | 9.9 mm |
| 负载电容（CL）： | 50 pF | 逻辑集成电路类型： | MULTIPLEXER |
| 最大I（ol）： | 0.004 A | 湿度敏感等级： | 1 |
| 位数： | 8 | 功能数量： | 1 |
| 输入次数： | 8 | 输出次数： | 1 |
| 端子数量： | 16 | 最高工作温度： | 125 °C |
| 最低工作温度： | -55 °C | 输出极性： | COMPLEMENTARY |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | SOP |
| 封装等效代码： | SOP16,.25 | 封装形状： | RECTANGULAR |
| 封装形式： | SMALL OUTLINE | 包装方法： | TR |
| 峰值回流温度（摄氏度）： | 260 | 电源： | 5 V |
| 最大电源电流（ICC）： | 0.08 mA | Prop。Delay @ Nom-Sup： | 48 ns |
| 传播延迟（tpd）： | 57 ns | 认证状态： | Not Qualified |
| 座面最大高度： | 1.75 mm | 子类别： | Multiplexer/Demultiplexers |
| 最大供电电压 (Vsup)： | 5.5 V | 最小供电电压 (Vsup)： | 4.5 V |
| 标称供电电压 (Vsup)： | 5 V | 表面贴装： | YES |
| 技术： | CMOS | 温度等级： | MILITARY |
| 端子面层： | Nickel/Palladium/Gold (Ni/Pd/Au) | 端子形式： | GULL WING |
| 端子节距： | 1.27 mm | 端子位置： | DUAL |
| 处于峰值回流温度下的最长时间： | NOT SPECIFIED | 宽度： | 3.91 mm |
| Base Number Matches： | 1 |
CD74HCT151M96G4 数据手册
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PDF下载CD54HC151, CD74HC151,
CD54HCT151, CD74HCT151
Data sheet acquired from Harris Semiconductor
SCHS150C
High-Speed CMOS Logic
8-Input Multiplexer
September 1997 - Revised October 2003
Features
Description
• Complementary Data Outputs
• Buffered Inputs and Outputs
The ’HC151 and ’HCT151 are single 8-channel digital
multiplexers having three binary control inputs, S0, S1 and
S2 and an active low enable (E) input. The three binary
signals select 1 of 8 channels. Outputs are both inverting (Y)
and non-inverting (Y).
[ /Title
(CD74H
C151,
CD74H
CT151)
/Subject
(High
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Ordering Information
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
o
PART NUMBER
CD54HC151F3A
CD54HCT151F3A
CD74HC151E
TEMP. RANGE ( C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
• Significant Power Reduction Compared to LSTTL
Logic ICs
Speed
CMOS
Logic 8-
Input
• Alternate Source is Philips/Signetics
• HC Types
CD74HC151M
- 2V to 6V Operation
Multi-
CD74HC151MT
CD74HC151M96
CD74HCT151E
CD74HCT151M
CD74HCT151MT
CD74HCT151M96
- High Noise Immunity: N = 30%, N = 30%of V
IL IH
at
CC
V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
Pinout
CD54HC151, CD54HCT151
(CERDIP)
CD74HC151, CD74HCT151
(PDIP, SOIC)
TOP VIEW
I
I
I
I
1
2
3
4
5
6
7
8
16 V
CC
3
2
1
0
15 I
14 I
13 I
12 I
4
5
6
7
Y
Y
11 S0
10 S1
E
9
S2
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1
CD54HC151, CD74HC151, CD54HCT151, CD74HCT151
Functional Diagram
4
3
I
I
I
I
I
I
I
I
0
1
2
3
4
5
6
7
2
5
6
1
Y
Y
15
14
13
12
11
10
9
S
S
S
0
1
2
GND = 8
= 16
7
V
CC
E
TRUTH TABLE
DATA INPUTS
SELECT INPUTS
ENABLE
OUTPUT
S2
S1
X
L
S0
I0
X
L
I1
X
X
X
L
I2
I3
X
X
X
X
X
X
X
L
I4
X
X
X
X
X
X
X
X
X
L
I5
X
X
X
X
X
X
X
X
X
X
X
L
I6
X
X
X
X
X
X
X
X
X
X
X
X
X
L
I7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
E
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Y
Y
L
X
L
X
L
X
X
X
X
X
L
H
H
L
L
L
L
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
L
L
L
H
H
L
H
L
L
L
H
X
X
X
X
X
X
X
X
X
X
X
X
H
L
L
H
H
H
H
L
H
L
L
L
H
X
X
X
X
X
X
X
X
X
X
H
L
L
H
H
L
H
L
L
H
X
X
X
X
X
X
X
X
H
L
H
H
H
H
H
H
H
H
H
L
L
L
H
X
X
X
X
X
X
H
L
L
H
H
L
H
L
L
H
X
X
X
X
H
L
H
H
H
H
H
L
L
H
X
X
H
L
H
H
H
L
H
H
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care
2
CD54HC151, CD74HC151, CD54HCT151, CD74HCT151
Absolute Maximum Ratings
Thermal Information
o
DC Supply Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
Thermal Resistance (Typical, Note 1)
θ
( C/W)
JA
CC
DC Input Diode Current, I
For V < -0.5V or V > V
IK
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
OK
For V < -0.5V or V > V
I
I
CC
o
DC Output Diode Current, I
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
O
O
CC
o
DC Output Source or Sink Current per Output Pin, I
O
For V > -0.5V or V < V
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
O
O
CC
(SOIC - Lead Tips Only)
DC V
or Ground Current, I
I
. . . . . . . . . . . . . . . . . .±50mA
CC
CC or GND
Operating Conditions
o
o
Temperature Range (T ) . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
A
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V
I
O
CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
TEST
CONDITIONS
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
V
CC
PARAMETER
HC TYPES
SYMBOL
V (V)
I
I
(mA)
(V)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
O
High Level Input
Voltage
V
-
-
-
2
4.5
6
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.5
-
1.5
-
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
IH
3.15
-
-
3.15
-
-
3.15
4.2
4.2
4.2
-
Low Level Input
Voltage
V
-
2
-
0.5
1.35
1.8
-
-
0.5
1.35
1.8
-
-
0.5
1.35
1.8
-
IL
4.5
6
-
-
-
-
-
-
High Level Output
Voltage
CMOS Loads
V
V
or V
IH IL
-0.02
2
1.9
1.9
1.9
OH
-0.02
-0.02
-
4.5
6
4.4
-
4.4
-
4.4
-
5.9
-
5.9
-
5.9
-
High Level Output
Voltage
TTL Loads
-
-
-
-
-
-
-
-4
4.5
6
3.98
-
3.84
-
3.7
-
-5.2
0.02
0.02
0.02
-
5.48
-
5.34
-
5.2
-
Low Level Output
Voltage
CMOS Loads
V
V
or V
IH IL
2
-
-
-
-
-
-
-
0.1
0.1
0.1
-
-
-
-
-
-
-
-
0.1
0.1
0.1
-
-
-
-
-
-
-
-
0.1
0.1
0.1
-
OL
4.5
6
Low Level Output
Voltage
TTL Loads
-
4
4.5
6
0.26
0.26
±0.1
0.33
0.33
±1
0.4
0.4
±1
5.2
-
Input Leakage
Current
I
V
or
6
I
CC
GND
Quiescent Device
Current
I
V
GND
or
0
6
-
-
8
-
80
-
160
µA
CC
CC
3
CD54HC151, CD74HC151, CD54HCT151, CD74HCT151
DC Electrical Specifications (Continued)
TEST
CONDITIONS
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
V
CC
PARAMETER
HCT TYPES
SYMBOL
V (V)
I
I
(mA)
(V)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
O
High Level Input
Voltage
V
-
-
-
-
4.5 to
5.5
2
-
-
-
-
-
0.8
-
2
-
-
0.8
-
2
-
-
0.8
-
V
V
V
IH
Low Level Input
Voltage
V
4.5 to
5.5
IL
High Level Output
Voltage
CMOS Loads
V
V
V
or V
-0.02
4.5
4.5
4.5
4.5
4.4
4.4
4.4
OH
IH
IH
IL
High Level Output
Voltage
TTL Loads
-4
3.98
-
-
-
-
3.84
-
3.7
-
V
V
V
Low Level Output
Voltage
CMOS Loads
V
or V
0.02
4
-
-
0.1
0.26
-
-
0.1
0.33
-
-
0.1
0.4
OL
IL
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
I
V
and
0
0
-
5.5
5.5
-
-
-
±0.1
8
-
-
-
±1
80
-
-
-
±1
µA
µA
µA
I
CC
GND
Quiescent Device
Current
I
V
or
-
160
490
CC
CC
GND
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I
CC
(Note 2)
V
4.5 to
5.5
100
360
450
CC
-2.1
NOTE:
2. For dual-supply systems theoretical worst case (V = 2.4V, V
I
= 5.5V) specification is 1.8mA.
CC
HCT Input Loading Table
INPUT
Select
UNIT LOADS
1.5
0.45
0.3
Data
Enable
NOTE: Unit Load is ∆I
360µA max at 25 C.
limit specified in DC Electrical Table, e.g.,
CC
o
Switching Specifications Input t , t = 6ns
r
f
o
o
-40 C TO
-55 C TO
o
o
o
25 C
85 C
125 C
TEST
SYMBOL CONDITIONS
PARAMETER
HC TYPES
V
(V) MIN
TYP
MAX
MIN
MAX
MIN
MAX UNITS
CC
Propagation Delay (Figure 1)
Any Data Input to Y
t
t
C = 50pF
2
-
-
-
170
34
-
-
-
-
-
215
43
-
-
-
-
-
255
51
-
ns
ns
ns
ns
PLH, PHL
L
4.5
5
-
-
-
C =15pF
14
-
L
C = 50pF
6
29
37
43
L
4
CD54HC151, CD74HC151, CD54HCT151, CD74HCT151
Switching Specifications Input t , t = 6ns (Continued)
r
f
o
o
-40 C TO
-55 C TO
o
o
o
25 C
85 C
125 C
TEST
PARAMETER
SYMBOL CONDITIONS
V
(V) MIN
TYP
MAX
185
37
-
MIN
MAX
MIN
MAX UNITS
CC
Any Data Input to Y
t
t
t
t
t
t
C = 50pF
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
230
46
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
280
56
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
PLH, PHL
L
4.5
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
C =15pF
15
-
L
C = 50pF
6
31
185
37
-
39
230
46
-
48
280
56
-
L
Any Select to Y
Any Select to Y
Enable to Y
t
C = 50pF
2
-
PLH, PHL
L
4.5
5
-
C =15pF
15
-
L
C = 50pF
6
31
205
41
-
39
255
51
-
48
310
62
-
L
t
C = 50pF
2
-
PLH, PHL
L
4.5
5
-
C =15pF
17
-
L
C = 50pF
6
35
140
28
-
43
175
35
-
53
210
42
-
L
t
C = 50pF
2
-
PLH, PHL
L
4.5
5
-
C =15pF
11
-
L
C = 50pF
6
24
145
29
-
30
180
36
-
36
220
44
-
L
Enable to Y
t
C = 50pF
2
-
PLH, PHL
L
4.5
5
-
C =15pF
12
-
L
C = 50pF
6
25
75
15
13
10
-
31
95
19
16
10
-
38
110
22
19
10
-
L
Output Transition Time
(Figure 1)
t
, t
C = 50pF
L
2
-
TLH THL
4.5
6
-
-
Input Capacitance
C
-
-
-
-
IN
Power Dissipation Capacitance
(Notes 3, 4)
C
5
59
PD
HCT TYPES
Propagation Delay (Figure 2)
Any Data Input to Y
t
, t
PLH PHL
C = 50pF
4.5
5
-
-
-
-
-
-
-
-
-
-
-
38
-
-
-
-
-
-
-
-
-
-
-
48
-
-
-
-
-
-
-
-
-
-
57
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
L
C =15pF
16
-
L
Any Data Input to Y
Any Select to Y
Any Select to Y
Enable to Y
t
t
t
t
, t
PLH PHL
C = 50pF
4.5
5
36
-
45
-
54
-
L
C =15pF
15
L
, t
PLH PHL
C = 50pF
4.5
5
41
-
51
-
62
-
L
C =15pF
17
-
L
, t
PLH PHL
C = 50pF
4.5
5
43
-
54
-
65
-
L
C =15pF
18
-
L
, t
PLH PHL
C = 50pF
4.5
5
29
-
36
-
44
-
L
C =15pF
12
L
5
CD54HC151, CD74HC151, CD54HCT151, CD74HCT151
Switching Specifications Input t , t = 6ns (Continued)
r
f
o
o
-40 C TO
-55 C TO
o
o
o
25 C
85 C
125 C
TEST
PARAMETER
Enable to Y
SYMBOL CONDITIONS
V
(V) MIN
TYP
MAX
36
-
MIN
MAX
46
MIN
MAX UNITS
CC
C = 50pF C = 50pF
4.5
5
-
15
-
-
-
-
-
54
-
ns
ns
ns
pF
pF
L
L
C =15pF C =15pF
-
-
-
-
-
-
-
-
-
L
L
Output Transition Time
Input Capacitance
t
, t
TLH THL
C = 50pF
L
4.5
-
-
15
10
-
19
10
-
22
10
-
C
-
-
-
-
IN
Power Dissipation Capacitance
(Notes 3, 4)
C
5
58
PD
NOTES:
3. C
is used to determine the dynamic power consumption, per gate.
2
PD
4. P = V
f (C
PD
+ C ) where f = input frequency, C = output load capacitance, V
= supply voltage.
CC
D
CC
i
L
i
L
Test Circuit and Waveform
t = 6ns
t = 6ns
f
r
INPUT LEVEL
90%
ENABLE
SELECT
V
S
10%
I
n
GND
t
THL
t
TLH
90%
Y OUTPUT
Y OUTPUT
V
S
10%
t
t
t
t
PLH
PLH
PHL
PHL
V
S
t
THL
t
TLH
FIGURE 1.
6
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
CDIP
CDIP
PDIP
Drawing
5962-9065201MEA
CD54HC151F3A
CD54HCT151F3A
CD74HC151E
ACTIVE
ACTIVE
ACTIVE
ACTIVE
J
J
16
16
16
16
1
1
TBD
TBD
TBD
A42 SNPB
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
J
1
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD74HC151EE4
CD74HC151M
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
N
D
D
D
D
D
D
D
D
D
N
N
D
D
D
D
D
D
D
D
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74HC151M96
CD74HC151M96E4
CD74HC151M96G4
CD74HC151ME4
CD74HC151MG4
CD74HC151MT
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74HC151MTE4
CD74HC151MTG4
CD74HCT151E
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD74HCT151EE4
CD74HCT151M
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74HCT151M96
CD74HCT151M96E4
CD74HCT151M96G4
CD74HCT151ME4
CD74HCT151MG4
CD74HCT151MT
CD74HCT151MTE4
CD74HCT151MTG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
16
CD74HC151M96
CD74HCT151M96
D
D
16
16
SITE 27
SITE 27
6.5
6.5
10.3
10.3
2.1
2.1
8
8
16
16
Q1
Q1
330
16
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
CD74HC151M96
CD74HCT151M96
D
D
16
16
SITE 27
SITE 27
342.9
342.9
336.6
336.6
28.58
28.58
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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Applications
Audio
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Digital Control
Military
www.ti.com/automotive
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www.ti.com/digitalcontrol
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interface.ti.com
logic.ti.com
Logic
Power Mgmt
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RFID
power.ti.com
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Security
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Wireless
Video & Imaging
Wireless
www.ti.com/wireless
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Copyright © 2007, Texas Instruments Incorporated
CD74HCT151M96G4 CAD模型
引脚图
封装焊盘图
CD74HCT151M96G4 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| CD74HCT151ME4 | TI | High-Speed CMOS Logic 8-Input Multiplexer | 完全替代 |
|
| CD74HCT151M | TI | High-Speed CMOS Logic 8-Input Multiplexer | 完全替代 |
|
| CD74HCT151MG4 | TI | High-Speed CMOS Logic 8-Input Multiplexer | 完全替代 |
|
CD74HCT151M96G4 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| CD74HCT151ME4 | TI | High-Speed CMOS Logic 8-Input Multiplexer | 获取价格 |
|
| CD74HCT151MG4 | TI | High-Speed CMOS Logic 8-Input Multiplexer | 获取价格 |
|
| CD74HCT151MT | TI | High-Speed CMOS Logic 8-Input Multiplexer | 获取价格 |
|
| CD74HCT151MTE4 | TI | High-Speed CMOS Logic 8-Input Multiplexer | 获取价格 |
|
| CD74HCT151MTG4 | TI | High-Speed CMOS Logic 8-Input Multiplexer | 获取价格 |
|
| CD74HCT153 | TI | High Speed CMOS Logic Dual 4-Input Multiplexer | 获取价格 |
|
| CD74HCT153E | TI | High Speed CMOS Logic Dual 4-Input Multiplexer | 获取价格 |
|
| CD74HCT153EE4 | TI | High-Speed CMOS Logic Dual 4- to 1-Line Selector/Multiplexer | 获取价格 |
|
| CD74HCT153EN | ETC | Logic IC | 获取价格 |
|
| CD74HCT153F | ETC | Logic IC | 获取价格 |
|
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