CD74HCU04M96G4 [TI]

6 通道、4.5V 至 5.5V 反相器 | D | 14 | -55 to 125;
CD74HCU04M96G4
型号: CD74HCU04M96G4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

6 通道、4.5V 至 5.5V 反相器 | D | 14 | -55 to 125

栅 光电二极管 逻辑集成电路 触发器 栅极
文件: 总6页 (文件大小:42K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CD74HCU04  
Data sheet acquired from Harris Semiconductor  
SCHS127  
High Speed CMOS Logic  
Hex Inverter  
February 1998  
Features  
Description  
• Typical Propagation Delay: 6ns at V  
o
= 5V,  
The Harris CD74HCU04 unbuffered hex inverter utilizes silicon-  
gate CMOS technology to achieve operation speeds similar to  
LSTTL gates with the low power consumption of standard  
CMOS integrated circuits. These devices are especially useful  
in crystal oscillator and analog applications. Figures 10 and 11  
are supplied as design information for the above applications.  
CC  
C = 15pF, T = 25 C, Fastest Part in QMOS Line  
L
A
[ /Title  
(CD74  
HCU04  
)
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic  
Hex  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
Ordering Information  
• HCU Types  
TEMP. RANGE  
PKG.  
NO.  
- 2V to 6V Operation  
o
PART NUMBER  
CD74HCU04E  
CD74HCU04M  
NOTES:  
( C)  
PACKAGE  
14 Ld PDIP  
14 Ld SOIC  
- High Noise Immunity: N = 20%, N = 30% of  
IL  
IH  
V
at V  
= 5V  
-55 to 125  
-55 to 125  
E14.3  
M14.15  
CC  
CC  
• CMOS Input Compatibility, I 1µA at V , V  
l
OL OH  
Inverter  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
2. Wafer or die for this part number is available which meets all elec-  
trical specifications. Please contact your local sales office or  
Harris customer service for ordering information.  
Pinout  
CD74HC04,  
(PDIP, SOIC)  
TOP VIEW  
1A  
1Y  
1
2
3
4
5
6
7
14 V  
CC  
13 6A  
12 6Y  
11 5A  
10 5Y  
2A  
2Y  
3A  
3Y  
9
8
4A  
4Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1655.1  
Copyright © Harris Corporation 1998  
1
CD74HCU04  
Functional Diagram  
1
2
3
4
5
6
7
14  
V
1A  
1Y  
CC  
13  
12  
11  
10  
9
6A  
6Y  
5A  
5Y  
4A  
4Y  
2A  
2Y  
3A  
3Y  
8
GND  
Logic Symbol  
nA  
nY  
Schematic Diagram  
V
CC  
(3, 5, 9, 11, 13) 1  
2 (4, 6, 8, 10, 12)  
2
CD74HCU04  
Absolute Maximum Ratings  
Thermal Information  
o
DC Supply Voltage, V  
Thermal Resistance (Typical, Note 3)  
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
θ
( C/W)  
CC  
Voltages Referenced to Ground . . . . . . . . . . . . . . . . -0.5V to +7V  
DC Input Diode Current, I  
JA  
100  
180  
IK  
o
For V < -0.5V or V > V  
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA  
OK  
For V < -0.5V or V > V  
Maximum Junction Temperature (Hermetic Package or Die) . . . 175 C  
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150 C  
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C  
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C  
I
I
CC  
o
DC Output Diode Current, I  
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA  
O
O
CC  
o
DC Drain Current, per Output, I  
O
For V > -0.5V or V < V  
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA  
(SOIC - Lead Tips Only)  
O
O
CC  
DC V  
or Ground Current, I  
. . . . . . . . . . . . . . . . . . . . . . . . .±50mA  
CC  
CC  
Operating Conditions  
o
o
Temperature Range T . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C  
A
Supply Voltage Range, V . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V  
CC  
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V  
CC  
I
O
Input Rise and Fall Time  
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)  
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)  
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation  
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
3. θ is measured with the component mounted on an evaluation PC board in free air.  
JA  
DC Electrical Specifications  
TEST  
CONDITIONS  
o
25 C  
o
o
o
o
-40 C TO +85 C -55 C TO 125 C  
PARAMETER  
SYMBOL  
V (V)  
I
I
(mA)  
V
(V)  
MIN  
1.7  
3.6  
4.8  
-
MAX  
MIN  
1.7  
3.6  
4.8  
-
MAX  
MIN  
1.7  
3.6  
4.8  
-
MAX  
UNITS  
O
CC  
High Level Input  
Voltage  
V
-
-
2
-
-
-
V
V
V
V
V
V
V
V
V
V
V
IH  
4.5  
-
-
-
6
2
-
-
-
Low Level Input  
Voltage  
V
-
-
0.3  
0.3  
0.3  
IL  
4.5  
6
-
0.8  
-
0.8  
-
0.8  
-
1.1  
-
1.1  
-
1.1  
High Level Output  
Voltage  
CMOS Loads  
V
V
-0.02  
2
1.8  
4
-
-
-
-
-
1.8  
4
-
-
-
-
-
1.8  
4
-
-
-
-
-
OH  
IH or  
V
IL  
-0.02  
-0.02  
-4  
4.5  
6
5.5  
3.98  
5.48  
5.5  
3.84  
5.34  
5.5  
3.7  
5.2  
High Level Output  
Voltage  
TTL Loads  
V
or  
4.5  
6
CC  
GND  
-5.2  
Low Level Output  
Voltage  
CMOS Loads  
V
V
V
0.02  
0.02  
0.02  
4
2
4.5  
6
-
-
-
-
-
0.2  
0.5  
-
-
-
-
-
0.2  
0.5  
-
-
-
-
-
0.2  
0.5  
0.5  
0.4  
0.4  
V
V
V
V
V
OL  
IH or  
IL  
0.5  
0.5  
Low Level Output  
Voltage  
TTL Loads  
4.5  
6
0.26  
0.26  
0.33  
0.33  
V
or  
5.2  
CC  
GND  
Input Leakage  
Current  
I
V
GND  
or  
-
6
6
-
-
±0.1  
-
-
±1  
-
-
±1  
µA  
µA  
I
CC  
Quiescent Device  
Current  
I
V
or  
0
2
20  
40  
CC  
CC  
GND  
3
CD74HCU04  
Switching Specifications Input t , t = 6ns  
r
f
o
o
o
o
o
25 C  
-40 C TO 85 C -55 C TO 125 C  
TEST  
V
CC  
PARAMETER  
Propagation Delay,  
SYMBOL CONDITIONS (V)  
MIN TYP MAX  
MIN  
MAX  
90  
18  
-
MIN  
MAX  
105  
21  
UNITS  
ns  
t
, t  
C = 50pF  
2
4.5  
5
-
-
-
-
-
-
-
-
-
70  
14  
-
-
-
-
PLH PHL  
L
Input to Output Y (Figure 1)  
C
C
C
= 50pF  
= 15pF  
= 50pF  
-
ns  
L
L
L
5
-
-
-
-
ns  
6
12  
75  
15  
13  
-
15  
95  
19  
16  
-
18  
ns  
Transition Times (Figure 1)  
Input Capacitance  
t
, t  
TLH THL  
C = 50pF  
L
2
-
-
18  
-
110  
22  
ns  
4.5  
6
-
-
ns  
-
-
-
19  
ns  
C
-
-
See Figure 3  
-
pF  
pF  
I
Power Dissipation Capacitance  
(Notes 4, 5)  
C
5
-
14  
-
-
-
-
PD  
NOTES:  
4. C  
is used to determine the dynamic power consumption, per inverter.  
2
PD  
5. P = V  
f (C  
PD  
+ C ) where f = input frequency, C = output load capacitance, V  
= supply voltage.  
CC  
D
CC  
i
L
i
L
Test Circuits and Waveforms  
t = 6ns  
t = 6ns  
f
r
V
CC  
90%  
50%  
10%  
INPUT  
GND  
t
t
TLH  
THL  
90%  
50%  
10%  
INVERTING  
OUTPUT  
t
t
PLH  
PHL  
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC  
Typical Performance Curves  
AMBIENT TEMPERATURE  
o
25.0  
22.5  
20.0  
17.5  
15.0  
12.5  
10.0  
7.5  
T
= 25 C  
A
V
= 6V  
CC  
V
= 4.5V  
CC  
5.0  
V
= 2V  
2.5  
CC  
2
0
1
3
4
5
6
V , INPUT VOLTAGE (V)  
I
FIGURE 2. TYPICAL INVERTER SUPPLY CURRENT AS FUNCTION OF INPUT VOLTAGE  
4
CD74HCU04  
Typical Performance Curves (Continued)  
70  
65  
o
AMBIENT TEMPERATURE, T = 25 C  
A
V
= 2V, V 0-2V  
I
60  
55  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
DD  
INPUT PIN 5 CONDITIONS  
V
= 3V, V 0-3V  
I
DD  
V
V
V
= 4V, V 0-4V  
I
DD  
DD  
DD  
= 5V, V 0-5V  
I
= 6V, V 0-6V  
I
0
1
2
3
4
5
6
V
INPUT VOLTAGE (V)  
IN,  
FIGURE 3. INPUT CAPACITNCE AS A FUNCTION OF INPUT VOLTAGE  
5
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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