CDCLVP110MVFR [TI]
1:10 LVPECL/HSTL 至 LVPECL 时钟驱动器 | VF | 32 | -40 to 85;
| 型号： | CDCLVP110MVFR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1:10 LVPECL/HSTL 至 LVPECL 时钟驱动器 | VF | 32 | -40 to 85 时钟 驱动 时钟驱动器 |
| 文件： | 总11页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CDCLVP110
www.ti.com
SCAS683A–JUNE 2002–REVISED AUGUST 2002
LOW-VOLTAGE 1:10 LVPECL/HSTL
WITH SELECTABLE INPUT CLOCK DRIVER
FEATURES
DESCRIPTION
•
Distributes One Differential Clock Input Pair
LVPECL/HSTL to 10 Differential LVPECL
Clock Outputs
The CDCLVP110 clock driver distributes one
differential clock pair of either LVPECL or HSTL
(selectable) input, (CLK0, CLK1) to ten pairs of
differential LVPECL clock (Q0, Q9) outputs with
minimum skew for clock distribution. The
CDCLVP110 can accept two clock sources into an
input multiplexer. The CLK0 input accepts either
LVECL/LVPECL input signals, while CLK1 accepts an
HSTL input signal when operated under LVPECL
conditions. The CDCLVP110 is specifically designed
for driving 50-Ω transmission lines.
•
•
Fully Compatible With LVECL/LVPECL/HSTL
Single Supply Voltage Required, ±3.3-V or
±2.5-V Supply
•
•
Selectable Clock Input Through CLK_SEL
Low-Output Skew (Typ 15 ps) for
Clock-Distribution Applications
•
VBB Reference Voltage Output for
Single-Ended Clocking
The VBB reference voltage output is used if
single-ended input operation is required. In this case
the VBB pin should be connected to CLK0 and
bypassed to GND via a 10-nF capacitor.
•
•
•
Available in a 32-Pin LQFP Package
Frequency Range From DC to 3.5 GHz
Pin-to-Pin Compatible With MC100 Series
EP111, ES6111, LVEP111, PTN1111
However, for high-speed performance up to 3.5 GHz,
the differential mode is strongly recommended.
LQFP PACKAGE
(TOP VIEW)
The CDCLVP110 is characterized for operation from
-40°C to 85°C.
24 23 22 21 20 19 18 17
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
V
V
CC
CC
Q2
Q2
Q1
Q1
Q0
Q0
Q7
Q7
Q8
Q8
Q9
Q9
V
CC
V
CC
1
2
3
4
5
6
7
8
FUNCTION TABLE
CLK_SEL
ACTIVE CLOCK INPUT
CLK0, CLK0
0
1
CLK1, CLK1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002, Texas Instruments Incorporated
CDCLVP110
www.ti.com
SCAS683A–JUNE 2002–REVISED AUGUST 2002
31
30
Q0
Q0
29
28
Q1
Q1
27
26
24
23
Q2
Q2
Q3
Q3
3
CLK0
CLK0
0
1
4
22
21
Q4
Q4
6
7
CLK1
CLK1
20
19
Q5
Q5
18
17
Q6
Q6
2
15
14
CLK_SEL
Q7
Q7
13
12
Q8
Q8
Q9
Q9
11
10
5
VBB
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME
CLK_SEL
NO.
2
Clock select. Used to select between CLK0 and CLK1 input pairs.
Differential LVECL/LVPECL input pair
CLK0, CLK0
CLK1, CLK1
3, 4
6, 7
Differential HSTL input pair
11, 13, 15, 18,
Q [9:0]
Q[9:0]
20, 22, 24, 27, LVECL/LVPECL clock outputs, these outputs provide low-skew copies of CLKn.
29, 31
10, 12, 14, 17,
19, 21,23, 26, LVECL/LVPECL complementary clock outputs, these outputs provide copies of CLKn.
28, 30
VBB
VCC
VEE
5
Reference voltage output for single-ended input operation
1, 9, 16, 25, 32 Supply voltage
Device ground or negative supply voltage in ECL mode
8
2
CDCLVP110
www.ti.com
SCAS683A–JUNE 2002–REVISED AUGUST 2002
ABSOLUTE MAXIMUM RATINGS(1)
VCC
VI
Supply voltage
-0.3 V to 4.6 V
Input voltage
-0.3 V to VCC + 0.5 V
-0.3 V to VCC + 0.5 V
±20 mA
VO
IIN
Output voltage
Input current
VEE
IBB
IO
Negative supply voltage
Sink/source current
DC output current
Storage temperature range
-0.3 V to 4.6 V
-1 to 1 mA
-50 mA
Tstg
-65°C to 150°C
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN NOM
2.375 2.5/3.3
-40
MAX UNIT
VCC
Supply voltage (relative to VEE
)
3.8
85
V
(1)
TA
Operating free-air temperature
°C
(1) Operating junction temperature affects device lifetime. The continuous operation junction temperature is recommended to be at max
110°C. The device ac and dc parameters are specified up to 85°C ambient temperature. See the PCB Layout Guidelines for
CDCLVP110 application note, literature number SCAA057 for more details.
PACKAGE THERMAL IMPEDANCE
TEST CONDITION
0 LFM
MIN
MAX
78
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
150 LFM
73
ΘJA
Thermal resistance junction to ambient(1)
Thermal resistance junction to case
250 LFM
71
500 LFM
68
ΘJC
51
(1) According to JESD 51-7 standard.
LVECL DC ELECTRICAL CHARACTERISTICS
Vsupply: VCC = 0 V, VEE = -2.375 V to -3.8 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
-40°C
25°C
85°C
-40°C
25°C
85°C
40
45
48
78
IEE
Supply internal current
Absolute value of current
82
85
mA
343
370
380
Output and internal supply
current
ICC
All outputs terminated 50 Ω to VCC - 2 V
Includes pullup/pulldown resistors
For VEE = -3 to -3.8 V, IBB = -0.2 mA
VEE = -2.375 to -2.75 V, IBB = -0.2 mA
mA
µA
-40°C,
25°C,
85°C
IIN
Input current
150
-40°C
25°C
85°C
-1.38
-1.42
-1.45
-1.26
-1.26
-1.26
Internally generated bias
voltage
VBB
V
V
-40°C,
25°C,
85°C
-1.38
-1.16
-0.88
-40°C,
25°C,
85°C
High-level input voltage
(CLK_SEL)
VIH
-1.165
3
CDCLVP110
www.ti.com
SCAS683A–JUNE 2002–REVISED AUGUST 2002
LVECL DC ELECTRICAL CHARACTERISTICS (continued)
Vsupply: VCC = 0 V, VEE = -2.375 V to -3.8 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
-40°C,
25°C,
85°C
Low-level input voltage
(CLK_SEL)
VIL
-1.81
-1.475
1.3
V
V
V
-40°C,
25°C,
85°C
(1)
VINPP
Input amplitude (CLK0, CLK0)
Difference of input 9 VIH-VIL , See Note
Cross point of input 9 average (VIH, VIL)
0.5
-40°C,
25°C,
85°C
Common-mode voltage (CLK0,
CLK0)
VCM
VEE + 1
-0.3
-40°C
25°C
85°C
-40°C
25°C
85°C
-1.26
-1.2
-0.9
-0.9
VOH
High-level output voltage
IOH = -21 mA
IOL = -5 mA
V
-1.15
-1.85
-1.85
-1.85
-0.9
-1.5
VOL
Low-level output voltage
-1.45
-1.4
V
V
-40°C,
25°C,
85°C
Terminated with 50 Ω to VCC - 2 V, See
Figure 3
VOD
Differential output voltage swing
600
(1) VINPP minimum and maximum is required to maintain ac specifications, actual device function tolerates a minimum VINPP of 100 mV.
LVPECL/HSTL DC ELECTRICAL CHARACTERISTICS
Vsupply: VCC = 2.375 V to 3.8 V, VEE= 0 V
PARAMETER
TEST CONDITIONS
MIN
40
TYP
MAX UNIT
-40°C
25°C
85C
78
IEE
Supply internal current Absolute value of current
45
82
85
mA
48
-40°C
25°C
85°C
343
370
380
Output and internal
ICC
All outputs terminated 50 Ω to VCC - 2 V
mA
µA
supply current
Input current
-40°C,
25°C,
85°C
IIN
Includes pullup/pulldown resistors
VEE = -3 to -3.8 V, IBB= -0.2 mA
VEE = -2.375 to -2.75 V, IBB = -0.2 mA
150
-40°C
25°C
85°C
VCC - 1.38
VCC - 1.42
VCC - 1.45
VCC - 1.26
VCC - 1.26
VCC - 1.26
Internally generated
bias voltage
VBB
V
-40°C,
25°C,
85°C
VCC - 1.38
VCC - 1.16
High-level input voltage
(CLK_SEL)
VIH
VIL
-40°C, 25°C, 85°C
-40°C, 25°C, 85°C
VCC - 1.165
VCC - 1.81
VCC - 0.88
V
V
Low-level input voltage
(CLK_SEL)
VCC - 1.475
-40°C,
25°C,
85°C
Input amplitude (CLK0,
CLK0)
(1)
VINPP
Difference of input 9 VIH-VIL, see Note
0.5
1
1.3
V
V
-40°C,
25°C,
85°C
Common-mode
voltage (CLK0, CLK0)
VIC
Cross point of input 9 average (VIH, VIL)
VCC - 0.3
(1) VINPP minimum and maximum is required to maintain ac specifications, actual device function tolerates a minimum VINPP of 100 mV.
4
CDCLVP110
www.ti.com
SCAS683A–JUNE 2002–REVISED AUGUST 2002
LVPECL/HSTL DC ELECTRICAL CHARACTERISTICS (continued)
Vsupply: VCC = 2.375 V to 3.8 V, VEE= 0 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
-40°C,
25°C,
85°C
Differential input
voltage (CLK1, CLK1)
(1)
VID
Difference of input VIH-VIL, See Note
0.4
1.9
0.9
V
V
-40°C,
25°C,
85°C
Input crossover
voltage (CLK1, CLK1)
VI(x)
Cross point of input 9 average (VIH, VIL)
IOH = -21 mA
0.68
-40°C
25°C
85°C
-40°C
25°C
85°C
VCC - 1.26
VCC - 1.2
VCC - 0.9
VCC - 0.9
VCC - 0.9
VCC - 1.5
VCC - 1.45
VCC - 1.4
High-level output
voltage
VOH
V
VCC - 1.15
VCC - 1.85
VCC - 1.85
VCC - 1.85
Low-level output
voltage
VOL
IOL = -5 mA
V
-40°C,
25°C,
85°C
Differential output
voltage swing
Terminated with 50 Ω to VCC - 2 V, See
Figure 4
VOD
600
mV
AC ELECTRICAL CHARACTERISTICS
Vsupply: VCC = 2.375 V to 3.8 V, VEE = 0 V or LVECL/LVPECL input VCC = 0 V, VEE = -2.375 V to -3.8 V
PARAMETER
TEST CONDITIONS
Input condition: VCM = 1 V,
VPP = 0.5 V
MIN
TYP
MAX UNIT
-40°C,
25°C,
85°C
230
350
ps
Differential propagation delay CLK0,
CLK0 to all Q0, Q0… Q9, Q9
tpd
-40°C,
25°C,
85°C
tsk(pp)
tsk(o)
t(JITTER)
f(max)
tr/tf
Part-to-part skew
See Note B and Figure 1
See Note A and Figure 1
70
30
ps
ps
-40°C,
25°C,
85°C
Output-to-output skew
Cycle-to-cycle RMS jitter
Maximum frequency
15
-40°C,
25°C,
85°C
< 1
ps
Functional up to 3.5 GHz, timing
specifications apply at 1 GHz,
see Figure 3
-40°C,
25°C,
85°C
3500
200
MHz
ps
-40°C,
25°C,
85°C
Output rise and fall time (20%, 80%)
100
HSTL INPUT
Vsupply: VCC = 2.375 V to 3.8 V, VEE = 0 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
-40°C,
25°C,
85°C
Differential propagation delay CLK0,
CLK0 to all Q0, Q0… Q9, Q9
Input condition: Vx = 0.68 V,
Vdif = 0.4 V
tpd
290
370
70
ps
ps
ps
ps
-40°C,
25°C,
85°C
tsk(pp)
Part-to-part skew
See Note B and Figure 1
See Note A and Figure 1
-40°C,
25°C,
85°C
tsk(o)
Output to output skew
Cycle-to-cycle RMS jitter
10
30
-40°C,
25°C,
85°C
t(JITTER)
<1
5
CDCLVP110
www.ti.com
SCAS683A–JUNE 2002–REVISED AUGUST 2002
HSTL INPUT (continued)
Vsupply: VCC = 2.375 V to 3.8 V, VEE = 0 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Functional up to 3.5 GHz, timing
specifications apply at 1 GHz, See
Figure 4
-40°C,
25°C,
85°C
f(max)
Maximum frequency
3500
200
MHz
ps
-40°C,
25°C,
85°C
tr/tf
Output rise and fall time (20%, 80%)
100
CLKn
CLKn
Q0
t
t
PLH0
PLH0
Q0
Q1
t
t
PLH1
PLH1
Q1
Q2
t
t
PLH2
PLH2
Q2
o
o
o
o
o
t
t
PLH9
PLH9
Q9
Q9
A. Output skew is calculated as the greater of: The difference between the fastest and the slowest tPLHn (n = 0, 1,...9) or
the difference between the fastest and the slowest tPHLn (n = 0, 1,...9).
B. Part-to-part skew, is calculated as the greater of: The difference between the fastest and the slowest tPLHn (n = 0,
1,...9) across multiple devices or the difference between the fastest and the slowest tPHLn (n = 0, 1,...9) across
multiple devices.
Figure 1. Waveform for Calculating Both Output and Part-to-Part Skew
6
CDCLVP110
www.ti.com
SCAS683A–JUNE 2002–REVISED AUGUST 2002
V
CC
Z
Z
= 50 Ω
= 50 Ω
O
Yn
LVPECL
Receiver
CDCLVP110
Driver
O
Yn
50 Ω
50 Ω
V
EE
VT = V - 2 V
CC
Figure 2. Typical Termination for Output Driver (See the Interfacing Between LVPECL, LVDS, and CML
Application Note, Literature Number SCAA056)
DIFFERENTIAL OUTPUT VOLTAGE SWING
vs
FREQUENCY
900
800
V
= 2.375 V
CC
700
600
500
400
300
200
100
0
T = -40°C to 85°C
A
1
1.5
2
2.5
3
3.5
f - Frequency - GHz
Figure 3. LVPECL Input Using CLK0 Pair, VCM = 1 V, VINdif = 0.5 V
7
CDCLVP110
www.ti.com
SCAS683A–JUNE 2002–REVISED AUGUST 2002
DIFFERENTIAL OUTPUT VOLTAGE SWING
vs
FREQUENCY
1000
900
800
700
600
500
400
300
200
100
V
= 2.375 V
CC
T = -40°C to 85°C
A
0
1
1.5
2
2.5
3
3.5
f - Frequency - GHz
Figure 4. HSTL Input Using CLK1 Pair, VCM = 0.68 V, VINdif = 0.4 V
8
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LQFP
LQFP
Drawing
CDCLVP110VF
ACTIVE
ACTIVE
VF
32
32
250
None
None
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
CDCLVP110VFR
VF
1000
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTQF002B – JANUARY 1995 – REVISED MAY 2000
VF (S-PQFP-G32)
PLASTIC QUAD FLATPACK
0,45
0,25
0,20
M
0,80
24
17
25
16
32
9
0,13 NOM
1
8
5,60 TYP
7,20
SQ
6,80
Gage Plane
9,20
8,80
SQ
0,25
0,05 MIN
0°–7°
1,45
1,35
0,75
0,45
Seating Plane
0,10
1,60 MAX
4040172/D 04/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
1
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