CGS74LCT2524 [TI]
Ideal for Low Power/Low Noise High Speed Applications, Ensured:â 300 ps Pin-to-Pin Skew (tOSHL and tOSLH); 理想的低功耗/低噪声高速应用,有保证的:① ???? 300 ps的引脚对引脚歪斜( tOSHL和tOSLH )型号: | CGS74LCT2524 |
厂家: | TEXAS INSTRUMENTS |
描述: | Ideal for Low Power/Low Noise High Speed Applications, Ensured:â 300 ps Pin-to-Pin Skew (tOSHL and tOSLH) |
文件: | 总7页 (文件大小:110K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
OBSOLETE
CGS74LCT2524
www.ti.com
SNOS710D –JANUARY 2000–REVISED APRIL 2013
CGS74LCT2524 1 to 4 Minimum Skew (300 ps) 3V Clock Driver
Check for Samples: CGS74LCT2524
1
FEATURES
DESCRIPTION
This minimum skew clock driver is a 3V option of the
23
•
Ideal for Low Power/Low Noise High Speed
Applications
current CGS74CT2524 Minimum Skew Clock Driver
and is designed for Clock Generation and Support
(CGS) applications operating at low voltage, high
frequencies. This device ensures minimum output
skew across the outputs of a given device.
•
Ensured:
–
300 ps Pin-to-Pin Skew (tOSHL and tOSLH)
•
•
Implemented on Texas Instruments' FACT®
Family Process
Skew parameters are also provided as a means to
measure duty cycle requirements as those found in
high speed clocking systems. This minimum skew
clock driver with one input driving four outputs, is
specifically designed for signal generation and clock
distribution applications.
1 Input to 4 Outputs Low Skew Clock
Distribution
•
•
•
•
Symmetric Output Current Drive: 12 mA IOH/IOL
Industrial Temperature of −40°C to +85°C
8-Pin SOIC Package
Low Dynamic Power Consumption Above 20
MHz
•
Ensured 2 kV ESD Protection
LOGIC SYMBOL
The output pins act as a single entity and will follow the state of the CLK when the clock distribution chip is selected.
PIN DESCRIPTION
Pin Names
Description
CLK
Clock Input
Outputs
O0–O3
TRUTH TABLE(1)
Inputs
CLK
L
Outputs
O0–O3
L
H
H
(1) L = Low Logic Level
H = High Logic Level
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
FACT is a registered trademark of Fairchild Semiconductor.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
OBSOLETE
CGS74LCT2524
SNOS710D –JANUARY 2000–REVISED APRIL 2013
www.ti.com
CONNECTION DIAGRAMS
Figure 1. 8-Pin SOIC
See D Package
Figure 2.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)
Supply Voltage (VCC
)
−0.5V to 7.0V
−20 mA
DC Input Voltage Diode Current
(IIK)
V = −0.5V
V = VCC + 0.5V
+20 mA
DC Input Voltage (VI)
−0.5V to VCC +0.5V
−20 mA
DC Output Diode Current (IO)
V = −0.5V
V = VCC + 0.5V
+20 mA
DC Output Voltage (VO)
−0.5V to VCC +0.5V
±50 mA
DC Output Source or Sink Current (IO)
DC VCC or Ground Current per Output Pin (ICC or IGND
)
±50 mA
Storage Temperature (TSTG
Junction Temperature (θJA
)
−65°C to +150°C
Max
)
Min
0
Typ
225
132
Airflow
M
500 LFM
167
117 °C/W
(1) The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. The device should not be
operated at these limits. The parametric values defined in the DC ELECTRICAL CHARACTERISTICS and AC ELECTRICAL
CHARACTERISTICS tables are not ensured at the absolute maximum ratings. The Recommended Operating Conditions will define the
conditions for actual device operation.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
RECOMMENDED OPERATING CONDITIONS
Supply Voltage (VCC
Input Voltage (VIN
Output Voltage (VO)
)
3.0V to 3.6V
0V to VCC
)
0V to VCC
Operating Temperature (TA)
Industrial
−40°C to +85°C
0°C to +70°C
9.6 ns max
Commercial
(0.8V to 2.0V)
Input Rise and Fall Times
2
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Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: CGS74LCT2524
OBSOLETE
CGS74LCT2524
www.ti.com
SNOS710D –JANUARY 2000–REVISED APRIL 2013
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions unless specified otherwise.
CGS74LCT2524
VCC
(V)
Symbol
Parameter
Conditions
VOUT = 0.1V or VCC−0.1V
VOUT = 0.1V or VCC−0.1V
TA = +25°C
Typ
TA = −40°C to +85°C
Ensured Limits
2.0
Units
VIH
Minimum High Level
Input Voltage
3.6
3.6
1.5
2.0
V
V
VIL
Maximum Low Level
Input Voltage
1.5
0.8
0.8
VOH
VOL
IIN
Minimum High Level
Output Voltage
VIN = VIL or VIH, IOUT = −50 μA
VIN = VIL or VIH, IOH = −12 mA
VIN = VIL or VIH, IOUT = 50 μA
VIN = VIL or VIH, IOL = −12 mA
VIN = VCC, GND
3.0
3.0
3.0
3.0
3.6
2.9
2.5
2.9
2.4
V
V
Minimum Low Level
Output Voltage
0.1
0.1
V
0.3
0.4
V
Maximum Input
±0.1
±1.0
μA
Leakage Current
Maximum ICC/Input
Minimum Dynamic
Output Current
ICCT
IOLD
IOHD
ICC
VIN = 3.0V
3.6
3.6
3.6
3.6
100
36
μA
mA
mA
μA
VOLD = 0.8V (max)
VOHD = 2.0V (min)
VIN = VCC or GND
−25
10
Maximum Quiescent
Supply Current
2.5
AC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions unless specified otherwise. All typical values are measured at VCC = 3.3V, TA =
25°C
LCT2524
VCC = 3.0V to 3.6V
Symbol
Parameter
TA = −40°C to +85°C
CL = 50 pF, RL = 500Ω
Typ
Units
Min
Max
tPLH
Low-to-High Propagation Delay
CLK to On
6
15.0
ns
ns
tPHL
High-to-Low Propagation Delay
CLK to On
6
15.0
Copyright © 2000–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: CGS74LCT2524
OBSOLETE
CGS74LCT2524
SNOS710D –JANUARY 2000–REVISED APRIL 2013
www.ti.com
AC ELECTRICAL CHARACTERISTICS - EXTENDED
Over recommended operating conditions unless specified otherwise. All typical values are measured at VCC = 3.3V, TA =
25°C
LCT2524
VCC = 3.0V to 3.6V
Symbol
Parameter
TA = −40°C to +85°C
Units
CL = 50 pF, RL = 500Ω
Min
Typ
Max
fmax
Maximum Operating Frequency
75
MHz
ps
tOSHL
tOSLH
tPS
Maximum Skew Common Edge Output-to-Output Variation(1)
Maximum Skew Common Edge Output-to-Output Variation(1)
Maximum Skew Pin (Signal) Transition Variation(2)
300
300
ps
ns
2.5
2.5
tRISE/ tFALL
THIGH
Rise Time/Fall Time (from 0.8V to 2.0V/2.0V to 0.8V)
ns
ns
ns
Time High
Time Low
4
4
TLOW
(1) Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the
same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL) or LOW-to-
HIGH (tOSLH) or in opposite directions both HL and LH (tOST). Limits are characterized and ensured by design @ 66 MHz.
(2) Pin transition skew is the absolute difference between HIGH-to-LOW and LOW-to-HIGH propagation delay, measured at a given output
pin.
TIMING DIAGRAMS
4
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Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: CGS74LCT2524
OBSOLETE
CGS74LCT2524
www.ti.com
SNOS710D –JANUARY 2000–REVISED APRIL 2013
TEST CIRCUIT
RL is 500Ω
CL is 50 pF for all propagation delays and skew measurements.
Copyright © 2000–2013, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links: CGS74LCT2524
OBSOLETE
CGS74LCT2524
SNOS710D –JANUARY 2000–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision C (April 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................ 5
6
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Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: CGS74LCT2524
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