CLVC1G125QDBVRQ1 [TI]
具有三态输出的汽车类单路 1.65V 至 5.5V 缓冲器 | DBV | 5 | -40 to 125;
| 型号： | CLVC1G125QDBVRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有三态输出的汽车类单路 1.65V 至 5.5V 缓冲器 | DBV | 5 | -40 to 125 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总8页 (文件大小：102K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇꢈ ꢇ ꢉꢊꢋ ꢌꢇ
ꢀꢍ ꢁꢈ ꢄ ꢎ ꢏꢐꢀ ꢏꢐꢑ ꢑꢎ ꢒ ꢈ ꢓꢔꢎ
ꢕ ꢍꢔ ꢖ ꢗ ꢋꢀꢔꢓꢔ ꢎ ꢘ ꢐꢔ ꢙꢐ ꢔ
SGES002A − APRIL 2003 − REVISED MAY 2004
D
Qualification in Accordance With
AEC-Q100
D
D
D
I
Supports Partial-Power-Down Mode
off
†
Operation
D
Qualified for Automotive Applications
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
D
Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
D
D
D
D
Supports 5-V V
Operation
CC
DCK PACKAGE
(TOP VIEW)
Inputs Accept Voltages to 5.5 V
Max t of 3.7 ns at 3.3 V
pd
Low Power Consumption, 10-µA Max I
24-mA Output Drive at 3.3 V
1
2
3
5
4
OE
A
V
Y
CC
CC
GND
†
Contact factory for details. Q100 qualification data available on
request.
description/ordering information
This bus buffer gate is designed for 1.65-V to 5.5-V V
operation.
CC
The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable
(OE) input is high.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
T
A
PACKAGE
§
−40°C to 125°C SOT (SC-70) − DCK
Reel of 2875
1P1G125QDCKRQ1
CM_
‡
§
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
DCK: The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2004, Texas Instruments Incorporated
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ꢢꢦ ꢣ ꢢ ꢛꢜ ꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢꢦ ꢟꢣ ꢫ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄꢅꢆ ꢇ ꢈꢇ ꢉ ꢊ ꢋꢌ ꢇ
ꢀ ꢍꢁꢈ ꢄ ꢎ ꢏ ꢐꢀ ꢏ ꢐꢑ ꢑꢎ ꢒ ꢈ ꢓꢔꢎ
ꢕꢍ ꢔ ꢖ ꢗ ꢋꢀꢔꢓꢔ ꢎ ꢘ ꢐꢔꢙ ꢐꢔ
SGES002A − APRIL 2003 − REVISED MAY 2004
logic diagram (positive logic)
1
2
OE
A
4
Y
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
I
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, V
O
(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
OK
O
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
O
CC
Continuous current through V
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Package thermal impedance, θ (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
JA
stg
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functionaloperation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of V is provided in the recommended operating conditions table.
CC
3. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢕ ꢍꢔ ꢖ ꢗ ꢋꢀꢔꢓꢔ ꢎ ꢘ ꢐꢔ ꢙꢐ ꢔ
SGES002A − APRIL 2003 − REVISED MAY 2004
recommended operating conditions (see Note 4)
MIN
1.65
MAX
UNIT
Operating
5.5
V
Supply voltage
V
CC
IH
Data retention only
1.5
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3 V to 3.6 V
0.65 × V
1.7
CC
V
High-level input voltage
V
V
2
= 4.5 V to 5.5 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3 V to 3.6 V
0.7 × V
CC
0.35 × V
0.7
CC
V
IL
Low-level input voltage
0.8
= 4.5 V to 5.5 V
0.3 × V
5.5
CC
V
V
Input voltage
0
0
V
V
I
Output voltage
V
CC
−4
O
V
V
= 1.65 V
= 2.3 V
CC
−8
CC
−16
−24
−24
4
I
High-level output current
Low-level output current
mA
mA
OH
OL
V
= 3 V
CC
V
CC
V
CC
V
CC
= 4.5 V
= 1.65 V
= 2.3 V
8
16
24
24
20
10
5
I
V
CC
= 3 V
V
CC
V
CC
V
CC
V
CC
= 4.5 V
= 1.8 V 0.15 V, 2.5 V 0.2 V
= 3.3 V 0.3 V
= 5 V 0.5 V
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
−40
125
°C
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implicationsof Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄꢅꢆ ꢇ ꢈꢇ ꢉ ꢊ ꢋꢌ ꢇ
ꢀ ꢍꢁꢈ ꢄ ꢎ ꢏ ꢐꢀ ꢏ ꢐꢑ ꢑꢎ ꢒ ꢈ ꢓꢔꢎ
ꢕꢍ ꢔ ꢖ ꢗ ꢋꢀꢔꢓꢔ ꢎ ꢘ ꢐꢔꢙ ꢐꢔ
SGES002A − APRIL 2003 − REVISED MAY 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
TYP
PARAMETER
TEST CONDITIONS
V
MIN
V −0.1
CC
MAX
UNIT
CC
I
I
I
I
= −100 mA
= −4 mA
= −8 mA
= −16 mA
1.65 V to 5.5 V
1.65 V
OH
OH
OH
OH
1.2
1.9
2.4
2.3
2.3 V
V
OH
V
3 V
I
= −24 mA
OH
4.5 V
1.65 V to 5.5 V
1.65 V
3.8
I
I
I
I
I
= −24 mA
= 100 mA
= 4 mA
OH
OL
OL
OL
OL
0.1
0.45
0.3
= 8 mA
2.3 V
V
OL
V
= 16 mA
0.4
3 V
0.55
I
I
= 24 mA
= 24 mA
OL
OL
4.5 V
0.55
5
I
I
V = 5.5 V or GND
0 to 5.5 V
mA
A or OE inputs
I
I
I
I
V or V = 5.5 V
0
3.6 V
10
10
mA
mA
mA
mA
pF
off
I
O
V
O
= 0 to 5.5 V
OZ
CC
V = 5.5 V or GND,
I
I
= 0
1.65 V to 5.5 V
3 V to 5.5 V
3.3 V
10
O
∆I
CC
One input at V
CC
− 0.6 V,
Other inputs at V
CC
or GND
500
C
V = V
or GND
= 3.3 V, T = 25°C.
4
i
I
CC
†
All typical values are at V
CC
A
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
V
= 3.3 V
V
= 5 V
CC
0.3 V
CC
0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
MIN MAX
t
A
1
1
1
5.1
6
1
1
4.1
5
ns
ns
ns
Y
Y
Y
pd
en
dis
t
t
OE
OE
5
0.5
4.2
operating characteristics, T = 25°C
A
V
CC
= 3.3 V
V
= 5 V
TEST
CONDITIONS
CC
TYP
PARAMETER
UNIT
TYP
19
2
Outputs enabled
Outputs disabled
21
4
C
pd
Power dissipation capacitance
f = 10 MHz
pF
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢕ ꢍꢔ ꢖ ꢗ ꢋꢀꢔꢓꢔ ꢎ ꢘ ꢐꢔ ꢙꢐ ꢔ
SGES002A − APRIL 2003 − REVISED MAY 2004
PARAMETER MEASUREMENT INFORMATION
V
LOAD
Open
S1
R
L
From Output
Under Test
TEST
S1
GND
t
t
/t
Open
PLH PHL
/t
C
L
t
V
R
L
PLZ PZL
LOAD
GND
(see Note A)
/t
PHZ PZH
LOAD CIRCUIT
INPUTS
V
CC
V
M
V
C
L
R
L
V
LOAD
∆
V
I
t /t
r f
3.3 V 0.3 V
5 V 0.5 V
3 V
≤2.5 ns
≤2.5 ns
1.5 V
/2
6 V
50 pF
50 pF
500 Ω
500 Ω
0.3 V
0.3 V
V
CC
V
2 × V
CC
CC
V
I
Timing Input
Data Input
V
M
0 V
t
w
t
t
su
h
V
I
V
I
Input
V
M
V
M
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
I
Output
Control
V
M
V
M
Input
V
M
V
M
0 V
0 V
t
t
t
t
t
PHL
PZL
PLZ
PLH
Output
Waveform 1
V
V
OH
V
V
/2
LOAD
V
V
V
M
M
Output
V
V
M
S1 at V
(see Note B)
V
+ V
LOAD
OL
∆
OL
OL
t
PHL
PLH
t
t
PZH
PHZ
− V
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
V
V
M
OH
∆
M
Output
M
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PHL
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
1P1G125QDCKRQ1
ACTIVE
SC70
DCK
5
3000
None
Call TI
Level-1-235C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,10
0,65
5
4
0,13 NOM
1,40 2,40
1,10 1,80
1
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
0,10
1,10
0,80
0,10
0,00
4093553-2/D 01/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-203
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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