COP472WM-3/63SN [TI]
COP472-3 Liquid Crystal Display Controller;
| 型号： | COP472WM-3/63SN |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | COP472-3 Liquid Crystal Display Controller |
| 文件： | 总10页 (文件大小：144K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
COP472-3
COP472-3 Liquid Crystal Display Controller
Literature Number: SNOSBQ3
July 1995
COP472-3 Liquid Crystal Display Controller
General Description
Features
Y
Direct interface to TRIPLEX LCD
The COP472–3 Liquid Crystal Display (LCD) Controller is a
peripheral member of the COPSTM family, fabricated using
CMOS technology. The COP472-3 drives a multiplexed liq-
uid crystal display directly. Data is loaded serially and is held
in internal latches. The COP472-3 contains an on-chip oscil-
lator and generates all the multi-level waveforms for back-
Y
Low power dissipation (100 mW typ.)
Y
Low cost
Y
Compatible with all COPS processors
Y
Needs no refresh from processor
Y
On-chip oscillator and latches
planes and segment outputs on
a triplex display. One
Y
Expandable to longer displays
COP472-3 can drive 36 segments multiplexed as 3 x 12
(4(/2 digit display). Two COP472-3 devices can be used to-
gether to drive 72 segments (3 x 24) which could be an 8(/2
digit display.
Y
Operates from display voltage
MICROWIRETM compatible serial I/O
Y
Y
20-pin Dual-In-Line package and 20-pin SO
Block Diagram
TL/DD/6932–1
COPSTM and MICROWIRETM are trademarks of National Semiconductor Corporation.
C
1996 National Semiconductor Corporation
TL/DD/6932
RRD-B30M56/Printed in U. S. A.
http://www.national.com
Absolute Maximum Ratings
b
a
0.3V to 9.5V
b
a
65 C to 150 C
Voltage at CS, DI, SK pins
Storage Temperature
§
§
b
a
0.3V
Voltage at all other Pins
0.3V to V
Lead Temp. (Soldering, 10 Seconds)
300 C
§
DD
Operating Temperature Range
0 C to 70 C
§ §
DC Electrical Characteristics
e
e
e
3.0V to 5.5V, T 0 C to 70 C (depends on display characteristics)
§
A
GND
0V, V
§
DD
Parameter
Power Supply Voltage, V
Conditions
Min
Max
5.5
Units
3.0
Volts
mA
DD
e
e
Power Supply Current, I (Note 1)
DD
V
V
5.5V
3V
250
100
DD
mA
DD
Input Levels
DI, SK, CS
V
V
0.8
9.5
Volts
Volts
IL
0.7 V
DD
IH
BPA (as Osc. in)
V
V
0.6
Volts
Volts
IL
b
V
DD
0.6
V
DD
IH
Output Levels, BPC (as Osc. Out)
V
V
0.4
Volts
Volts
OL
b
b
V
V
0.4
V
DD
OH
DD
Backplane Outputs (BPA, BPB, BPC)
V
V
ON
During
BPa Time
DV
V
Volts
Volts
BPA, BPB, BPC
DD
DD
b
a
OFF
(/3 V
DV
(/3 V
DV
BPA, BPB, BPC
DD
DD
V
V
ON
During
BPb Time
0
DV
Volts
Volts
BPA, BPB, BPC
b
a
DV
OFF
)/3 V
DV
)/3 V
BPA, BPB, BPC
DD
DD
E
Segment Outputs (SA
SA )
4
1
V
V
ON
During
BPa Time
0
DV
Volts
Volts
SEG
SEG
b
a
OFF
)/3 V
DV
DV
)/3 V
DV
DV
DD
DD
b
V
V
ON
During
BPb Time
V
DV
b
V
DD
Volts
Volts
SEG
DD
a
OFF
(/3 V
DD
(/3 V
DD
SEG
Internal Oscillator Frequency
15
2.4
39
4
80
kHz
ms
Hz
d
Frame Time (Int. Osc. 192)
12.8
208
250
Scan Frequency (1/T
SK Clock Frequency
SK Width
)
SCAN
kHz
ms
1.7
DI
Data Setup, t
1.0
ms
SETUP
Data Hold, t
100
ns
HOLD
CS
t
t
1.0
1.0
ms
ms
SETUP
HOLD
Output Loading Capacitance
100
pF
Note 1: Power supply current is measured in stand-alone mode with all outputs open and all inputs at V
.
DD
e
Note 2: DV 0.05V
.
DD
http://www.national.com
2
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
b
a
65 C to 150 C
Storage Temperature
Lead Temperature
§
§
(Soldering, 10 seconds)
300 C
§
b
a
0.3V to 9.5V
Voltage at CS, DI, SK Pins
Voltage at All Other Pins
b
a
0.3V
0.3V to V
DD
b
a
40 C to 85 C
Operating Temperature Range
§
§
DC Electrical Characteristics
e b
e
e
a
40 C to 85 C (depends on display characteristics)
GND
0V, V
3.0V to 5.5V, T
§
§
DD
A
Parameter
Power Supply Voltage, V
Conditions
Min
Max
5.5
Units
3.0
Volts
mA
DD
e
e
Power Supply Current, I (Note 1)
DD
V
V
5.5V
3V
300
120
DD
mA
DD
Input Levels
DI, SK, CS
V
V
0.8
9.5
Volts
Volts
IL
0.7 V
DD
IH
BPA (as Osc. In)
V
V
0.6
Volts
Volts
IL
b
V
DD
0.6
V
DD
IH
Output Levels, BPC (as Osc. Out)
V
V
0.4
Volts
Volts
OL
b
b
V
V
0.4
V
DD
OH
DD
Backplane Outputs (BPA, BPB, BPC)
V
V
ON
During
BPa Time
DV
V
Volts
Volts
BPA, BPB, BPC
DD
DD
b
a
OFF
(/3 V
DV
(/3 V
DV
BPA, BPB, BPC
DD
DD
V
V
ON
During
BPb Time
0
DV
Volts
Volts
BPA, BPB, BPC
b
a
DV
OFF
)/3 V
DV
)/3 V
BPA, BPB, BPC
DD
DD
E
Segment Outputs (SA
SA )
4
1
V
V
ON
During
BPa Time
0
DV
Volts
Volts
SEG
SEG
b
a
OFF
)/3 V
DV
DV
)/3 V
DV
DV
DD
DD
b
V
V
ON
During
BPb Time
V
DV
b
V
DD
Volts
Volts
SEG
DD
a
OFF
(/3 V
DD
(/3 V
DD
SEG
Internal Oscillator Frequency
15
2.4
39
4
80
kHz
ms
Hz
d
Frame Time (Int. Osc. 192)
12.8
208
250
Scan Frequency (1/T
SK Clock Frequency
SK Width
)
SCAN
kHz
ms
1.7
DI
Data Setup, t
1.0
ms
SETUP
Data Hold, t
100
ns
HOLD
CS
t
t
1.0
1.0
ms
ms
SETUP
HOLD
Output Loading Capacitance
100
pF
Note 1: Power supply current is measured in stand-alone mode with all outputs open and all inputs at V
.
DD
e
Note 2: DV
0.05 V
.
DD
3
http://www.national.com
Dual-In-Line Package
Pin
Description
CS
Chip select
V
Power supply (display voltage)
Ground
DD
GND
DI
Serial data input
SK
Serial clock input
BP
BP
BP
Display backplane A (or oscillator in)
Display backplane B
A
B
C
Display backplane C (or oscillator out)
12 multiplexed outputs
E
SA1 SC4
TL/DD/6932–2
Top View
Order Number COP472MW-3 or COP472N-3
See NS Package Number M20A or N20A
FIGURE 2. Connection Diagram
TL/DD/6932–3
FIGURE 3. Serial Load Timing Diagram
TL/DD/6932–4
FIGURE 4. Backplane and Segment Waveforms
TL/DD/6932–5
FIGURE 5. Typical Display Internal Connections
Epson LD-370
http://www.national.com
4
Functional Description
The COP472-3 drives 36 bits of display information orga-
nized as twelve segments and three backplanes. The
COP472-3 requires 40 information bits: 36 data and 4 con-
trol. The function of each control bit is described below.
Display information format is a function of the LCD intercon-
nections. A typical segment/backplane configuration is illus-
trated in Figure 5, with this configuration the COP472-3 will
drive 4 digits of 9 segments.
SEGMENT DATA BITS
Data is loaded in serially, in sets of eight bits. Each set of
segment data is in the following format:
SA
SB
SC
SD
SE
SF
SG
SH
Data is shifted into an eight bit shift register. The first bit of
the data is for segment H, digit 1. The eighth bit is segment
A, digit 1. A set of eight bits is shifted in and then loaded into
the digit one latches. The second set of 8 bits is loaded into
digit two latches. The third set into digit three latches, and
the fourth set is loaded into digit four latches.
To adapt the COP472-3 to any LCD display configuration,
the segment/backplane multiplex scheme is illustrated in
Table I.
Two or more COP472-3 chips can be cascaded to drive
additional segments. There is no limit to the number of
COP472-3’s that can be used as long as the output loading
capacitance does not exceed specification.
CONTROL BITS
The fifth set of 8 data bits contains special segment data
and control data in the following format:
SYNC
Q7
Q6
X
SP4
SP3
SP2
SP1
TABLE I. COP472-3 Segment/Backplane
Multiplex Scheme
The first four bits shifted in contain the special character
segment data. The fifth bit is not used. The sixth and sev-
enth bits program the COP472-3 as a stand alone LCD driv-
er or as a master or slave for cascading COP472-3’s. BPC
of the master is connected to BPA of each slave. The fol-
lowing table summarizes the function of bits six and seven:
Segment,
Backplane
Data to
Numeric Display
Bit Number
1
2
3
4
5
6
7
8
SA1, BPC
SB1, BPB
SC1, BPA
SC1, BPB
SB1, BPC
SA1, BPB
SA1, BPA
SB1, BPA
SH
SG
SF
SE
SD
SC
SB
SA
Q7 Q6
Function
Slave
BPC Output BPA Output
Digit 1
Digit 2
Digit 3
Digit 4
1
0
1
0
1
1
0
0
Backplane
Output
Oscillator
Input
Stand Alone Backplane
Output
Backplane
Output
9
10
11
12
13
14
15
16
SA2, BPC
SB2, BPB
SC2, BPA
SC2, BPB
SB2, BPC
SA2, BPB
SA2, BPA
SB2, BPA
SH
SG
SF
SE
SD
SC
SB
SA
Not Used
Internal
Oscillator
Osc. Output Input
Master
Internal
Backplane
Osc. Output Output
The eighth bit is used to synchronize two COP472-3’s to
drive an 8(/2-digit display.
17
18
19
20
21
22
23
24
SA3, BPC
SB3, BPB
SC3, BPA
SC3, BPB
SB3, BPC
SA3, BPB
SA3, BPA
SB3, BPA
SH
SG
SF
SE
SD
SC
SB
SA
25
26
27
28
29
30
31
32
SA4, BPC
SB4, BPB
SC4, BPA
SC4, BPB
SB4, BPC
SA4, BPB
SA4, BPA
SB4, BPA
SH
SG
SF
SE
SD
SC
SB
SA
33
34
35
36
37
38
39
40
SC1, BPC
SC2, BPC
SC3, BPC
SC4, BPC
not used
Q6
SPA
SP2
SP3
SP4
Digit 1
Digit 2
Digit 3
Digit 4
Q7
SYNC
5
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LOADING SEQUENCE TO DRIVE A 4(/2-DIGIT DISPLAY
Steps:
1. Turn CE low.
2. Clock in 8 bits of data for digit 1.
3. Clock in 8 bits of data for digit 2.
4. Clock in 8 bits of data for digit 3.
5. Clock in 8 bits of data for digit 4.
6. Clock in 8 bits of data for special segment and control
function of BPC and BPA.
0
0
1
1
SP4
SP3
SP2
SP1
7. Turn CS high.
Note: CS may be turned high after any step. For example to
load only 2 digits of data, do steps 1, 2, 3, and 7.
CS must make a high to low transition before loading data in
order to reset internal counters.
LOADING SEQUENCE TO DRIVE AN
8(/2-DIGIT DISPLAY
Two or more COP472-3’s may be connected together to
drive additional segments. An eight digit multiplexed display
is shown in Figure 7. The following is the loading sequence
to drive an eight digit display using two COP472-3’s. The
right chip is the master and the left the slave.
TL/DD/6932–6
FIGURE 6. System Diagram – 4(/2 Digit Display
Steps:
1. Turn CS low on both COP472-3’s.
2. Shift in 32 bits of data for the slave’s four digits.
3. Shift in 4 bits of special segment data: a zero and three
ones.
1
1
1
0
SP4
SP3
SP2
SP1
This synchronizes both the chips and BPA is oscillator
input. Both chips are now stopped.
4. Turn CS high to both chips.
5. Turn CS low to master COP472-3.
6. Shift in 32 bits of data for the master’s 4 digits.
7. Shift in four bits of special segment data, a one and
three zeros.
0
0
0
1
SP4
SP3
SP2
SP1
This sets the master COP472-3 to BPA as a normal
backplane output and BPC as oscillator output. Now
both the chips start and run off the same oscillator.
8. Turn CS high.
The chips are now synchronized and driving 8 digits of dis-
play. To load new data simply load each chip separately in
the normal manner, keeping the correct status bits to each
COP472-3 (0110 or 0001).
TL/DD/6932–7
FIGURE 7. System Diagram – 8(/2 Digit Display
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6
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Molded DIP (M)
Order Number COP472MW-3
NS Package Number M20B
7
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Molded DIP (N)
Order Number COP472N-3
NS Package Number N20A
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