CSD16301Q2 [TI]

N-Channel NexFET Power MOSFETs; N通道NexFET功率MOSFET
CSD16301Q2
型号: CSD16301Q2
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

N-Channel NexFET Power MOSFETs
N通道NexFET功率MOSFET

晶体 晶体管 功率场效应晶体管 开关 脉冲 光电二极管 PC
文件: 总10页 (文件大小:167K)
中文:  中文翻译
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CSD16301Q2  
www.ti.com.............................................................................................................................................................................................. SLPS235 OCTOBER 2009  
N-Channel NexFET™ Power MOSFETs  
Check for Samples: CSD16301Q2  
1
FEATURES  
Table 1. PRODUCT SUMMARY  
2
Ultralow Qg and Qgd  
Low Thermal Resistance  
Pb Free Terminal Plating  
RoHS Compliant  
VDS  
Qg  
Drain to Source Voltage  
Gate Charge Total (–4.5V)  
Gate Charge Gate to Drain  
25  
2
V
nC  
nC  
m  
mΩ  
mΩ  
V
Qgd  
0.4  
VGS = 3V  
27  
23  
19  
Halogen Free  
RDS(on) Drain to Source On Resistance  
VGS = 4.5V  
VGS = 8V  
SON 2-mm × 2-mm Plastic Package  
VGS(th)  
Threshold Voltage  
1.1  
APPLICATIONS  
DC-DC Converters  
Battery and Load Management Applications  
Text and br Added for Spacing  
ORDERING INFORMATION  
Device  
Package  
Media  
Qty  
Ship  
DESCRIPTION  
SON 2-mm × 2-mm  
Plastic Package  
13-Inch  
Reel  
Tape and  
Reel  
CSD16301Q2  
3000  
The NexFET™ power MOSFET has been designed  
to minimize losses in power conversion and load  
management applications. The SON 2x2 offers  
excellent thermal performance for the size of the  
package.  
Text and br Added for Spacing  
ABSOLUTE MAXIMUM RATINGS  
TA = 25°C unless otherwise stated  
VALUE  
UNIT  
V
VDS  
VGS  
Drain to Source Voltage  
25  
Top View  
Gate to Source Voltage  
+10 / –8  
V
Continuous Drain Current, TC = 25°C  
Continuous Drain Current(1)  
Pulsed Drain Current, TA = 25°C(2)  
Power Dissipation(1)  
5
5
A
ID  
D
D
G
1
2
3
6
5
4
D
D
S
A
D
IDM  
PD  
TJ,  
20  
2.3  
A
W
Operating Junction and Storage  
TSTG Temperature Range  
–55 to 150  
10  
°C  
Avalanche Energy, single pulse  
ID = 14A, L = 0.1mH, RG = 25Ω  
EAS  
mJ  
S
(1) Packaged Limited.  
P0108-01  
(2) Pulse duration 10μs, duty cycle 2%  
RDS(on) vs VGS  
GATE CHARGE  
80  
70  
60  
50  
40  
30  
20  
10  
0
8
I
V
= 4A  
I
D
= 4A  
D
7
6
5
4
3
2
1
0
= 12.5V  
DS  
T
= 125°C  
C
T
= 25°C  
C
0
1
2
3
4
5
6
7
8
9
10  
0.0  
0.5  
1.0  
1.5  
Q − Gate Charge − nC  
g
2.0  
2.5  
3.0  
3.5  
V
GS  
− Gate to Source Voltage − V  
G006  
G003  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NexFET is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009, Texas Instruments Incorporated  
CSD16301Q2  
SLPS235 OCTOBER 2009.............................................................................................................................................................................................. www.ti.com  
ELECTRICAL CHARACTERISTICS  
TA = 25°C, unless otherwise specified  
PARAMETER  
TEST CONDITIONS  
MIN TYP MAX UNIT  
Static Characteristics  
BVDSS  
IDSS  
Drain to Source Voltage  
VGS = 0V, ID = 250μA  
25  
V
μA  
nA  
V
Drain to Source Leakage Current  
Gate to Source Leakage Current  
Gate to Source Threshold Voltage  
VGS = 0V, VDS = 20V  
VDS = 0V, VGS = +10/–8V  
VDS = VGS, IDS = 250μA  
VGS = 3V, IDS = 4A  
1
100  
1.4  
34  
IGSS  
VGS(th)  
0.9  
1.1  
27  
mΩ  
mΩ  
mΩ  
S
RDS(on)  
Drain to Source On Resistance  
Transconductance  
VGS = 4.5V, IDS = 4A  
VGS = 8V, IDS = 4A  
23  
29  
19  
24  
gfs  
VDS = 15V, IDS = 4A  
16.5  
Dynamic Characteristics  
CISS  
COSS  
CRSS  
Rg  
Input Capacitance  
260  
165  
13  
340  
215  
17  
pF  
pF  
pF  
Output Capacitance  
Reverse Transfer Capacitance  
Series Gate Resistance  
Gate Charge Total (4.5V)  
Gate Charge – Gate to Drain  
Gate Charge Gate to Source  
Gate Charge at Vth  
Output Charge  
VGS = 0V, VDS = 12.5V, f = 1MHz  
1.3  
2
2.6  
2.8  
Qg  
nC  
nC  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
Qgd  
Qgs  
Qg(th)  
QOSS  
td(on)  
tr  
0.4  
0.6  
0.3  
3
VDS = 10V, IDS = 4A  
VDS = 12.5V, VGS = 0V  
Turn On Delay Time  
Rise Time  
2.7  
4.4  
4.1  
1.7  
VDS = 12.5V, VGS = 4.5V, IDS = 4A  
RG = 2Ω  
td(off)  
tf  
Turn Off Delay Time  
Fall Time  
Diode Characteristics  
VSD  
Qrr  
trr  
Diode Forward Voltage  
IDS = 4A, VGS = 0V  
0.8  
5.1  
11  
1
V
Reverse Recovery Charge  
Reverse Recovery Time  
VDD = 12.5V, IF = 4A, di/dt = 200A/μs  
VDD = 12.5V, IF = 4A, di/dt = 200A/μs  
nC  
ns  
THERMAL CHARACTERISTICS  
TA = 25°C, unless otherwise specified  
PARAMETER  
Thermal Resistance Junction to Case(1)  
Thermal Resistance Junction to Ambient(1) (2)  
MIN  
TYP  
MAX  
UNIT  
°C/W  
°C/W  
RθJC  
RθJA  
8.4  
69  
(1)  
R
θJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm ×  
3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.  
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.  
2
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Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): CSD16301Q2  
CSD16301Q2  
www.ti.com.............................................................................................................................................................................................. SLPS235 OCTOBER 2009  
GATE  
Source  
GATE  
Source  
Max RθJA = 69°C/W  
when mounted on  
1 inch2 (6.45 cm2) of  
2-oz. (0.071-mm thick)  
Cu.  
Max RθJA = 220°C/W  
when mounted on  
minimum pad area of  
2-oz. (0.071-mm thick)  
Cu.  
DRAIN  
DRAIN  
M0164-02  
M0164-01  
TYPICAL MOSFET CHARACTERISTICS  
TA = 25°C, unless otherwise specified  
10  
1
0.5  
0.3  
0.1  
0.1  
Duty Cycle = t /t  
1
2
0.05  
P
0.02  
0.01  
t
1
0.01  
t
2
Single Pulse  
Typical R  
= 177oC/W (min Cu)  
x R  
qJA  
T
= P x Z  
qJA  
J
qJA  
0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1k  
t
− Pulse Duration − s  
P
G012  
Figure 1. Transient Thermal Impedance  
Copyright © 2009, Texas Instruments Incorporated  
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3
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SLPS235 OCTOBER 2009.............................................................................................................................................................................................. www.ti.com  
TYPICAL MOSFET CHARACTERISTICS (continued)  
TA = 25°C, unless otherwise specified  
10  
9
8
7
6
5
4
3
2
1
0
10  
9
8
7
6
5
4
3
2
1
0
V
DS  
= 5V  
V
= 4.5V  
GS  
V
= 3.5V  
= 2.5V  
GS  
T = 125°C  
C
V
GS  
T
= 25°C  
C
V
GS  
= 2V  
V
GS  
= 1.5V  
T
= −55°C  
C
0.0  
0.5  
1.0  
1.5  
2.0  
1.00  
1.25  
1.50  
1.75  
2.00  
2.25  
2.50  
V
DS  
− Drain to Source Voltage − V  
V
GS  
− Gate to Source Voltage − V  
G001  
G002  
Figure 2. Saturation Characteristics  
Figure 3. Transfer Characteristics  
8
7
6
5
4
3
2
1
0
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
I
V
= 4A  
f = 1MHz  
= 0V  
D
= 12.5V  
V
DS  
GS  
C
OSS  
= C + C  
DS GD  
C
ISS  
= C  
+ C  
GD GS  
C
RSS  
= C  
GD  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
0
5
10  
15  
20  
25  
Q
− Gate Charge − nC  
V
DS  
− Drain to Source Voltage − V  
g
G003  
G004  
Figure 4. Gate Charge  
Figure 5. Capacitance  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
80  
70  
60  
50  
40  
30  
20  
10  
0
I
D
= 250µA  
I
D
= 4A  
T
= 125°C  
C
T
= 25°C  
C
−75  
−25  
25  
75  
125  
175  
0
1
2
3
4
5
6
7
8
9
10  
T
− Case Temperature − °C  
V
GS  
− Gate to Source Voltage − V  
C
G005  
G006  
Figure 6. Threshold Voltage vs. Temperature  
Figure 7. On-State Resistance vs. Gate to Source Voltage  
4
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Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): CSD16301Q2  
CSD16301Q2  
www.ti.com.............................................................................................................................................................................................. SLPS235 OCTOBER 2009  
TYPICAL MOSFET CHARACTERISTICS (continued)  
TA = 25°C, unless otherwise specified  
10  
1
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
I
V
= 4A  
D
= 4.5V  
GS  
0.1  
T
= 125°C  
C
0.01  
0.001  
0.0001  
T
= 25°C  
C
−75  
−25  
25  
75  
125  
175  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
T
− Case Temperature − °C  
V
SD  
− Source to Drain Voltage − V  
C
G007  
G008  
Figure 8. Normalized On-State Resistance vs. Temperature  
Figure 9. Typical Diode Forward Voltage  
100  
100  
100ms  
10  
T
= 25oC  
C
1ms  
T
= 125oC  
10  
1
C
10ms  
Area Limited  
100ms  
by R  
DS(on)  
0.1  
1s  
Single Pulse  
Typical R  
= 177oC/W (min Cu)  
DC  
qJA  
1
0.01  
0.01  
0.1  
t
1
10  
100  
0.01  
0.1  
1
10  
100  
V
- Drain Voltage - V  
− Time in Avalanche − ms  
D
(AV)  
G009  
Figure 10. Maximum Safe Operating Area  
Figure 11.  
6
5
4
3
2
1
0
−50 −25  
0
25  
50  
75  
100 125 150 175  
T
− Case Temperature − °C  
C
G011  
Figure 12. Maximum Drain Current vs. Temperature  
Copyright © 2009, Texas Instruments Incorporated  
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5
Product Folder Link(s): CSD16301Q2  
CSD16301Q2  
SLPS235 OCTOBER 2009.............................................................................................................................................................................................. www.ti.com  
MECHANICAL DATA  
Q2 Package Dimensions  
D2  
D
5
K2  
K1  
K3  
6
4
4
5
6
1
2
3
3
2
1
Pin 1 ID  
b
e
Pin 1 Dot  
Top View  
D1  
Bottom View  
M0165-01  
Front View  
DIM  
MILLIMETERS  
NOM  
INCHES  
NOM  
MIN  
MAX  
0.800  
0.050  
0.350  
MIN  
MAX  
0.032  
0.002  
0.014  
A
A1  
b
0.700  
0.000  
0.250  
0.750  
0.028  
0.000  
0.010  
0.030  
0.300  
0.203 TYP  
2.000 TYP  
0.950  
0.012  
C
0.008 TYP  
0.080 TYP  
0.038  
D
D1  
D2  
E
0.900  
0.900  
1.000  
1.100  
0.036  
0.036  
0.040  
0.044  
0.300 TYP  
2.000 TYP  
1.000  
0.012 TYP  
0.080 TYP  
0.040  
E1  
E2  
E3  
e
0.280 TYP  
0.470 TYP  
0.650 BSC  
0.280 TYP  
0.350 TYP  
0.200 TYP  
0.200 TYP  
0.470 TYP  
0.25  
0.0112 TYP  
0.0188 TYP  
0.026 TYP  
0.0112 TYP  
0.014 TYP  
0.008 TYP  
0.008 TYP  
0.0188 TYP  
0.010  
K
K1  
K2  
K3  
K4  
L
0.200  
0.300  
0.008  
0.012  
6
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Product Folder Link(s): CSD16301Q2  
CSD16301Q2  
www.ti.com.............................................................................................................................................................................................. SLPS235 OCTOBER 2009  
For recommended circuit layout for PCB designs, see  
Recommended PCB Pattern  
application note SLPA005  
Reducing Ringing  
Through PCB Layout Techniques.  
0.65 TYP  
0.85  
2.30  
1.40  
1.10  
1.05  
1
0.46  
0.40 TYP  
0.25  
M0167-01  
Q2 Tape and Reel Information  
4.00 0.10  
2.00 0.0ꢀ  
Ø 1.ꢀ0 0.10  
10° Max  
4.00 0.10  
Ø 1.00 0.2ꢀ  
1.00 0.0ꢀ  
0.2ꢀ4 0.02  
10° Max  
2.30 0.0ꢀ  
M0168-01  
Notes:  
1. Measured from centerline of spocket hole to centerline of pocket  
2. Cumulative tolerance of 10 sprocket holes is ±0.20  
3. Measured from centerline of sprocket hole to centerline of pocket  
4. Other material available  
5. Typical SR of form tape Max 109 OHM/SQ  
6. All dimensions are in mm, unless otherwise specified.  
Copyright © 2009, Texas Instruments Incorporated  
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7
Product Folder Link(s): CSD16301Q2  
CSD16301Q2  
SLPS235 OCTOBER 2009.............................................................................................................................................................................................. www.ti.com  
Package Marking Information  
Location  
Top View  
Bottom View  
1st Line  
6
4
4
6
NNNN  
= 4-digit Product Code  
2nd Line (Date Code)  
Y
= Last digit of the Year  
WW  
C
= 2-digit Work Week  
= Country of Origin  
> Philippines = P  
> Taiwan = T  
NNNN  
YWWC  
> China = C  
> Malaysia = M  
1
3
3
1
Product Code = CSD16301  
NNNN Mark = 1631  
Pin 1  
Identifier  
M0166-01  
8
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PACKAGE OPTION ADDENDUM  
www.ti.com  
16-Oct-2009  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
CSD16301Q2  
ACTIVE  
SON  
DQK  
6
3000 Green (RoHS &  
no Sb/Br)  
Call TI  
Level-2-260C-1 YEAR  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
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Addendum-Page 1  
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