CSD17585F5T [TI]
采用 0.8mm x 1.5mm LGA 封装、具有栅极 ESD 保护的单路、33mΩ、30V、N 沟道 NexFET™ 功率 MOSFET | YJK | 3 | -55 to 150;
| 型号： | CSD17585F5T |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 0.8mm x 1.5mm LGA 封装、具有栅极 ESD 保护的单路、33mΩ、30V、N 沟道 NexFET™ 功率 MOSFET | YJK | 3 | -55 to 150 栅 栅极 |
| 文件： | 总14页 (文件大小：1833K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
CSD17585F5 30V N 沟道FemtoFET™ MOSFET
产品概要
1 特性
TA = 25°C
VDS
典型值
单位
30
V
漏源电压
• 低导通电阻
• 超低Qg 和Qgd
• 超小尺寸
Qg
1.9
nC
nC
栅极电荷总量(4.5V)
Qgd
0.39
栅极电荷（栅极到漏极）
漏源导通电阻
VGS = 4.5V
VGS = 10V
1.3
26
22
– 1.53mm x 0.77mm
• 薄型封装
RDS(on)
VGS(th)
mΩ
V
阈值电压
– 厚度为0.36mm
• 集成型ESD 保护二极管
器件信息
– 额定值> 4kV HBM
– 额定值> 2kV CDM
• 无铅且无卤素
器件(1)
数量
介质
封装
配送
CSD17585F5
3000
Femto
1.53mm × 0.77mm
7 英寸卷带
卷带包装
CSD17585F5T
250
无引线SMD
• 符合RoHS
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
2 应用
• 针对工业负载开关应用进行了优化
• 针对通用开关应用进行了优化
绝对最大额定值
TA = 25°C
值
30
单位
V
VDS
3 说明
漏源电压
VGS
ID
IDM
PD
+20
V
栅源电压
该 30V、22mΩ N 沟道 FemtoFET™ MOSFET 技术经
过设计和优化，能够最大限度地减小在许多手持式和移
动应用中占用的空间。这项技术能够在替代标准小信号
MOSFET 的同时大幅减小封装尺寸。
持续漏极电流(1)
持续漏极电流(2)
脉冲漏极电流(1) (3)
功率耗散(1)
3.6
5.9
34
0.5
1.4
4
A
A
W
。
功率耗散(2)
人体放电模型(HBM)
充电器件模型(CDM)
V(ESD)
kV
°C
2
0.36 mm
TJ、
Tstg
–55 至
150
工作结温、
贮存温度
(1)
RθJA = 245°C/W（覆铜面积最小时的典型值）。
(2) 覆铜面积最大时的典型RθJA = 90°C/W。
(3) 脉冲持续时间≤100μs，占空比≤1%。
0.77 mm
1.53 mm
G
S
图3-1. 典型器件尺寸
.
.
.
.
.
D
图3-2. 顶视图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLPS610
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
www.ti.com.cn
Table of Contents
6 Device and Documentation Support..............................7
6.1 Receiving Notification of Documentation Updates......7
6.2 Trademarks.................................................................7
7 Mechanical, Packaging, and Orderable Information....8
7.1 Mechanical Dimensions..............................................8
7.2 Recommended Minimum PCB Layout........................9
7.3 Recommended Stencil Pattern................................... 9
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Specifications.................................................................. 3
5.1 Electrical Characteristics.............................................3
5.2 Thermal Information....................................................3
5.3 Typical MOSFET Characteristics................................4
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision B (February 2022) to Revision C (June 2022)
Page
• 恢复了首页关键图以匹配SLPS610A..................................................................................................................1
• Restored layout of images to match SLPS610A.................................................................................................4
Changes from Revision A (December 2016) to Revision B (February 2022)
Page
• 将超薄型封装要点中的厚度从0.35mm 更改为0.36mm..................................................................................... 1
• 将超薄型封装图片中的厚度从0.35mm 更新为0.36mm..................................................................................... 1
• Changed ultra-low profile image height from 0.35 mm to 0.36 mm....................................................................8
• Added FemtoFET Surface Mount Guide note.................................................................................................... 9
Changes from Revision * (October 2016) to Revision A (December 2016)
Page
• Changed 图5-2 in the Typical MOSFET Characteristics section....................................................................... 4
• Added 表7-1 in the Mechanical Dimensions section......................................................................................... 8
Copyright © 2022 Texas Instruments Incorporated
2
Submit Document Feedback
Product Folder Links: CSD17585F5
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
www.ti.com.cn
5 Specifications
5.1 Electrical Characteristics
TA = 25°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STATIC CHARACTERISTICS
BVDSS
IDSS
Drain-to-source voltage
30
V
nA
nA
V
VGS = 0 V, IDS = 250 μA
Drain-to-source leakage current
Gate-to-source leakage current
Gate-to-source threshold voltage
VGS = 0 V, VDS = 24 V
VDS = 0 V, VGS = 20 V
VDS = VGS, IDS = 250 μA
VGS = 4.5 V, IDS = 0.9 A
VGS = 10 V, IDS = 0.9 A
VDS = 3 V, IDS = 0.9 A
100
50
IGSS
VGS(th)
0.9
1.3
26
22
7
1.7
33
RDS(on)
gfs
Drain-to-source on resistance
Transconductance
mΩ
27
S
DYNAMIC CHARACTERISTICS
Ciss
Coss
Crss
RG
Input capacitance
292
166
5.7
34
380
215
7.4
pF
pF
pF
VGS = 0 V, VDS = 15 V,
ƒ= 1 MHz
Output capacitance
Reverse transfer capacitance
Series gate resistance
Gate charge total (4.5 V)
Gate charge total (10 V)
Gate charge gate-to-drain
Gate charge gate-to-source
Gate charge at Vth
Output charge
Ω
Qg
1.9
3.9
0.39
0.53
0.42
4.1
4
2.4
5.1
nC
nC
nC
nC
nC
nC
ns
Qg
Qgd
Qgs
Qg(th)
Qoss
td(on)
tr
VDS = 15 V, IDS = 0.9 A
VDS = 15 V, VGS = 0 V
Turnon delay time
Rise time
4
ns
VDS = 15 V, VGS = 4.5 V,
IDS = 0.9 A, RG = 2 Ω
td(off)
tf
Turnoff delay time
31
ns
Fall time
11
ns
DIODE CHARACTERISTICS
VSD Diode forward voltage
ISD = 0.9 A, VGS = 0 V
0.74
1.0
V
5.2 Thermal Information
TA = 25°C (unless otherwise stated)
THERMAL METRIC
Junction-to-ambient thermal resistance(1)
Junction-to-ambient thermal resistance(2)
MIN
TYP
MAX
UNIT
90
RθJA
°C/W
245
(1) Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.
(2) Device mounted on FR4 material with minimum Cu mounting area.
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: CSD17585F5
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
www.ti.com.cn
5.3 Typical MOSFET Characteristics
TA = 25°C (unless otherwise stated)
图5-1. Transient Thermal Impedance
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
TC = 125° C
TC = 25° C
TC = -55° C
VGS = 4.5 V
VGS = 6 V
VGS = 10 V
0
0.03 0.06 0.09 0.12 0.15 0.18 0.21 0.24 0.27 0.3
VDS - Drain-to-Source Voltage (V)
1
1.25
1.5
1.75
2
VGS - Gate-to-Source Voltage (V)
2.25
2.5
D002
D003
VDS = 5 V
图5-2. Saturation Characteristics
图5-3. Transfer Characteristics
Copyright © 2022 Texas Instruments Incorporated
4
Submit Document Feedback
Product Folder Links: CSD17585F5
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
www.ti.com.cn
5.3 Typical MOSFET Characteristics (continued)
TA = 25°C (unless otherwise stated)
1000
100
10
10
9
8
7
6
5
4
3
2
1
0
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
1
0
5
10
15
20
VDS - Drain-to-Source Voltage (V)
25
30
0
0.5
1
1.5
2
2.5
3
Qg - Gate Charge (nC)
3.5
4
4.5
5
D005
D004
ID = 0.9 A
VDS = 15 V
图5-5. Capacitance
图5-4. Gate Charge
1.7
80
70
60
50
40
30
20
10
TC = 25° C, ID = 0.9 A
TC = 125° C, ID = 0.9 A
1.6
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0
0
-75 -50 -25
0
25
TC - Case Temperature (° C)
50
75 100 125 150 175
2
4
6
8
10
12
VGS - Gate-to-Source Voltage (V)
14
16
18
20
D007
D006
ID = 250 µA
图5-7. On-State Resistance vs Gate-to-Source Voltage
图5-6. Threshold Voltage vs Temperature
10
1.6
1.5
1.4
1.3
1.2
1.1
1
TC = -55° C
TC = -40° C
TC = 25° C
TC = 125° C
TC = 150° C
VGS = 4.5 V
VGS = 10 V
1
0.1
0.01
0.9
0.8
0.7
0.6
0.001
0.0001
0
0.2
0.4
0.6
VSD - Source-to-Drain Voltage (V)
0.8
1
-75 -50 -25
0
25
50
TC - Case Temperature (° C)
75 100 125 150 175
D009
D008
ID = 0.9 A
图5-9. Typical Diode Forward Voltage
图5-8. Normalized On-State Resistance vs Temperature
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
5
Product Folder Links: CSD17585F5
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
www.ti.com.cn
5.3 Typical MOSFET Characteristics (continued)
TA = 25°C (unless otherwise stated)
100
100
10
1
TC = 25è C
TC = 125è C
10
1
100 ms
10 ms
1 ms
100 µs
10 µs
0.1
0.01
0.1
TAV - Time in Avalanche (ms)
1
0.1
1
10
VDS - Drain-to-Source Voltage (V)
100
D011
D010
Single pulse, typ RθJA = 245°C/W
图5-11. Single Pulse Unclamped Inductive Switching
图5-10. Maximum Safe Operating Area (SOA)
6
5
4
3
2
1
0
-50
-25
0
25
50
TA - Case Temperature (° C)
75
100 125 150 175
D012
Typ RθJA = 245°C/W
图5-12. Maximum Drain Current vs Temperature
Copyright © 2022 Texas Instruments Incorporated
6
Submit Document Feedback
Product Folder Links: CSD17585F5
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
www.ti.com.cn
6 Device and Documentation Support
6.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
6.2 Trademarks
FemtoFET™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
7
Product Folder Links: CSD17585F5
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
www.ti.com.cn
7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 Mechanical Dimensions
0.77
0.69
B
A
PIN 1 INDEX AREA
1.53
1.45
C
0.36 MAX
SEATING PLANE
3
0.5
(R0.05) TYP
1
1
0.16
0.14
3X
0.015
TOP B
A
0.40
0.38
3X
4222132/A 06/2015
A. All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994).
B. This drawing is subject to change without notice.
C. This package is a PB-free solder land design.
表7-1. Pin Configuration
POSITION
DESIGNATION
Pin 1
Gate
Pin 2
Source
Pin 3
Drain
Copyright © 2022 Texas Instruments Incorporated
8
Submit Document Feedback
Product Folder Links: CSD17585F5
CSD17585F5
ZHCSFM2C –OCTOBER 2016 –REVISED JUNE 2022
www.ti.com.cn
7.2 Recommended Minimum PCB Layout
3X (0.39)
(0.05) MIN
ALL AROUND
1
(R0.05) TYP
SYMM
3X (0.15)
SOLDER MASK
OPENING
TYP
(0.5)
3
METAL UNDER
SOLDER MASK
TYP
SYMM
A. All dimensions are in millimeters.
B. For more information, see FemtoFET Surface Mount Guide (SLRA003D).
7.3 Recommended Stencil Pattern
3X (0.39)
1
3X (0.2)
(R0.05) TYP
2X (0.15)
SYMM
(0.15)
(0.525)
3
SOLDER MASK EDGE
TYP
SYMM
A. All dimensions are in millimeters.
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
9
Product Folder Links: CSD17585F5
PACKAGE OPTION ADDENDUM
www.ti.com
26-Apr-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CSD17585F5
ACTIVE
ACTIVE
PICOSTAR
PICOSTAR
YJK
YJK
3
3
3000 RoHS & Green
250 RoHS & Green
NIAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 150
-55 to 150
4U
4U
CSD17585F5T
NIAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Apr-2022
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CSD17585F5
CSD17585F5
CSD17585F5T
CSD17585F5T
PICOST
AR
YJK
YJK
YJK
YJK
3
3
3
3
3000
3000
250
180.0
178.0
178.0
180.0
8.4
8.4
8.4
8.4
0.92
0.92
0.92
0.92
1.68
1.68
1.68
1.68
0.42
0.42
0.42
0.42
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q1
Q1
Q1
Q1
PICOST
AR
PICOST
AR
PICOST
AR
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CSD17585F5
CSD17585F5
CSD17585F5T
CSD17585F5T
PICOSTAR
PICOSTAR
PICOSTAR
PICOSTAR
YJK
YJK
YJK
YJK
3
3
3
3
3000
3000
250
182.0
220.0
220.0
182.0
182.0
220.0
220.0
182.0
20.0
35.0
35.0
20.0
250
Pack Materials-Page 2
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022，德州仪器 (TI) 公司
相关型号：
CSD18503Q5A_12
The NexFET power MOSFET has been designed to minimize losses in power conversion applications.
TI
©2020 ICPDF网 联系我们和版权申明