CY54FCT245ATLMB [TI]
8-Bit Transceiver; 8位收发器
| 型号： | CY54FCT245ATLMB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-Bit Transceiver |
| 文件： | 总7页 (文件大小：93K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY54/74FCT245T
SCCS018 - May 1994 - Revised February 2000
8-Bit Transceiver
Functional Description
Features
• Function, pinout, and drive compatible with FCT, and
The FCT245T contains eight non-inverting bidirectional buff-
ers with three-state outputs and is intended for bus oriented
applications. For the FCT245T, current sinking capability is 64
mA at the A and B ports.
F logic
• FCT-D speed at 3.8 ns max. (Com’l),
FCT-C speed at 4.1 ns max. (Com’l),
FCT-A speed at 4.6 ns max. (Com’l)
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
The Transmit/Receiver (T/R) input determines the direction of
data flow through bidirectional transceiver. Transmit (Active
HIGH) enables data from A ports to B ports. The output enable
(OE), when HIGH, disables both the A and B ports by putting
them in a High Z condition.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
• ESD > 2000V
• Matched rise and fall times
• Fully compatible with TTL input and output logic levels
• Extended commercial range of −40˚C to +85˚C
• Sink current
Source current
64 mA (Com’l), 48 mA (Mil)
32 mA (Com’l), 12 mA (Mil)
Logic Block Diagram
Pin Configurations
T/R
OE
A
0
B
0
DIP/SOIC/QSOP
Top View
LCC
A
1
Top View
T/R
V
CC
1
B
B
20
1
2
A
0
OE
2
3
4
5
6
19
A
2
A
1
B
0
18
17
16
7
6 5 4
8
A
A
2
B
B
B
B
B
B
B
7
1
2
3
4
5
6
7
A
9
1
3
2
1
GND
A
0
A
3
10
11
A
3
B
B
7
T/R
A
4
15
14
B
3
12
13
V
CC
20
19
6
5
A
5
7
B
OE
A
4
A
6
8
13
12
11
1516 17 18
14
A
7
9
B
B
4
5
GND
10
A
5
A
6
B
B
6
7
A
7
Function Table[1]
OE
L
T/R
L
Operation
B Data to Bus A
A Data to Bus B
High Z State
L
H
H
X
Note:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
Copyright © 2000, Texas Instruments Incorporated
CY54/74FCT245T
Maximum Ratings[2,3]
Power Dissipation..........................................................0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Storage Temperature .....................................−65°C to +150°C
Operating Range
Ambient Temperature with
Power Applied..................................................−65°C to +135°C
Ambient
Temperature
Range
Range
VCC
Supply Voltage to Ground Potential..................−0.5V to +7.0V
DC Input Voltage .................................................−0.5V to +7.0V
DC Output Voltage ..............................................−0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin).......120 mA
Commercial DT
0°C to +70°C
5V ± 5%
5V ± 5%
5V ± 10%
Commercial T, AT, CT
−40°C to +85°C
−55°C to +125°C
Military[4]
All
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
VCC=Min., IOH=−32 mA
Min.
2.0
Typ.[5]
Max.
Unit
V
VOH
Output HIGH Voltage
Com’l
Com’l
Mil
VCC=Min., IOH=−15 mA
VCC=Min., IOH=−12 mA
VCC=Min., IOL=64 mA
VCC=Min., IOL=48mA
2.4
3.3
3.3
0.3
0.3
V
2.4
V
VOL
Output LOW Voltage
Com’l
Mil
0.55
0.55
V
V
VIH
VIL
VH
VIK
II
Input HIGH Voltage
Input LOW Voltage
Hysteresis[6]
2.0
V
0.8
V
All inputs
0.2
V
Input Clamp Diode Voltage
Input HIGH Current
Input HIGH Current
Input LOW Current
VCC=Min., IIN=−18 mA
VCC=Max., VIN=VCC
VCC=Max., VIN=2.7V
VCC=Max., VIN=0.5V
−0.7
−1.2
5
V
µA
µA
µA
mA
µA
IIH
±1
IIL
±1
IOS
IOFF
Output Short Circuit Current[7] VCC=Max., VOUT=0.0V
−60
−120
−225
±1
Power-Off Disable
VCC=0V, VOUT=4.5V
Capacitance[6]
Parameter
Description
Typ.[5]
Max.
10
Unit
CIN
Input Capacitance
Output Capacitance
5
9
pF
pF
COUT
12
Notes:
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
2
CY54/74FCT245T
Power Supply Characteristics
Parameter
ICC
Description
Test Conditions
Typ.[5]
0.1
Max.
0.2
Unit
mA
mA
Quiescent Power Supply Current
VCC=Max., VIN≤0.2V, VIN≥VCC−0.2V
VCC=Max., VIN=3.4V,[8]
f1=0, Outputs Open
∆ICC
Quiescent Power Supply Current
(TTL inputs HIGH)
0.5
2.0
ICCD
Dynamic Power Supply Current[9]
VCC=Max., One Input Toggling,
50% Duty Cycle, Outputs Open,
T/R or OE=GND and
0.06
0.7
0.12
1.4
mA/MHz
V
IN≤0.2V or VIN≥VCC−0.2V
IC
Total Power Supply Current[10]
VCC=Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
T/R or OE=GND and
mA
V
IN≤0.2V or VIN≥VCC−0.2V
VCC=Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
T/R or OE=GND and VIN=3.4V or VIN=GND
1.2
1.3
3.4
mA
mA
VCC=Max., 50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
T/R or OE=GND and
2.6[11]
V
IN≤0.2V or VIN≥VCC−0.2V
VCC=Max., 50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
3.3
10.6[11]
mA
T/R or OE=GND and VIN=3.4V or VIN=GND
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY54/74FCT245T
Switching Characteristics Over the Operating Range
FCT245T
FCT245AT
Military Commercial
Min.[12] Max. Min.[12] Max. Min.[12] Max. Min.[12] Max.
Military
Commercial
Fig.
Parameter
Description
Unit
No.[13]
tPLH
tPHL
Propagation Delay
A to B or B to A
1.5
1.5
1.5
7.5
1.5
1.5
1.5
7.0
9.5
7.5
1.5
1.5
1.5
4.9
6.5
6.0
1.5
1.5
1.5
4.6
6.2
5.0
ns
1, 3
tPZH
tPZL
Output Enable Time
OE or T/R to A or B
10.0
10.0
ns
ns
1, 7, 8
1, 7, 8
tPHZ
tPLZ
Output Disable Time
OE or T/R to A or B
Switching Characteristics Over the Operating Range (continued)
FCT245CT
FCT245DT
Military
Commercial
Commercial
Fig.
Parameter
Description
Propagation Delay
A to B or B to A
Min.[12] Max. Min.[12] Max. Min.[12] Max.
Unit
No.[13]
tPLH
tPHL
1.5
1.5
1.5
4.5
6.2
5.2
1.5
1.5
1.5
4.1
5.8
4.8
1.5
1.5
1.5
3.8
5.0
4.3
ns
ns
ns
1, 3
tPZH
tPZL
Output Enable Time
OE or T/R to A or B
1, 7, 8
1, 7, 8
tPHZ
tPLZ
Output Disable Time
OE or T/R to A or B
Ordering Information
Speed
(ns)
Package
Name
Operating
Range
Ordering Code
Package Type
3.8
CY74FCT245DTQCT
CY74FCT245DTSOC/SOCT
CY74FCT245CTQCT
CY74FCT245CTSOC/SOCT
CY54FCT245CTDMB
CY54FCT245CTLMB
CY74FCT245ATPC
Q5
S5
20-Lead (150-Mil) QSOP
Commercial
Commercial
Military
20-Lead (300-Mil) Molded SOIC
20-Lead (150-Mil) QSOP
4.1
4.5
4.6
Q5
S5
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
D6
L61
P5
20-Square Leadless Chip Carrier
20-Lead (300-Mil) Molded DIP
20-Lead (150-Mil) QSOP
Commercial
CY74FCT245ATQCT
CY74FCT245ATSOC/SOCT
CY54FCT245ATDMB
CY54FCT245ATLMB
CY74FCT245TQCT
Q5
S5
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
4.9
7.0
D6
L61
Q5
S5
Military
20-Square Leadless Chip Carrier
20-Lead (150-Mil) QSOP
Commercial
Military
CY74FCT245TSOC/SOCT
CY54FCT245TDMB
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
7.5
D6
L61
CY54FCT245TLMB
20-Square Leadless Chip Carrier
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
Document #: 38−00318−B
4
CY54/74FCT245T
Package Diagrams
20-Lead (300-Mil) CerDIP D6
MIL−STD−1835 D−8 Config.A
20-Pin Square Leadless Chip Carrier L61
MIL−STD−1835 C−2A
20-Lead (300-Mil) Molded DIP P5
5
CY54/74FCT245T
Package Diagrams (continued)
20-Lead Quarter Size Outline Q5
20-Lead (300-Mil) Molded SOIC S5
6
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Copyright 2000, Texas Instruments Incorporated
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