CY54FCT574ATLMB [TI]
8-Bit Registers; 8位寄存器型号: | CY54FCT574ATLMB |
厂家: | TEXAS INSTRUMENTS |
描述: | 8-Bit Registers |
文件: | 总9页 (文件大小:100K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY54/74FCT374T
CY54/74FCT574T
8-Bit Registers
SCCS022 - May 1994 - Revised February 2000
• Matched rise and fall times
Features
• Fully compatible with TTL input and output logic levels
• ESD > 2000V
• Extended commercial range of −40˚C to +85˚C
• Function, pinout, and drive compatible with FCT and
F logic
• FCT-C speed at 5.2 ns max. (Com’l)
FCT-A speed at 6.5 ns max. (Com’l)
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
• Sink Current
Source Current
64 mA (Com’l), 32 mA (Mil)
32 mA (Com’l), 12 mA (Mil)
• Edge-triggered D-type inputs
• 250 MHz typical toggle rate
• Edge-rate control circuitry for significantly improved
noise characteristics
1CY54/74FCT574T
• Power-off disable feature
Logic Block Diagram
D
D
D
2
D
3
D
4
D
D
D
7
0
1
5
6
CP
CP
D
Q
CP
D
CP
D
CP
D
CP
D
Q
CP
D
Q
CP
D
CP
D
Q
Q
Q
Q
Q
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
FCT374T–6
Pin Configurations
DIP/SOIC/QSOP
Top View
DIP/SOIC/QSOP
Top View
LCC
Top View
LCC
Top View
OE
OE
1
1
2
3
4
5
6
7
8
9
V
V
CC
20
20
19
18
17
CC
O
D
D
0
O
O
0
2
3
4
5
6
7
8
9
19
18
17
16
7
0
1
2
3
4
5
6
D
D
1
O
O
O
O
O
O
0
1
7
6
7
6 5 4
8
7
6 5 4
8
D
D
2
D
D
D
D
7
1
O
3
D
9
3
2
1
0
FCT574T
9
3
2
1
O
O
D
D
3
O
O
D
1
2
6
5
16
GND
CP
0
10
11
GND
CP
O
0
10
11
FCT374T
FCT574T
OE
D
4
FCT374T
15
14
15
14
OE
V
O
7
V
CC
D
5
12
13
O
4
2
3
20
19
5
4
CC
12
13
20
19
O
6
O
0
D
4
O
D
D
D
6
13
12
11
13
12
7
1516 17 18
14
1516 17 18
14
O
3
D
7
O
O
7
4
GND
GND
10
CP
10
11
CP
FCT374T–1
FCT374T–2
FCT374T–3
FCT374T–4
Logic Symbol
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP
OE
O
O
1
O
2
O
3
O
4
O
5
O
6
O
7
0
FCT374T–5
Copyright © 2000, Texas Instruments Incorporated
CY54/74FCT374T
CY54/74FCT574T
Functional Description
Maximum Ratings[2, 3]
The FCT374T and FCT574T are high-speed low-power octal
D-type flip-flops featuring separate D-type inputs for each
flip-flop. Both devices have three-state outputs for bus oriented
applications. A buffered clock (CP) and output enable (OE) are
common to all flip-flops. The FCT574T is identical to FCT374T
except for flow-through pinout to simplify board design. The
eight flip-flops contained in the FCT374T and FCT574T will
store the state of their individual D inputs that meet the set-up
and hold time requirements on the LOW-to-HIGH clock (CP)
transition. When OE is LOW, the contents of the eight flip-flops
are available at the outputs. When OE is HIGH, the outputs will
be in the high-impedance state. The state of output enable
does not affect the state of the flip-flops.
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ..................................-65°C to +150°C
Ambient Temperature with
Power Applied............................................. –65°C to +135°C
Supply Voltage to Ground Potential............... –0.5V to +7.0V
DC Input Voltage ........................................... –0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......120 mA
Power Dissipation..........................................................0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Function Table[1]
Operating Range
Inputs
CP
Outputs
Ambient
D
H
L
OE
L
O
H
L
Range
Range
Temperature
–40°C to +85°C
–55°C to +125°C
VCC
Commercial T, AT, CT
Military[4]
5V ± 5%
5V ± 10%
L
All
X
X
H
Z
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
2.0
Typ.[5]
Max.
Unit
V
VOH
Output HIGH Voltage
VCC=Min., IOH=–32 mA
Com’l
Com’l
Mil
VCC=Min., IOH=–15 mA
VCC=Min., IOH=–12 mA
VCC=Min., IOL=64 mA
VCC=Min., IOL=32 mA
2.4
3.3
3.3
0.3
0.3
V
2.4
V
VOL
Output LOW Voltage
Com’l
Mil
0.55
0.55
V
V
VIH
VIL
VH
VIK
II
Input HIGH Voltage
Input LOW Voltage
Hysteresis[6]
2.0
V
0.8
V
All inputs
0.2
V
Input Clamp Diode Voltage
Input HIGH Current
Input HIGH Current
Input LOW Current
VCC=Min., IIN=–18 mA
VCC=Max., VIN=VCC
VCC=Max., VIN=2.7V
VCC=Max., VIN=0.5V
VCC = Max., VOUT = 2.7V
–0.7
–1.2
5
V
µA
µA
µA
µA
IIH
±1
±1
10
IIL
IOZH
Off State HIGH-Level Output
Current
IOZL
Off State LOW-Level
Output Current
VCC = Max., VOUT = 0.5V
–10
µA
IOS
Output Short Circuit Current[7] VCC=Max., VOUT=0.0V
–60
–120
–225
mA
IOFF
Power-Off Disable VCC=0V, VOUT=4.5V
±1
µA
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level X = Don’t Care Z = HIGH Impedance = LOW-to-HIGH clock transition
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameters tests. In any sequence of parameter
tests, IOS tests should be performed last.
2
CY54/74FCT374T
CY54/74FCT574T
Capacitance[2]
Parameter
CIN
Description
Typ.[5]
Max.
10
Unit
pF
Input Capacitance
Output Capacitance
5
9
COUT
12
pF
Power Supply Characteristics
Parameter
ICC
Description
Test Conditions
Typ.[5]
Max.
0.2
Unit
Quiescent Power Supply Current
VCC=Max., VIN≤0.2V, VIN≥VCC–0.2V
VCC=Max., VIN=3.4V,[8]
f1=0, Outputs Open
0.1
0.5
mA
mA
∆ICC
Quiescent Power Supply Current
(TTL inputs HIGH)
2.0
ICCD
Dynamic Power Supply Current[9]
VCC=Max., One Bit Toggling,
50% Duty Cycle, Outputs Open,
OE=GND, VIN≤0.2V or VIN≥VCC–0.2V
0.06
0.7
0.12
1.4
mA/MHz
mA
IC
Total Power Supply Current[10]
VCC=Max., f0=10 MHz,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=5 MHz,
OE=GND, VIN≤0.2V or VIN≥VCC–0.2V
VCC=Max., f0=10 MHz,
1.2
1.6
3.9
3.4
mA
mA
mA
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=5 MHz,
OE=GND, VIN=3.4V or VIN=GND
VCC=Max., f0=10 MHz,
3.2[11]
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
OE=GND, VIN≤0.2V or VIN≥VCC–0.2V
[11]
VCC=Max., f0=10 MHz,
12.2
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
OE=GND, VIN=3.4V or VIN=GND
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY54/74FCT374T
CY54/74FCT574T
Switching Characteristics[12] Over the Operating Range
FCT374T/FCT574T
FCT374AT/FCT574AT
Military Commercial
Military
Commercial
Fig.
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
No.[13]
tPLH
tPHL
Propagation Delay
Clock to Output
2.0
1.5
1.5
2.0
11.0
2.0
10.0
2.0
1.5
1.5
2.0
7.2
2.0
6.5
ns
1, 5
1, 7, 8
1, 7, 8
4
tPZH
tPZL
Output Enable Time
14.0
8.0
1.5
1.5
2.0
12.5
8.0
7.5
6.5
1.5
1.5
2.0
6.5
5.5
ns
ns
ns
tPHZ
tPLZ
Output Disable
Time
tS
Set–Up Time
HIGH or LOW
D to CP
tH
Hold Time
HIGH or LOW
D to CP
1.5
7.0
1.5
7.0
1.5
6.0
1.5
5.0
ns
ns
4
5
tW
Clock Pulse
Width[14] HIGH or
LOW
FCT374CT/FCT574CT
Military Commercial
Fig.
Parameter
Description
Min.
Max.
Min.
Max.
Unit
No.[13]
tPLH
tPHL
Propagation Delay Clock to Output
2.0
1.5
1.5
6.2
2.0
5.2
ns
1, 5
tPZH
tPZL
Output Enable Time
6.2
5.7
1.5
1.5
5.5
5.0
ns
ns
1, 7, 8
1, 7, 8
tPHZ
tPLZ
Output Disable Time
tS
tH
Set-Up Time, HIGH or LOW D to CP
Hold Time, HIGH or LOW D to CP
Clock Pulse Width[14] HIGH or LOW
2.0
1.5
6.0
2.0
1.5
5.0
ns
ns
ns
4
4
5
tW
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
14. With one data channel toggling, tW(L)=tW(H)=4.0 ns and tr=tf=1.0 ns.
4
CY54/74FCT374T
CY54/74FCT574T
Ordering Information—FCT374T
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY74FCT374CTQCT
CY74FCT374CTSOC/SOCT
CY54FCT374CTDMB
CY54FCT374CTLMB
CY74FCT374ATPC
Package Type
20-Lead (150-Mil) QSOP
5.2
Q5
S5
Commercial
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
6.2
6.5
D6
L61
P5
Military
20-Pin Square Leadless Chip Carrier
20-Lead (300-Mil) Molded DIP
20-Lead (150-Mil) QSOP
Commercial
CY74FCT374ATQCT
CY74FCT374ATSOC/SOCT
CY54FCT374ATLMB
CY54FCT374ATDMB
CY74FCT374TQCT
Q5
S5
20-Lead (300-Mil) Molded SOIC
20-Pin Square Leadless Chip Carrier
20-Lead (300-Mil) CerDIP
7.2
L61
D6
Q5
S5
Military
10.0
11.0
20-Lead (150-Mil) QSOP
Commercial
Military
CY74FCT374TSOC/SOCT
CY54FCT374TDMB
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
D6
L61
CY54FCT374TLMB
20-Pin Square Leadless Chip Carrier
Ordering Information—FCT574T
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY74FCT574CTQCT
CY74FCT574CTSOC/SOCT
CY54FCT574CTDMB
CY74FCT574ATQCT
Package Type
20-Lead (150-Mil) QSOP
5.2
Q5
S5
D6
Q5
S5
D6
L61
Q5
S5
Commercial
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
6.2
6.5
Military
20-Lead (150-Mil) QSOP
Commercial
CY74FCT574ATSOC/SOCT
CY54FCT574ATDMB
CY54FCT574ATLMB
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
7.2
Military
20-Pin Square Leadless Chip Carrier
20-Lead (150-Mil) QSOP
10.0
CY74FCT574TQCT
Commercial
CY74FCT574TSOC/SOCT
20-Lead (300-Mil) Molded SOIC
Document #: 38-00278-B
5
CY54/74FCT374T
CY54/74FCT574T
Package Diagrams
20-Lead (300-Mil) CerDIP D6
MIL-STD-1835 D- 8Config.A
20-Pin Square Leadless Chip Carrier L61
MIL-STD-1835 C-2A
6
CY54/74FCT374T
CY54/74FCT574T
Package Diagrams (continued)
20-Lead (300-Mil) Molded DIP P5
20-Lead Quarter Size Outline Q5
7
CY54/74FCT374T
CY54/74FCT574T
Package Diagrams (continued)
20-Lead (300-Mil) Molded SOIC S5
8
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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Copyright 2000, Texas Instruments Incorporated
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