CY74FCT2257CTSOCE4 [TI]
FCT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, SOIC-16;型号: | CY74FCT2257CTSOCE4 |
厂家: | TEXAS INSTRUMENTS |
描述: | FCT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, SOIC-16 光电二极管 输出元件 逻辑集成电路 |
文件: | 总15页 (文件大小:627K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CY74FCT2257T
QUAD 2-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
SCCS038B – SEPTEMBER 1994 – REVISED OCTOBER 2001
Q OR SO PACKAGE
(TOP VIEW)
Function and Pinout Compatible With FCT
and F Logic
25-Ω Output Series Resistors to Reduce
Transmission-Line Reflection Noise
S
V
CC
OE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
I
I
0a
1a
TTL Output Level Versions of Equivalent
FCT Functions
I
0c
Y
I
a
1c
I
Y
c
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
0b
I
I
1b
0d
Y
I
b
1d
GND
Y
d
I
Supports Partial-Power-Down Mode
off
Operation
Fully Compatible With TTL Input and
Output Logic Levels
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
12-mA Output Sink Current
15-mA Output Source Current
3-State Outputs
description
The CY74FCT2257T has four identical two-input multiplexers that select four bits of data from two sources
under the control of a common data-select (S) input. The I inputs are selected when S is low, and the I inputs
0
1
are selected when S is high. Data appears at the output in noninverted form for the CY74FCT2257T. On-chip
termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2257T can
replace the FCT257T to reduce noise in an existing design.
The CY74FCT2257T is a logic implementation of a four-pole, two-position switch, in which the position of the
switch is determined by the logic levels supplied to S. Outputs are forced to the high-impedance off state when
the output-enable (OE) input is high.
All but one device must be in the high-impedance state to prevent currents from exceeding the maximum ratings
ifoutputsaretiedtogether. DesignoftheOEsignalsmustensurethatthereisnooverlapwhenoutputsof3-state
devices are tied together.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
PIN DESCRIPTION
NAME
DESCRIPTION
Data inputs
I
S
Common data-select input
Output-enable input (active low)
Data outputs
OE
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2257T
QUAD 2-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
SCCS038B – SEPTEMBER 1994 – REVISED OCTOBER 2001
ORDERING INFORMATION
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
QSOP – Q
Tape and reel
Tube
4.3
4.3
4.3
5
CY74FCT2257CTQCT
CY74FCT2257CTSOC
CY74FCT2257CTSOCT
CY74FCT2257ATQCT
FR257-3
FCT2257C
FR257-1
–40°C to 85°C SOIC – SO
QSOP – Q
Tape and reel
Tape and reel
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
H
L
S
X
H
H
L
I
I
1
0
X
X
X
L
X
L
Z
L
L
H
X
X
H
L
L
L
L
H
H
H = High logic level, L = Low logic level, X = Don’t
care, Z = High-impedance (off) state
logic diagram (positive logic)
15
OE
1
S
2
I
I
0a
4
7
Y
a
3
5
6
1a
I
I
0b
Y
b
Y
c
Y
d
1b
14
13
11
10
I
0c
12
I
1c
0d
I
9
I
1d
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2257T
QUAD 2-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
SCCS038B – SEPTEMBER 1994 – REVISED OCTOBER 2001
†
absolute maximum rating over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θ (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W
JA
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
Ambient temperature range with power applied, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
MIN NOM
MAX
UNIT
V
V
V
V
Supply voltage
4.75
2
5
5.25
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
V
IH
0.8
–15
12
V
IL
I
mA
mA
°C
OH
OL
I
T
A
–40
85
NOTE 2: All unused inputs of the device must be held at V
or GND to ensure proper device operation.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2257T
QUAD 2-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
SCCS038B – SEPTEMBER 1994 – REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN
2.4
20
TYP
MAX
UNIT
V
V
V
V
V
CC
V
CC
V
CC
V
CC
= 4.75 V,
= 4.75 V,
= 4.75 V,
= 4.75 V,
I
I
I
I
= –18 mA
–0.7
3.3
0.3
25
–1.2
IK
IN
= –15 mA
= 12 mA
= 12 mA
V
OH
OL
OH
OL
OL
0.55
40
V
R
Ω
out
V
hys
All inputs
0.2
V
I
I
I
I
I
I
I
V
V
V
V
V
V
V
V
V
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 0 V,
V
V
V
V
V
V
V
= 2.7 V
= 0.5 V
±1
±1
µA
µA
µA
µA
mA
µA
mA
mA
IH
CC
CC
CC
CC
CC
CC
CC
CC
CC
IN
IL
IN
= 2.7 V
= 0.5 V
= 0 V
10
OZH
OZL
OUT
OUT
OUT
OUT
–10
–225
±1
‡
–60
–120
OS
= 4.5 V
off
= 5.25 V,
≤ 0.2 V,
V ≥ V
IN CC
– 0.2 V
0.1
0.5
0.2
2
CC
IN
§
∆I
= 5.25 V, V = 3.4 V , f = 0, Outputs open
IN
CC
1
= 5.25 V, One input switching at 50% duty cycle, Outputs open,
– 0.2 V
mA/
MHz
¶
I
0.06
0.12
CCD
OE = GND, V ≤ 0.2 V or V ≥ V
IN IN CC
V
V
≤ 0.2 V or
One bit switching
at f = 10 MHz
1
at 50% duty cycle
IN
IN
0.7
1
1.4
2.4
≥ V
CC
– 0.2 V
V
= 5.25 V,
CC
V
IN
= 3.4 V or GND
#
I
mA
Outputs open,
OE = GND
C
V
V
≤ 0.2 V or
Four bits switching
at f = 2.5 MHz
1
at 50% duty cycle
IN
IN
||
0.7
1.4
≥ V
– 0.2 V
CC
||
5.4
V
IN
= 3.4 V or GND
1.7
5
C
C
10
12
pF
pF
i
9
o
†
‡
Typical values are at V
CC
= 5 V, T = 25°C.
A
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, I
tests should be performed last.
OS
§
¶
#
Per TTL-driven input (V = 3.4 V); all other inputs at V
or GND
IN CC
This parameter is derived for use in total power-supply calculations.
= I + ∆I × D × N + I (f /2 + f × N )
I
C
CC
CC
H
T
CCD
0
1
1
Where:
I
I
∆I
D
N
= Total supply current
= Power-supply current with CMOS input levels
C
CC
CC
H
T
= Power-supply current for a TTL high input (V = 3.4 V)
IN
= Duty cycle for TTL inputs high
= Number of TTL inputs at D
H
I
f
f
= Dynamic current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
= Input signal frequency
CCD
0
1
N
= Number of inputs changing at f
1
1
All currents are in milliamperes and all frequencies are in megahertz.
||
Values for these conditions are examples of the I
CC
formula.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2257T
QUAD 2-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
SCCS038B – SEPTEMBER 1994 – REVISED OCTOBER 2001
switching characteristics over operating free-air temperature range (see Figure 1)
CY74FCT2257AT CY74FCT2257CT
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
MAX
MIN
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
MAX
4.7
4.7
5.2
5.2
6
t
t
t
t
t
t
t
t
5
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
I
a
or I
S
Y
Y
Y
Y
b
5
7
ns
7
7
ns
OE
OE
7
6
5.5
5.5
5
ns
5
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2257T
QUAD 2-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
SCCS038B – SEPTEMBER 1994 – REVISED OCTOBER 2001
PARAMETER MEASUREMENT INFORMATION
7 V
Open
GND
S1
500 Ω
From Output
Under Test
From Output
Under Test
Test
Point
TEST
S1
t
/t
Open
7 V
PLH PHL
t /t
C
= 50 pF
C
= 50 pF
L
L
500 Ω
500 Ω
PLZ PZL
/t
(see Note A)
(see Note A)
t
Open
PHZ PZH
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE OUTPUTS
3 V
0 V
1.5 V
Timing Input
Data Input
t
w
t
h
t
3 V
su
3 V
0 V
1.5 V
Input
1.5 V
1.5 V
1.5 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
t
t
t
t
PLH
PHL
PLH
PZL
PZH
PLZ
≈3.5 V
V
Output
Waveform 1
(see Note B)
OH
In-Phase
Output
1.5 V
1.5 V
1.5 V
1.5 V
V
V
+ 0.3 V
OL
V
OL
V
OL
t
t
PHL
PHZ
V
V
V
OH
OH
Output
Waveform 2
(see Note B)
Out-of-Phase
Output
– 0.3 V
OH
1.5 V
1.5 V
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
74FCT2257CTSOCTE4
74FCT2257CTSOCTG4
CY74FCT2257ATQCT
ACTIVE
SOIC
SOIC
SSOP
DW
16
16
16
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-40 to 85
-40 to 85
-40 to 85
ACTIVE
ACTIVE
DW
DBQ
2500
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
FR257-1
FCT2257C
CY74FCT2257CTSOCT
ACTIVE
SOIC
DW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CY74FCT2257CTSOCT
SOIC
DW
16
2000
330.0
16.4
10.75 10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 16
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 38.0
CY74FCT2257CTSOCT
2000
Pack Materials-Page 2
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Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, PLASTIC, SOIC-20
CYPRESS
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