CY74FCT257CTQCTG4 [TI]

FCT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, QSOP-16;
CY74FCT257CTQCTG4
型号: CY74FCT257CTQCTG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

FCT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, QSOP-16

光电二极管 输出元件 逻辑集成电路
文件: 总18页 (文件大小:738K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CY74FCT257T  
QUAD 2-INPUT MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCCS019D − MAY 1994 − REVISED NOVEMBER 2001  
Q OR SO PACKAGE  
(TOP VIEW)  
D
D
D
Function, Pinout, and Drive Compatible  
With FCT and F Logic  
Reduced V (Typically = 3.3 V) Version of  
OH  
S
I0a  
VCC  
OE  
I0c  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
Equivalent FCT Functions  
Edge-Rate Control Circuitry for  
Significantly Improved Noise  
Characteristics  
I1a  
Ya  
I1c  
I0b  
12 Yc  
11  
D
I
off  
Supports Partial-Power-Down Mode  
I1b  
I0d  
Operation  
10  
9
Yb  
GND  
I1d  
Yd  
D
Matched Rise and Fall Times  
D
Fully Compatible With TTL Input and  
Output Logic Levels  
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
D
D
64-mA Output Sink Current  
32-mA Output Source Current  
3-State Outputs  
description  
The CY74FCT257T has four identical two-input multiplexers that select four bits of data from two sources under  
the control of a common data-select (S) input. The I inputs are selected when S is low, and the I inputs are  
0
1
selected when S is high. Data at the output is noninverted.  
The CY74FCT257T is a logic implementation of a four-pole, two-position switch, where the position of the switch  
is determined by the logic levels at S. Outputs are in the high-impedance state when the output-enable (OE)  
input is high.  
All but one device must be in the high-impedance state to avoid currents exceeding the maximum ratings if  
outputs are tied together. OE inputs must ensure that there is no overlap when outputs of 3-state devices are  
tied together.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
PIN DESCRIPTION  
NAME  
DESCRIPTION  
Data inputs  
I
S
Common data-select input  
Output-enable input (active low)  
Data outputs  
OE  
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright © 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY74FCT257T  
QUAD 2-INPUT MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCCS019D − MAY 1994 − REVISED NOVEMBER 2001  
ORDERING INFORMATION  
SPEED  
(ns)  
ORDERABLE  
TOP-SIDE  
MARKING  
T
PACKAGE  
A
PART NUMBER  
CY74FCT257CTQCT  
CY74FCT257CTSOC  
CY74FCT257CTSOCT  
CY74FCT257ATQCT  
CY74FCT257TQCT  
QSOP − Q  
SOIC − SO  
Tape and reel  
Tube  
4.3  
4.3  
4.3  
5
FT257-3  
FCT257C  
−40°C to 85°C  
Tape and reel  
Tape and reel  
Tape and reel  
QSOP − Q  
QSOP − Q  
FT257-1  
FT257  
6
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
H
L
S
X
H
H
L
I
I
1
0
X
X
X
L
X
L
Z
L
L
H
X
X
H
L
L
L
L
H
H
H = High logic level, L = Low logic level,  
X = Don’t care, Z = High-impedance state  
logic diagram  
15  
1
OE  
S
2
I
0a  
1a  
0b  
1b  
4
7
Y
a
3
I
5
I
I
Y
b
Y
c
Y
d
6
14  
13  
11  
10  
I
I
0c  
1c  
0d  
1d  
12  
I
I
9
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY74FCT257T  
QUAD 2-INPUT MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCCS019D − MAY 1994 − REVISED NOVEMBER 2001  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†  
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA  
Package thermal impedance, θ (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W  
JA  
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W  
Ambient temperature range with power applied, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 135°C  
A
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 2)  
MIN NOM  
MAX  
UNIT  
V
V
V
V
Supply voltage  
4.75  
2
5
5.25  
CC  
IH  
IL  
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Operating free-air temperature  
V
0.8  
−32  
64  
V
I
I
mA  
mA  
°C  
OH  
OL  
T
A
−40  
85  
NOTE 2: All unused inputs of the device must be held at V or GND to ensure proper device operation.  
CC  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY74FCT257T  
QUAD 2-INPUT MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCCS019D − MAY 1994 − REVISED NOVEMBER 2001  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
V
V
V
V
V
V
V
= 4.75,  
= 4.75,  
= 4.75,  
I
I
I
= −18 mA  
−0.7  
−1.2  
IK  
CC  
CC  
CC  
IN  
= −32 mA  
= 64 mA  
2
V
OH  
OL  
hys  
OH  
OL  
0.3  
0.2  
0.55  
V
All inputs  
V
I
V
V
V
V
V
V
V
V
V
V
= 5.25 V,  
V
V
V
V
V
V
V
V
= 5.25 V  
= 2.7 V  
= 0.5 V  
= 2.7 V  
5
1
μA  
μA  
μA  
μA  
μA  
mA  
μA  
mA  
mA  
I
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
IN  
IN  
IN  
I
IH  
= 5.25 V,  
= 5.25 V,  
= 5.25 V,  
= 5.25 V,  
= 5.25 V,  
= 0 V,  
I
I
I
I
I
I
1
IL  
10  
−10  
OZH  
OZL  
OUT  
OUT  
OUT  
OUT  
= 0.5 V  
= 0 V  
−60  
−120 −225  
1
OS  
= 4.5 V  
off  
= 5.25 V,  
0.2 V,  
V
IN  
V − 0.2 V  
0.1  
0.5  
0.2  
2
CC  
IN  
CC  
§
ΔI  
= 5.25 V, V = 3.4 V , f = 0, Outputs open  
IN 1  
CC  
= 5.25 V, One input switching at 50% duty cycle, Outputs open,  
mA/  
MHz  
I
0.06  
0.12  
CCD  
OE = GND, V 0.2 V or V V − 0.2 V  
IN  
IN  
CC  
V
V
0.2 V or  
IN  
IN  
One input switching  
0.7  
1
1.4  
2.4  
V − 0.2 V  
CC  
at f = 10 MHz  
1
V
= 5.25 V,  
CC  
at 50% duty cycle  
V
IN  
= 3.4 V or GND  
#
Outputs open,  
OE = GND  
I
mA  
C
V
V
0.2 V or  
IN  
IN  
Four bits switching  
||  
0.7  
1.4  
V − 0.2 V  
CC  
at f = 2.5 MHz  
1
||  
at 50% duty cycle  
V
IN  
= 3.4 V or GND  
1.7  
5
5.4  
C
C
10  
12  
pF  
pF  
i
9
o
Typical values are at V = 5 V, T = 25°C.  
CC  
A
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus  
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,  
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In  
any sequence of parameter tests, I tests should be performed last.  
OS  
§
#
Per TTL-driven input (V = 3.4 V); all other inputs at V or GND  
IN  
CC  
This parameter is derived for use in total power-supply calculations.  
= I + ΔI × D × N + I (f /2 + f × N )  
I
C
CC  
CC  
H
T
CCD  
0
1
1
Where:  
I
I
= Total supply current  
= Power-supply current with CMOS input levels  
C
CC  
ΔI  
= Power-supply current for a TTL high input (V = 3.4 V)  
= Duty cycle for TTL inputs high  
CC  
IN  
D
N
I
f
f
H
= Number of TTL inputs at D  
T
CCD  
0
H
= Dynamic current caused by an input transition pair (HLH or LHL)  
= Clock frequency for registered devices, otherwise zero  
= Input signal frequency  
1
N
= Number of inputs changing at f  
1
1
All currents are in milliamperes and all frequencies are in megahertz.  
||  
Values for these conditions are examples of the I formula.  
CC  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY74FCT257T  
QUAD 2-INPUT MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCCS019D − MAY 1994 − REVISED NOVEMBER 2001  
switching characteristics over operating free-air temperature range (see Figure 1)  
CY74FCT257T  
CY74FCT257AT  
CY74FCT257CT  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
ns  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
6
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
5
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
4.3  
4.3  
5.2  
5.2  
6
t
t
t
t
t
t
t
t
PLH  
PHL  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
I
Y
Y
Y
Y
6
5
10.5  
10.5  
8.5  
8.5  
6
7
S
ns  
7
7
ns  
OE  
OE  
7
6
5.5  
5.5  
5
ns  
6
5
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY74FCT257T  
QUAD 2-INPUT MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCCS019D − MAY 1994 − REVISED NOVEMBER 2001  
PARAMETER MEASUREMENT INFORMATION  
7 V  
Open  
GND  
S1  
500 Ω  
From Output  
Under Test  
From Output  
Under Test  
Test  
Point  
TEST  
/t  
S1  
t
t
Open  
7 V  
Open  
PLH PHL  
t
C = 50 pF  
C = 50 pF  
L
L
500 Ω  
500 Ω  
/t  
PLZ PZL  
(see Note A)  
(see Note A)  
/t  
PHZ PZH  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
LOAD CIRCUIT FOR  
3-STATE OUTPUTS  
3 V  
0 V  
1.5 V  
Timing Input  
Data Input  
t
w
t
h
t
3 V  
su  
3 V  
0 V  
1.5 V  
Input  
1.5 V  
1.5 V  
1.5 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3 V  
0 V  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Input  
t
t
t
t
t
PLH  
PHL  
PZL  
PLZ  
3.5 V  
V
Output  
Waveform 1  
(see Note B)  
OH  
In-Phase  
Output  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
V
+ 0.3 V  
OL  
V
OL  
V
OL  
t
t
t
PHL  
PLH  
PZH  
PHZ  
V
V
V
OH  
OH  
Output  
Waveform 2  
(see Note B)  
Out-of-Phase  
Output  
V
− 0.3 V  
OH  
1.5 V  
1.5 V  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
21-Mar-2013  
PACKAGING INFORMATION  
Orderable Device  
CY74FCT257ATD  
Status Package Type Package Pins Package Qty  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
Top-Side Markings  
Samples  
Drawing  
(1)  
(2)  
(3)  
(4)  
ACTIVE  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SSOP  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SSOP  
SSOP  
SSOP  
SOIC  
SOIC  
D
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
40  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
FCT257AT  
FCT257AT  
FCT257AT  
FCT257AT  
FCT257AT  
FCT257AT  
FT257-1  
CY74FCT257ATDE4  
CY74FCT257ATDG4  
CY74FCT257ATDR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
D
D
40  
Green (RoHS  
& no Sb/Br)  
40  
Green (RoHS  
& no Sb/Br)  
D
2500  
2500  
2500  
2500  
2500  
2500  
2500  
2500  
2500  
2500  
2500  
2500  
40  
Green (RoHS  
& no Sb/Br)  
CY74FCT257ATDRE4  
CY74FCT257ATDRG4  
CY74FCT257ATQCT  
CY74FCT257ATQCTE4  
CY74FCT257ATQCTG4  
CY74FCT257CTDR  
D
Green (RoHS  
& no Sb/Br)  
D
Green (RoHS  
& no Sb/Br)  
DBQ  
DBQ  
DBQ  
D
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
FT257-1  
Green (RoHS  
& no Sb/Br)  
FT257-1  
Green (RoHS  
& no Sb/Br)  
FCT257CT  
FCT257CT  
FCT257CT  
FT257-3  
CY74FCT257CTDRE4  
CY74FCT257CTDRG4  
CY74FCT257CTQCT  
CY74FCT257CTQCTE4  
CY74FCT257CTQCTG4  
CY74FCT257CTSOC  
CY74FCT257CTSOCE4  
D
Green (RoHS  
& no Sb/Br)  
D
Green (RoHS  
& no Sb/Br)  
DBQ  
DBQ  
DBQ  
DW  
DW  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
FT257-3  
Green (RoHS  
& no Sb/Br)  
FT257-3  
Green (RoHS  
& no Sb/Br)  
FCT257C  
FCT257C  
40  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
21-Mar-2013  
Orderable Device  
Status Package Type Package Pins Package Qty  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Top-Side Markings  
Samples  
Drawing  
(1)  
(2)  
(3)  
(4)  
CY74FCT257CTSOCG4  
ACTIVE  
SOIC  
DW  
16  
40  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
-40 to 85  
FCT257C  
CY74FCT257CTSOCT  
CY74FCT257CTSOCTE4  
CY74FCT257CTSOCTG4  
CY74FCT257TQCT  
OBSOLETE  
OBSOLETE  
OBSOLETE  
ACTIVE  
SOIC  
SOIC  
SOIC  
SSOP  
DW  
DW  
16  
16  
16  
16  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
FCT257C  
DW  
Call TI  
Call TI  
DBQ  
2500  
2500  
2500  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-2-260C-1 YEAR  
FT257  
FT257  
FT257  
CY74FCT257TQCTE4  
CY74FCT257TQCTG4  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
DBQ  
DBQ  
16  
16  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 85  
-40 to 85  
Green (RoHS  
& no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) Only one of markings shown within the brackets will appear on the physical device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
21-Mar-2013  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Aug-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
CY74FCT257ATDR  
CY74FCT257CTDR  
SOIC  
SOIC  
D
D
16  
16  
2500  
2500  
330.0  
330.0  
16.4  
16.4  
6.5  
6.5  
10.3  
10.3  
2.1  
2.1  
8.0  
8.0  
16.0  
16.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Aug-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
CY74FCT257ATDR  
CY74FCT257CTDR  
SOIC  
SOIC  
D
D
16  
16  
2500  
2500  
333.2  
333.2  
345.9  
345.9  
28.6  
28.6  
Pack Materials-Page 2  
IMPORTANT NOTICE  
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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